SUIT: Secure Undervolting with Instruction Traps - Citation Index

2024 article

SUIT: Secure Undervolting with Instruction Traps

Juffinger, J., Kalinin, S., Gruss, D., & Mueller, F. (2024, April 22).

By: J. Juffinger ^*, S. Kalinin ⁿ, D. Gruss ^* & F. Muellerⁿ

topics (OpenAlex): Low-power high-performance VLSI design; Security and Verification in Computing; Parallel Computing and Optimization Techniques

10.1145/3620665.3640373

Find Text @ NCSU

open access via doi.org (repository)

Source: Web Of Science

Added: March 10, 2025

&lt;p&gt;Artifacts for the ASPLOS 2024 paper SUIT: Secure Undervolting with Instruction Traps.&lt;/p&gt;\n&lt;p&gt;artifacts.zip contains all code of the experiments used for the paper and all our results.&lt;br&gt;instruction_traces.tar.gz contains the instruction traces of all SPEC CPU2017 benchmarks except for 520.omnetpp and 521.wrf because they are too large.&lt;/p&gt;