Privacy is a huge concern for our modern cyberspace, with the fast development of Internet of Things (IoT) technologies. To preserve data privacy, differential privacy (DP) has been widely applied as the gold standard to offer both utility to applications and rigorous privacy guarantees. However, traditional software-based DP implementation schemes require significant computation and memory resources, which cannot be supported by typical resource-limited IoT edge devices. This brief presents a new failure-tunable memory design to achieve a local DP mechanism. Specifically, a custom 4T SRAM with multiple supply voltages is designed to inject controlled DP noise while data is stored in the memory. The post-simulation results based on a 130CMOS technology show that, compared to state-of the art, our proposed design can achieve a 38% power savings and 61.92% silicon area reduction. In addition, the proposed design demonstrates enhanced controllability on the privacy deployment as compared to traditional 6T-based design, enabling fine-grained control of privacy levels. Accordingly, the proposed memory-based hardware scheme realizes DP with low cost and low power consumption, which makes DP applicable for IoT devices.