2020 journal article

Post-Silicon Microarchitecture

IEEE COMPUTER ARCHITECTURE LETTERS, 19(1), 26–29.

By: C. Kumar n, A. Chaudhary n, S. Bhawalkar n, U. Mathur n, S. Jain n, A. Vastrad n, E. Rotenberg n

author keywords: Microarchitecture; Payloads; Fabrics; Indexes; Prefetching; Registers; Synchronization; Adaptable architectures; microarchitecture; reconfigurable hardware
TL;DR: This work proposes coupling a reconfigurable fabric with the CPU, on the same chip, via a simple and flexible interface to allow post-silicon development of application-specific microarchitectures. (via Semantic Scholar)
Source: Web Of Science
Added: May 8, 2020

Microprocessors are designed to provide good general performance across a range of benchmarks. As such, microarchitectural techniques which provide good speedup for only a small subset of applications are not attractive when designing a general-purpose core. We propose coupling a reconfigurable fabric with the CPU, on the same chip, via a simple and flexible interface to allow post-silicon development of application-specific microarchitectures. The interface supports observation and intervention at key pipeline stages of the CPU, so that exotic microarchitecture designs (with potentially narrow applicability) can be synthesized in the reconfigurable fabric and seem like components that were hardened into the core.