2023 article

CryptoMMU: Enabling Scalable and Secure Access Control of Third-Party Accelerators

56TH IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE, MICRO 2023, pp. 32–48.

By: F. Alam n, H. Lee n, A. Bhattacharjee * & A. Awad n

author keywords: IOMMU; accelerator-rich architecture; access control; cryptography
TL;DR: This paper proposes a novel scheme, CryptoMMU, to delegate the translation processes to accelerators, whereas the authentication of the targeted address is elegantly performed using a cryptography-based approach, providing better scalability. (via Semantic Scholar)
Source: Web Of Science
Added: March 25, 2024

Due to increasing energy and performance gaps between general-purpose processors and hardware accelerators (e.g., FPGA or ASIC), clear trends for leveraging accelerators arise in various fields or workloads, such as edge devices, cloud systems, and data centers. Moreover, system integrators desire higher flexibility to deploy custom accelerators based on their performance, power, and cost constraints, where such integration can be as early as (1) at the design time when third-party intellectual properties (IPs) are used, (2) at integration/upgrade time when third-party discrete chip accelerators are used, or (3) during runtime as in reconfigurable logic.