Jimmie J. Wortman

A study of the effects of tunneling currents and reliability of sub-2 nm gate oxides on scaled n-MOSFETs

MICROELECTRONICS RELIABILITY, 41(1), 37–46.

Study of low-frequency charge pumping on thin stacked dielectrics

IEEE TRANSACTIONS ON ELECTRON DEVICES, 48(12), 2754–2762.

A comparative study of gate direct tunneling and drain leakage currents in N-MOSFET's with sub-2-nm gate oxides

IEEE TRANSACTIONS ON ELECTRON DEVICES, 47(8), 1636–1644.

A two-dimensional numerical simulation of pulsed drain current transients in weak inversion and application to interface trap characterization on small geometry MOSFETs with ultrathin oxides

IEEE TRANSACTIONS ON ELECTRON DEVICES, 47(11), 2236–2237.

Analysis of leakage currents and impact on off-state power consumption for CMOS technology in the 100-nm regime

IEEE TRANSACTIONS ON ELECTRON DEVICES, 47(7), 1393–1400.

Comparative physical and electrical metrology of ultrathin oxides in the 6 to 1.5 nm regime

IEEE TRANSACTIONS ON ELECTRON DEVICES, 47(7), 1349–1354.

Estimation of the effects of remote charge scattering on electron mobility of n-MOSFET's with ultrathin gate oxides

IEEE TRANSACTIONS ON ELECTRON DEVICES, 47(2), 440–447.

Limitations of the modified shift-and-ratio technique for extraction of the bias dependence of L-eff and R-sd of LDD MOSFET's

IEEE TRANSACTIONS ON ELECTRON DEVICES, 47(4), 891–895.

A low-thermal-budget in situ doped multilayer silicon epitaxy process for MOSFET channel engineering

JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 146(3), 1189–1196.

Electrical characterization of n-channel MOSFETs with oxynitride gate dielectric formed by low-pressure Rapid Thermal Chemical Vapor Deposition

Microelectronic Engineering, 48(1-4), 211–214.

Electrical properties of oxynitride thin films using noise and charge pumping measurements

Masson, P., Morfouli, P., Autran, J. L., Brini, J., Balland, B., Vogel, E. M., & Wortman, J. J. (1999, April 1). JOURNAL OF NON-CRYSTALLINE SOLIDS, Vol. 245, pp. 54–58.

Estimating oxide thickness of tunnel oxides down to 1.4 nm using conventional capacitance-voltage measurements on MOS capacitors

IEEE ELECTRON DEVICE LETTERS, 20(4), 179–181.

Impact of tunnel currents and channel resistance on the characterization of channel inversion layer charge and polysilicon-gate depletion of sub-20-angstrom gate oxide MOSFET's

IEEE TRANSACTIONS ON ELECTRON DEVICES, 46(8), 1650–1655.

Interfacial properties of ultrathin pure silicon nitride formed by remote plasma enhanced chemical vapor deposition

Journal of Vacuum Science & Technology. B, Microelectronics and Nanometer Structures, 17(4), 1836–1839.

Modeling study of ultrathin gate oxides using direct tunneling current and capacitance-voltage measurements in MOS devices

IEEE TRANSACTIONS ON ELECTRON DEVICES, 46(7), 1464–1471.

Modeling the trends in valence-band electron tunneling in NMOSFETs with ultrathin SiO2 and SiO2/Ta2O5 dielectrics with oxide scaling

Shanware, A., Massoud, H. Z., Vogel, E., Henson, K., Hauser, JR, & Wortman, J. J. (1999, September). MICROELECTRONIC ENGINEERING, Vol. 48, pp. 295–298.

Observation of oxide breakdown and its effects on the characteristics of ultra-thin-oxide nMOSFET's

IEEE ELECTRON DEVICE LETTERS, 20(12), 605–607.

The effects of Ge content in poly-Si1-xGex gate material on the tunneling barrier in PMOS devices

Shanware, A., Massoud, H. Z., Acker, A., Li, V. Z. Q., Mirabedini, M. R., Henson, K., … Wortman, J. J. (1999, September). MICROELECTRONIC ENGINEERING, Vol. 48, pp. 39–42.

Effects of Si source gases (SiH4 and Si2H6) on polycrystalline- Si1-xGex deposited on oxide by RTCVD

Electrochemical and Solid State Letters, 1(3), 153–155.

Evaluation of 2.0 nm grown and deposited dielectrics in 0.1 mu m PMOSFETs

RAPID THERMAL AND INTEGRATED PROCESSING VII, Vol. 525, pp. 163–170.

Impact of floating gate dopant concentration and interpoly dielectric processing on tunnel dielectric reliability

JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 145(4), 1351–1355.

Modeled tunnel currents for high dielectric constant dielectrics

IEEE TRANSACTIONS ON ELECTRON DEVICES, 45(6), 1350–1355.

Structure and properties of rapid thermal chemical vapor deposited polycrystalline silicon-germanium films on SiO2 using Si2H6, GeH4, and B2H6 gases

JOURNAL OF APPLIED PHYSICS, 83(10), 5469–5476.

Electrical and reliability properties of thin silicon oxinitride dielectrics formed by low pressure rapid thermal chemical vapor deposition

SOLID-STATE ELECTRONICS, 41(7), 1051–1055.

Rapid thermal chemical vapor deposition of in situ boron doped polycrystalline silicon germanium films on silicon dioxide for complimentary metal oxide semiconductor applications

Applied Physics Letters, 71(23), 3388–3390.

Three-zone rapid thermal processing system utilizing wafer edge heating means

Washington, DC: U.S. Patent and Trademark Office.

Selective deposition of doped silicon-germanium alloy on semiconductor substrate, and resulting structures

Washington, DC: U.S. Patent and Trademark Office.

CENTER FOR ADVANCED ELECTRONIC MATERIALS PROCESSING

PROCEEDINGS OF THE IEEE, 81(1), 42–59.

Conical rapid thermal processing apparatus

Washington, DC: U.S. Patent and Trademark Office.

Deposition of germanium thin films on silicon dioxide employing interposed polysilicon laye

Washington, DC: U.S. Patent and Trademark Office.

Germanium silicon dioxide gate MOSFET

Washington, DC: U.S. Patent and Trademark Office.

Selective germanium deposition on silicon and resulting structures

Washington, DC: U.S. Patent and Trademark Office.