Thomas Gehrke

Gallium nitride based high-electron mobility devices

Washington, DC: U.S. Patent and Trademark Office.

Method of manufacturing gallium nitride based high-electron mobility devices

Washington, DC: U.S. Patent and Trademark Office.

Pendeoepitaxial gallium nitride semiconductor layers on silicon carbide substrates

Washington, DC: U.S. Patent and Trademark Office.

Review of structured thin films in wide bandgap semiconductors: pendeo-epitaxy of GaN and AlGaN

[Review of ]. Journal of Nanophotonics, 2.

Methods of fabricating gallium nitride semiconductor layers by lateral growth into trenches

Washington, DC: U.S. Patent and Trademark Office.

Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates, and gallium nitride semiconductor structures fabricated thereby

Washington, DC: U.S. Patent and Trademark Office.

Methods of fabricating gallium nitride semiconductor layers on substrates including non-gallium nitride posts, and gallium nitride semiconductor structures fabricated thereby

Washington, DC: U.S. Patent and Trademark Office.

Gallium nitride materials including thermally conductive regions

Washington, DC: U.S. Patent and Trademark Office.

Methods of fabricating gallium nitride semiconductor layers on substrates including non-gallium nitride posts

Washington, DC: U.S. Patent and Trademark Office.

Second gallium nitride layers that extend into trenches in first gallium nitride layers

Washington, DC: U.S. Patent and Trademark Office.

Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates, and gallium nitride semiconductor structures fabricated thereby

Washington, DC: U.S. Patent and Trademark Office.

Gallium nitride materials and methods

Washington, DC: U.S. Patent and Trademark Office.

Gallium nitride semiconductor structures fabricated by pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on weak posts

Washington, DC: U.S. Patent and Trademark Office.

Methods of fabricating gallium nitride microelectronic layers on silicon layers

Washington, DC: U.S. Patent and Trademark Office.

Methods of fabricating gallium nitride semiconductor layers on substrates including non-gallium nitride posts, and gallium nitride semiconductor structures fabricated thereby

Washington, DC: U.S. Patent and Trademark Office.

Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates

Washington, DC: U.S. Patent and Trademark Office.

Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates, and gallium nitride semiconductor structures fabricated thereby

Washington, DC: U.S. Patent and Trademark Office.

High temperature pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on sapphire substrates

Washington, DC: U.S. Patent and Trademark Office.

Methods of fabricating gallium nitride semiconductor layers on substrates including non-gallium nitride posts

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming compound semiconductor layers using spaced trench arrays and semiconductor substrates formed thereby

Washington, DC: U.S. Patent and Trademark Office.

Pendeoepitaxial gallium nitride semiconductor layers on silicon carbide substrates

Washington, DC: U.S. Patent and Trademark Office.

Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on silicon carbide substrates by lateral growth from sidewalls of masked posts, ang gallium nitratde semiconductor structures fabricated thereby

Washington, DC: U.S. Patent and Trademark Office.

Pendeoepitaxial methods of fabricating gallium nitride semiconductor layers on weak posts, and gallium nitride semiconductor structures fabricated thereby

Washington, DC: U.S. Patent and Trademark Office.

Conventional and pendeo-epitaxial growth of GaN(0001) thin films on Si(111) substrates

Davis, R. F., Gehrke, T., Linthicum, K. J., Preble, E., Rajagopal, P., Ronning, C., … Mehregany, M. (2001, October). JOURNAL OF CRYSTAL GROWTH, Vol. 231, pp. 335–341.

Methods of fabricating gallium nitride microelectronic layers on silicon layers and gallium nitride microelectronic structures formed thereby

Washington, DC: U.S. Patent and Trademark Office.

Methods of fabricating gallium nitride semiconductor layers by lateral growth from sidewalls into trenches, and gallium nitride semiconductor structures fabricated thereby

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming a plurality of semiconductor layers using spaced trench arrays

Washington, DC: U.S. Patent and Trademark Office.

Pendeo-epitaxial growth and characterization of thin films of gallium nitride and related materials on SiC(0001) and si(111) substrates

Zeitschrift Fur MetallkundeAmerican Journal of Physiology, 92(2), 163–166.

Pendeo-epitaxial growth of thin films of gallium nitride and related materials and their characterization

Davis, R. F., Gehrke, T., Linthicum, K. J., Zheleva, T. S., Preble, E. A., Rajagopal, P., … Mehregany, M. (2001, May). JOURNAL OF CRYSTAL GROWTH, Vol. 225, pp. 134–140.

Pendeoepitaxial gallium nitride semiconductor layers on silicon carbide substrates

Washington, DC: U.S. Patent and Trademark Office.

Review of pendeo-epitaxial growth and characterization of thin films of GaN and AlGaN alloys on 6H-SiC(0001) and Si(111) substrates

MRS Internet Journal of Nitride Semiconductor Research, 6(14), 1–16.

Crystallinity and microstructures of aluminum nitride films deposited on Si(111) substrates

SOLID-STATE ELECTRONICS, 44(4), 747–755.

Influence of annealing conditions on dopant activation of Si+ and Mg+ implanted GaN

Materials Science Forum, 338(3), 1615–1618.

Ion implanted dopants in GaN and AlN: Lattice sites, annealing behavior, and defect recovery

JOURNAL OF APPLIED PHYSICS, 87(5), 2149–2157.

Lateral- and pendeo-epitaxial growth and defect reduction in GaN thin films

Materials Science Forum, 338(3), 1471–1476.

Pendeo-epitaxial growth and characterization of GaN and related materials on (6H-SiC(0001) and Si(111) substrates

MRS Internet Journal of Nitride Semiconductor Research, 5(2000), U46–57.

Pendeo-epitaxial growth of gallium nitride on silicon substrates

JOURNAL OF ELECTRONIC MATERIALS, 29(3), 306–310.

Pendeo-epitaxy (TM) process for aluminum gallium nitride thin films on silicon carbide substrates via metalorganic chemical vapor deposition

Materials Science Forum, 338(3), 1491–1494.

Photoluminescence characterization of Mg implanted GaN

MRS Internet Journal of Nitride Semiconductor Research, 5(2000), U622–628.

Characterization of Be-implanted GaN annealed at high temperatures

MRS Internet Journal of Nitride Semiconductor Research, 4S1(G3.17).

Charge redistribution at GaN-Ga2O3 interfaces: A microscopic mechanism for low defect density interfaces in remote plasma processed MOS devices prepared on polar GaN faces

Therrien, R., Niimi, H., Gehrke, T., Lucovsky, G., & Davis, R. (1999, September). MICROELECTRONIC ENGINEERING, Vol. 48, pp. 303–306.

Growth, doping and characterization of epitaxial thin films and patterned structures of AlN, GaN, and AlxGa1-xN

Hanser, A. D., Nam, O. H., Bremser, M. D., Thomson, D. B., Gehrke, T., Zheleva, T. S., & Davis, R. F. (1999, March). DIAMOND AND RELATED MATERIALS, Vol. 8, pp. 288–294.

Pendeo-epitaxy of gallium nitride and aluminum nitride films and heterostructures on silicon carbide substrate

MRS Internet Journal of Nitride Semiconductor Research, 4S1(G3.2).

Pendeo-epitaxy of gallium nitride thin films

Applied Physics Letters, 75(2), 196–198.

Pendeo-epitaxy: A new approach for lateral growth of gallium nitride structures

MRS Internet Journal of Nitride Semiconductor Research, 4S1(G3.38).

Process routes for low defect-density GaN on various substrates employing pendeo-epitaxial growth techniques

MRS Internet Journal of Nitride Semiconductor Research, 4S1(G4.9).

Ranges of deposition temperatures applicable for metalorganic vapor phase epitaxy of GaN films via the technique of pendeo- epitaxy

MRS Internet Journal of Nitride Semiconductor Research, 4S1(G3.37).

Phase difference measurement system

Washington, DC: U.S. Patent and Trademark Office.