Works (1)

Updated: July 5th, 2023 16:04

1997 journal article

The delay vernier pattern generation technique

IEEE JOURNAL OF SOLID-STATE CIRCUITS, 32(4), 551–562.

By: G. Moyer n, M. Clements n, W. Liu, T. Schaffer n & R. Cavin*

co-author countries: United States of America 🇺🇸
author keywords: delay circuits; delay-locked loops; delay verniers; signal generators; wave pipelining
Source: Web Of Science
Added: August 6, 2018

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