@article{zhou_dieffenderfer_aleem_lee_misra_2024, title={A Novel Monolithic MEMS Array for E-Nose Applications}, volume={8}, ISSN={["2475-1472"]}, url={https://doi.org/10.1109/LSENS.2024.3355902}, DOI={10.1109/LSENS.2024.3355902}, abstractNote={In this letter, we present a novel monolithic microelectromechanical syste-ms (MEMS) matrix array that can be adapted for electronic nose (E-nose) applications. The proposed MEMS array consists of four heater rows and four sensing electrode columns, arranged in crossbars and resulting in 16 intersections, which sit on top of suspended membranes created by frontside isotropic dry etching. Power supply, fine-tuning, and wireless communication are integrated on a custom printed circuit board. Thin films of metal oxide are deposited on this matrix array via atomic layer deposition. The achieved E-nose is low power, ultrasensitive, fast, scalable, reliable, and repeatable. It responds to different volatile organic compounds (VOCs) through the identification of optimal operating temperature. For nitrogen dioxide, ethanol, and carbon monoxide (CO), optimal temperatures and measured lower detection limits are ∼150 °C, 6.67 ppb, ∼250 °C, 50 ppb, and ∼350 °C, 1 ppm, respectively. Calculated theoretical detection limits are orders of magnitude lower. At optimal conditions, response/recovery time is <1 min. By tuning temperature profiles, this E-nose can inherently separate VOCs in mixtures. The proposed array is a versatile platform, compatible with back end of line complementary metal–oxide–semiconductor (CMOS) technology.}, number={2}, journal={IEEE SENSORS LETTERS}, author={Zhou, Yilu and Dieffenderfer, James and Aleem, Mahaboobbatcha and Lee, Bongmook and Misra, Veena}, year={2024}, month={Feb} }
 @article{zhou_dieffenderfer_sennik_aleem_speight_vasisht_oralkan_lee_misra_2023, title={Performance of A Monolithic E-Nose Array Integrating MEMS and ALD Processing}, ISSN={["1930-0395"]}, DOI={10.1109/SENSORS56945.2023.10325054}, abstractNote={We demonstrate a novel electronic nose (E-nose), which combines microelectromechanical systems (MEMS) and atomic layer deposition (ALD) technologies. MEMS micromachining creates a monolithic microheater array, consisting of independently controlled rows. By changing temperature profiles, a wide range of sensing surfaces are available. Sensor electrodes are arranged in crossbars with microheater rows. SnO2 thin film is deposited on this array as sensing materials by ALD. This E-nose demonstrates excellent fundamental operating characteristics such as speed and repeatability. It is ultra-sensitive against multiple volatile organic compounds (VOCs). It can also intrinsically separate VOC mixtures by tuning its operating modes.}, journal={2023 IEEE SENSORS}, author={Zhou, Yilu and Dieffenderfer, James and Sennik, Erdem and Aleem, Mahaboobbatcha and Speight, Jakob and Vasisht, Shrey and Oralkan, Omer and Lee, Bongmook and Misra, Veena}, year={2023} }
 @article{zhang_liu_gupta_isukapati_ashik_morgan_lee_sung_agarwal_fayed_2022, title={A 600V Half-Bridge Power Stage Fully Integrated with 25V Gate-Drivers in SiC CMOS Technology}, DOI={10.1109/MWSCAS54063.2022.9859305}, abstractNote={A 600V half-bridge power stage fully integrated with 25V gate-drivers is presented to demonstrate a new $0.5 \mu \mathrm{m}$ Silicon Carbide (SiC) CMOS technology. The technology allows for integrating low-voltage CMOS devices with multiple lateral high-voltage NMOS devices. Thus, multi-switch power converters or multiple power converters can be integrated along with their gate-drivers and low-voltage control circuits in the same SiC chip. The half-bridge power stage has two power switches with $500\mathrm{m} \Omega$ ON resistance, and it operates from a 600V input with up to 1A load and a switching frequency of 1MHz. The gate-drivers employ a capacitive level shifter and a bootstrap circuit to convert the PWM control signal from the 25V control domain to the 600V power domain. The gate-driver has a total delay of 36ns and provides a gate-driver signal with a slew rate of 23V/ns.}, journal={2022 IEEE 65TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS 2022)}, author={Zhang, Hua and Liu, Tianshi and Gupta, Utsav and Isukapati, Sundar Babu and Ashik, Emran and Morgan, Adam J. and Lee, Bongmook and Sung, Woongje and Agarwal, Anant K. and Fayed, Ayman}, year={2022} }
 @article{zhou_mohaddes_lee_rao_mills_curry_lee_misra_2022, title={A Wearable Electrocardiography Armband Resilient Against Artifacts}, volume={22}, ISSN={["1558-1748"]}, url={https://doi.org/10.1109/JSEN.2022.3197060}, DOI={10.1109/JSEN.2022.3197060}, abstractNote={Electrocardiography (ECG) is an essential technique to assess cardiovascular conditions and monitor physical activities. While the concept is mature, issues surrounding sampling convenience and device adoption as well as maintaining signal quality under artifacts remain a problem. In this article, we present a high-performing wearable ECG armband on the upper left arm. It is equipped with miniaturized hardware, capable of data storage and wireless communication. We evaluate different electrode configurations by conducting ECG measurements both at the static state and under motion and using improved algorithms to quantify data quality and assess the agreement between the proposed new technique and the gold standard. The optimal electrode position is determined by balancing wearable suitability and signal quality. We propose an electronic textile (E-textile) armband with improved design. It offers favorable wearing comfort and a fashionable appearance without sacrificing data quality. Its contact pressure is measured to get a better picture of intimacy and clothing comfort. Our system provides real-time and noise-resilient ECG data without interrupting daily life and can be implemented in use cases that warrant continuous ECG monitoring.}, number={19}, journal={IEEE SENSORS JOURNAL}, author={Zhou, Yilu and Mohaddes, Farzad and Lee, Courtney and Rao, Smriti and Mills, Amanda C. and Curry, Adam C. and Lee, Bongmook and Misra, Veena}, year={2022}, month={Oct}, pages={18970–18977} }
 @article{ashik_isukapati_zhang_liu_gupta_morgan_misra_sung_fayed_agarwal_et al._2022, title={Bias Temperature Instability on SiC n- and p-MOSFETs for High Temperature CMOS Applications}, ISSN={["1541-7026"]}, DOI={10.1109/IRPS48227.2022.9764565}, abstractNote={The circuit functionalities of Complementary Metal-Oxide-Semiconductor (CMOS) devices on 4H-SiC for digital and analog circuit applications beyond 200°C have been extensively studied, however, the reliability of the devices on SiC needs to be demonstrated due to the traps at/near the dielectric interface. In this report, the reliability of n- and p- Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) has been studied on three different gate oxide conditions – thick thermally grown, ultrathin thermal + thick CVD oxide and ultrathin thermal + thin CVD oxide in terms of their bias temperature instability (BTI) measurement. The MOSFETs were stressed at various constant bias voltages at 150°C and up to 105s. The threshold voltage shift due to positive bias on n-MOSFET is <0.5V after 105s at +25Vwhile p-MOSFET shows a larger shift of -1.9V shift after 105s at -25V and 150°C for ultrathin + thick CVD oxide. The report also establishes improvement in reliability of p-MOSFETs with ultrathin + CVD oxides over thermally grown oxides.}, journal={2022 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS)}, author={Ashik, Emran K. and Isukapati, Sundar B. and Zhang, Hua and Liu, Tianshi and Gupta, Utsav and Morgan, Adam J. and Misra, Veena and Sung, Woongje and Fayed, Ayman and Agarwal, Anant K. and et al.}, year={2022} }
 @article{liu_zhang_isukapati_ashik_morgan_lee_sung_fayed_white_agarwal_2022, title={SPICE Modeling and Circuit Demonstration of a SiC Power IC Technology}, volume={10}, ISSN={["2168-6734"]}, DOI={10.1109/JEDS.2022.3150364}, abstractNote={Silicon carbide (SiC) power integrated circuit (IC) technology allows monolithic integration of 600V lateral SiC power MOSFETs and low-voltage SiC CMOS devices. It enables application-specific SiC ICs with high power output and work under harsh (high-temperature and radioactive) environments compared to Si power ICs. This work presents the device characteristics, SPICE modeling, and SiC CMOS circuit demonstrations of the first two lots of the proposed SiC power IC technology. Level 3 SPICE models are created for the high-voltage lateral power MOSFETs and low-voltage CMOS devices. SiC ICs, such as the SiC CMOS inverter and ring oscillator, have been designed, packaged, and characterized. Proper operations of the circuits are demonstrated. The effects of the trapped interface charges on the characteristics of SiC MOSFETs and SiC ICs are also discussed.}, journal={IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY}, author={Liu, Tianshi and Zhang, Hua and Isukapati, Sundar Babu and Ashik, Emran and Morgan, Adam J. and Lee, Bongmook and Sung, Woongje and Fayed, Ayman and White, Marvin H. and Agarwal, Anant K.}, year={2022}, pages={129–138} }
 @article{isukapati_morgan_sung_zhang_liu_fayed_agarwal_ashik_lee_2021, title={Development of Isolated CMOS and HV MOSFET on an N- epi/P- epi/4H-SiC N+ Substrate for Power IC Applications}, DOI={10.1109/WiPDA49284.2021.9645134}, abstractNote={This paper reports the design and process flow of a fully integrated yet isolated low-voltage (LV) CMOS with high voltage (HV) lateral power MOSFET on a 6-inch 4H-SiC substrate for the development of HV SiC power ICs. The epi stack (N- epi/P- epi on N+ substrate) for the development of the power ICs was optimized to accommodate and isolate the HV devices and circuits from their LV counterparts. The devices reported in this work were fabricated at 150mm, production grade-Analog Devices Inc. (ADI) Hillview fabrication facility located in San Jose, CA. The HV lateral NMOSFET from this work demonstrated a breakdown voltage (BV) of 620V and a specific on-resistance (Ron,sp) of 9.73 mΩ·cm2 at gate-source voltage (Vgs) of 25V. A single gate oxide and ohmic process were used to fabricate the HV NMOS and LV CMOS devices and circuits. Junction isolation was implemented for isolating the HV and the LV blocks for the design of HV Power ICs. Finally, this work executed an HV capable three-metal layered back-end-of-the-line (BEOL) process, an imperative provision for developing reliable and robust power ICs. For future high-temperature applications, the static performances of the devices are characterized and are reported up to 200°C.}, journal={2021 IEEE 8TH WORKSHOP ON WIDE BANDGAP POWER DEVICES AND APPLICATIONS (WIPDA)}, author={Isukapati, Sundar Babu and Morgan, Adam J. and Sung, Woongje and Zhang, Hua and Liu, Tianshi and Fayed, Ayman and Agarwal, Anant K. and Ashik, Emran and Lee, Bongmook}, year={2021}, pages={118–122} }
 @article{latif_dieffenderfer_tanneeru_lee_misra_bozkurt_2021, title={Evaluation of Environmental Enclosures for Effective Ambient Ozone Sensing in Wrist-worn Health and Exposure Trackers}, ISSN={["1930-0395"]}, DOI={10.1109/SENSORS47087.2021.9639530}, abstractNote={The ambient environmental conditions, most notably ozone concentration, play a critical role in exacerbating asthma related symptoms. Wearable devices offer a great potential for asthma care and management by tracking health and environmental status. Wearable devices in the form factor of a wristband using ultra-low power ozone sensors can provide a localized, real-time, and vigilant monitoring of users’ ambient environment. This work presents a preliminary investigation of environmental enclosures for such a custom designed wrist-worn wearable device for asthma. Enclosure design plays an important role in ensuring optimal environmental and gas sensor operation. In this study, we studied openings along the sidewall of the wrist-worn device covered with commercially available expanded polytetrafluoroethylene-based membranes to provide the required air flow while ensuring resistance to water.}, journal={2021 IEEE SENSORS}, author={Latif, Tahmid and Dieffenderfer, James and Tanneeru, Akhilesh and Lee, Bongmook and Misra, Veena and Bozkurt, Alper}, year={2021} }
 @article{liu_zhang_isukapati_ashik_morgan_lee_sung_white_fayed_agarwal_2021, title={SPICE Modeling and CMOS Circuit Development of a SiC Power IC Technology}, ISSN={["1558-3899"]}, DOI={10.1109/MWSCAS47672.2021.9531903}, abstractNote={This paper presents the SPICE modeling and circuit development of a SiC power integrated circuit (IC) technology that offers monolithic integration of high-voltage lateral n-type SiC power metal-oxide-semiconductor field-effect transistors (MOSFETs) and low-voltage SiC complementary-MOS (CMOS) devices. The SPICE models are based on two-dimensional device simulations with the Sentaurus TCAD device simulator. With the developed SPICE models, this technology enables the design of application specific integrated circuits (ASICs) in SiC, such as fully integrated high-voltage SiC power converters, that can work in high temperature and radioactive environments. Circuit simulations of a SiC CMOS inverter and a SiC ring oscillator are included to demonstrate the technology.}, journal={2021 IEEE INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS)}, author={Liu, Tianshi and Zhang, Hua and Isukapati, Sundar Babu and Ashik, Emaran and Morgan, Adam J. and Lee, Bongmook and Sung, Woongje and White, Marvin H. and Fayed, Ayman and Agarwal, Anant K.}, year={2021}, pages={966–969} }
 @article{lee_lim_misra_2021, title={Wearable skin vapor sensing system for continuous monitoring of various health and lifestyles}, ISSN={["1930-0395"]}, DOI={10.1109/SENSORS47087.2021.9639471}, abstractNote={This work demonstrates a battery powered wearable monitoring system to measure the volatile organic compounds (VOCs) emanating from human skin. The portable system consists of gas sensors, Wi-Fi and Bluetooth enabled MCU, temperature and humidity sensors on a 33mm x 30mm PCB board. The developed system includes 5 sensors to detect and quantify the VOCs from skin as well as to measure the ambient VOC level. The results show that the developed system is able to distinguish the total VOCs between intermittent fasting and alcohol intake. This wearable sensing system enables detection of VOCs in real-time as well as monitoring of personalized VOC exposures for various lifestyles.}, journal={2021 IEEE SENSORS}, author={Lee, Bongmook and Lim, Michael and Misra, Veena}, year={2021} }
 @article{azam_tanneeru_lee_misra_2020, title={Engineering a Unified Dielectric Solution for AlGaN/GaN MOS-HFET Gate and Access Regions}, volume={67}, ISSN={["1557-9646"]}, url={https://doi.org/10.1109/TED.2020.2969394}, DOI={10.1109/TED.2020.2969394}, abstractNote={Typically GaN metal-oxide-semiconductor heterojunction-field-effect transistors (MOS-HFETs) have used two separate dielectrics for the gate and access regions. However, as this article shows, with proper gate-stack engineering, a unified dielectric solution can be achieved for the transistor. HfO<sub>2</sub> dielectrics were deposited by atomic layer deposition (ALD). Two types of oxidants were investigated, namely, water (H<sub>2</sub>O) and ozone (O<sub>3</sub>). It was found that MOS-HFETs with O<sub>3</sub> oxidant yielded lower threshold voltage (<inline-formula> <tex-math notation="LaTeX">${V}_{\text {TH}}$ </tex-math></inline-formula>) shifts, higher maximum drain current (<inline-formula> <tex-math notation="LaTeX">${I}_{\text {DS,max}}$ </tex-math></inline-formula>) of 340 mA/mm, 20% lower ON-resistance (<inline-formula> <tex-math notation="LaTeX">${R}_{ {\mathrm {\scriptscriptstyle {ON}}}}$ </tex-math></inline-formula>), higher peak transconductance at 112.66 mS/mm, lower hysteresis, and lower gate leakage (<inline-formula> <tex-math notation="LaTeX">${5.4} \times {10}^{-{6}}$ </tex-math></inline-formula> A/cm<sup>2</sup>) compared to water oxidant based MOS-HFETs with <inline-formula> <tex-math notation="LaTeX">${I}_{\text {DS},\text {max}}$ </tex-math></inline-formula> of 240 mA/mm, 81.38 mS/mm peak transconductance, and <inline-formula> <tex-math notation="LaTeX">${1.7} \times {10}^{-{4}}$ </tex-math></inline-formula> A/cm<sup>2</sup> gate leakage. DC/RF dispersion tests showed MOS-HFETs with O<sub>3</sub> oxidant had ~200<inline-formula> <tex-math notation="LaTeX">$\times $ </tex-math></inline-formula> better current collapse recovery. Temperature characterization and reliability test results, such as high-temperature reverse bias (HTRB), are published for the first time on ALD-HfO<sub>2</sub>/AlGaN/GaN MOS-HFETs using tetrakis(dimethylamino)hafnium (TDMAH) and O<sub>3</sub> precursor. Using an ozone oxidant provided more stability (i.e., less variability in <inline-formula> <tex-math notation="LaTeX">${R}_{ {\mathrm {\scriptscriptstyle {ON}}}}$ </tex-math></inline-formula> and <inline-formula> <tex-math notation="LaTeX">${V}_{\text {TH}}$ </tex-math></inline-formula>) as a function of temperature. Finally, when devices were electrically stressed in the OFF-state, the HTRB test showed minimal <inline-formula> <tex-math notation="LaTeX">${V}_{\text {TH}}$ </tex-math></inline-formula> drift (<0.5 V) in the case of O<sub>3</sub> oxidant versus much larger <inline-formula> <tex-math notation="LaTeX">${V}_{\text {TH}}$ </tex-math></inline-formula> drift (2.5 V) in the case of H<sub>2</sub>O oxidant.}, number={3}, journal={IEEE TRANSACTIONS ON ELECTRON DEVICES}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Azam, Faisal and Tanneeru, Akhilesh and Lee, Bongmook and Misra, Veena}, year={2020}, month={Mar}, pages={881–887} }
 @article{yang_lee_misra_2019, title={Effects of LaSiOx Thickness and Forming Gas Anneal Temperature on Threshold Voltage Instability of 4H-SiC MOSFETs With LaSiOx}, volume={66}, ISSN={["1557-9646"]}, url={https://doi.org/10.1109/TED.2018.2875094}, DOI={10.1109/TED.2018.2875094}, abstractNote={We report the effects of lanthanum-rich layer thickness and forming gas anneal (FGA) conditions on mobility and threshold voltage (<inline-formula> <tex-math notation="LaTeX">${V} _{{\text {T}}}$ </tex-math></inline-formula>) instability of high-mobility 4H-SiC MOSFETs using lanthanum silicate (LaSiO<sub><italic>x</italic></sub>) interface engineering. MOSFETs with LaSiO<sub><italic>x</italic></sub> after high-temperature FGA show significantly improved <inline-formula> <tex-math notation="LaTeX">${V} _{\text {T}}$ </tex-math></inline-formula> reliability under positive gate bias. It is found that both the thickness of the initial lanthanum-rich layer and the FGA temperature profoundly influence MOSFET mobility and <inline-formula> <tex-math notation="LaTeX">${V} _{\text {T}}$ </tex-math></inline-formula> instability under positive bias. There is a tradeoff between mobility and <inline-formula> <tex-math notation="LaTeX">${V} _{\text {T}}$ </tex-math></inline-formula> shift under positive bias.}, number={1}, journal={IEEE TRANSACTIONS ON ELECTRON DEVICES}, author={Yang, Xiangyu and Lee, Bongmook and Misra, Veena}, year={2019}, month={Jan}, pages={539–545} }
 @article{jiang_sung_baliga_wang_lee_huang_2018, title={Electrical Characteristics of 10-kV 4H-SiC MPS Rectifiers with High Schottky Barrier Height}, volume={47}, ISSN={["1543-186X"]}, DOI={10.1007/s11664-017-5812-2}, number={2}, journal={JOURNAL OF ELECTRONIC MATERIALS}, author={Jiang, Yifan and Sung, Woongje and Baliga, Jayant and Wang, Sizhen and Lee, Bongmook and Huang, Alex}, year={2018}, month={Feb}, pages={927–931} }
 @article{yang_lee_misra_2018, title={Improvement of Threshold Voltage Reliability of 4H-SiC MOSFETs With Lanthanum Silicate by High Temperature Forming Gas Anneal}, volume={39}, ISSN={["1558-0563"]}, DOI={10.1109/led.2017.2785851}, abstractNote={We report the effect of a high-temperature forming gas anneal (FGA) on the electrical characteristics and threshold voltage (V<sub>T</sub>) instability of high-mobility Si-face (0001) 4H-SiC metal oxide semiconductor field effect transistors (MOSFETs) with lanthanum silicate (LaSiO<sub>x</sub>). The MOSFET with LaSiO<sub>x</sub> after 800 °C FGA in 5% H<sub>2</sub> and 95% N<sub>2</sub> mixture shows significantly reduced V<sub>T</sub> shift under 3-MV/cm positive bias stressing from 2.78 to 1.65 V, while maintaining high field-effect mobility of 122.7 cm<sup>2</sup>/Vs and sufficiently positive V<sub>T</sub> of 2.76 V.}, number={2}, journal={IEEE ELECTRON DEVICE LETTERS}, author={Yang, Xiangyu and Lee, Bongmook and Misra, Veena}, year={2018}, month={Feb}, pages={244–247} }
 @article{lim_mills_lee_misra_2018, title={Investigation of O-3 Adsorption on Ultra-Thin ALD SnO2 by QCM}, volume={18}, ISSN={["1558-1748"]}, url={https://doi.org/10.1109/JSEN.2018.2815698}, DOI={10.1109/jsen.2018.2815698}, abstractNote={This paper investigates the properties of room temperature adsorption of O3 on ultra-thin ALD SnO2. Adsorption is characterized by gravimetric measurements on QCM and frequency shift is converted to mass calculations. Both Langmuir and Freundlich isotherm parameters are calculated for O3 on Au, as-deposited SnO2, and annealed SnO2. Of the samples, annealed SnO2 shows the greatest mass shift and calculated number of adsorption sites. The surface resistivity is estimated to transduce the adsorbed quantity into conductometric respsonse; $\mathrm {\Delta }{R}_{s}=4.037e5\,\,\mathrm {\Omega /sq}$ for an O3 saturated as-deposited ALD SnO2 surface and $\mathrm {\Delta }{R}_{s}=4.859e3\,\,\mathrm {\Omega /sq}$ for the annealed ALD SnO2.}, number={9}, journal={IEEE SENSORS JOURNAL}, author={Lim, Michael and Mills, Steven and Lee, Bongmook and Misra, Veena}, year={2018}, month={May}, pages={3590–3594} }
 @article{sarkar_mills_lee_pitts_misra_franzon_2018, title={On Using the Volatile Mem-Capacitive Effect of TiO2 Resistive Random Access Memory to Mimic the Synaptic Forgetting Process}, volume={47}, ISSN={["1543-186X"]}, DOI={10.1007/s11664-017-5914-x}, number={2}, journal={JOURNAL OF ELECTRONIC MATERIALS}, author={Sarkar, Biplab and Mills, Steven and Lee, Bongmook and Pitts, W. Shepherd and Misra, Veena and Franzon, Paul D.}, year={2018}, month={Feb}, pages={994–997} }
 @inproceedings{azam_lee_misra_2017, title={Optimization of ALD high-k gate dielectric to improve AlGaN/GaN MOS-HFET DC characteristics and reliability}, DOI={10.1109/wipda.2017.8170499}, abstractNote={This presents DC electrical characteristics and reliabilities of AlGaN/GaN metal-oxide-semiconductor heterojunction-field-effect transistors (MOS-HFETs) with HfO<inf>2</inf> gate dielectric deposited by atomic layer deposition (ALD). Two types of oxidants were investigated, namely, water (H<inf>2</inf>O) and ozone (O<inf>3</inf>) for the ALD deposition. The comparison study reveals that GaN MOSHFETs with O<inf>3</inf> oxidant results in overall better device performance and reliability than water based oxidant due to improved HfO<inf>2</inf>/GaN interface quality. For a 20nm ALD HfO<inf>2</inf> gate dielectric, MOS-HFET with O<inf>3</inf> oxidant has less threshold voltage (V<inf>TH</inf>) shift with respect to HFET (1.8V), higher transconductance (112.66 mS/mm), less on-resistance, and less gate leakage (5.4×10<sup>−6</sup> A/cm<sup>2</sup>) compared to MOS-HFET with water oxidant where V<inf>TH</inf> shift with respect to HFET is 9.15V, transconductance is 81.38 mS/mm and gate leakage is 1.7×10<sup>−4</sup> A/cm<sup>2</sup>. Moreover, significant improvement in device reliability (V<inf>TH</inf> shift is less than 0.5V) is observed with O<inf>3</inf> oxidant at high-temperature reverse bias (HTRB).}, booktitle={2017 IEEE 5th Workshop on Wide Bandgap Power Devices and Applications (WIPDA)}, author={Azam, F. and Lee, B. and Misra, Veena}, year={2017}, pages={39–43} }
 @article{yang_lee_misra_2016, title={Electrical Characteristics of SiO2 Deposited by Atomic Layer Deposition on 4H–SiC After Nitrous Oxide Anneal}, volume={63}, ISSN={0018-9383 1557-9646}, url={http://dx.doi.org/10.1109/TED.2016.2565665}, DOI={10.1109/ted.2016.2565665}, abstractNote={Properties of SiO<sub>2</sub> gate dielectric deposited by atomic layer deposition (ALD) on Si-face of 4H silicon carbide (SiC) were systematically studied. The interface state and effective fixed charge densities of ALD SiO<sub>2</sub> on n-type 4H–SiC with various post deposition anneal (PDA) conditions were evaluated. It has been found that nitrous oxide (N<sub>2</sub>O) PDA not only reduces the effective fixed charge density, which includes the fixed oxide charge and charged interface states, at SiC/SiO<sub>2</sub> interface but also decreases the gate leakage current. Negative effective fixed charge is observed at SiC/ALD SiO<sub>2</sub> interface after N<sub>2</sub>O PDA. ALD SiO<sub>2</sub>-based lateral n-channel MOSFETs show high threshold voltage with the promising field-effect mobility and the peak field-effect mobility increases with N<sub>2</sub>O PDA temperature.}, number={7}, journal={IEEE Transactions on Electron Devices}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Yang, Xiangyu and Lee, Bongmook and Misra, Veena}, year={2016}, month={Jul}, pages={2826–2830} }
 @article{dieffenderfer_goodell_mills_mcknight_yao_lin_beppler_bent_lee_misra_et al._2016, title={Low-Power Wearable Systems for Continuous Monitoring of Environment and Health for Chronic Respiratory Disease}, volume={20}, ISSN={2168-2194 2168-2208}, url={http://dx.doi.org/10.1109/JBHI.2016.2573286}, DOI={10.1109/jbhi.2016.2573286}, abstractNote={We present our efforts toward enabling a wearable sensor system that allows for the correlation of individual environmental exposures with physiologic and subsequent adverse health responses. This system will permit a better understanding of the impact of increased ozone levels and other pollutants on chronic asthma conditions. We discuss the inefficiency of existing commercial off-the-shelf components to achieve continuous monitoring and our system-level and nano-enabled efforts toward improving the wearability and power consumption. Our system consists of a wristband, a chest patch, and a handheld spirometer. We describe our preliminary efforts to achieve a submilliwatt system ultimately powered by the energy harvested from thermal radiation and motion of the body with the primary contributions being an ultralow-power ozone sensor, an volatile organic compounds sensor, spirometer, and the integration of these and other sensors in a multimodal sensing platform. The measured environmental parameters include ambient ozone concentration, temperature, and relative humidity. Our array of sensors also assesses heart rate via photoplethysmography and electrocardiography, respiratory rate via photoplethysmography, skin impedance, three-axis acceleration, wheezing via a microphone, and expiratory airflow. The sensors on the wristband, chest patch, and spirometer consume 0.83, 0.96, and 0.01 mW, respectively. The data from each sensor are continually streamed to a peripheral data aggregation device and are subsequently transferred to a dedicated server for cloud storage. Future work includes reducing the power consumption of the system-on-chip including radio to reduce the entirety of each described system in the submilliwatt range.}, number={5}, journal={IEEE Journal of Biomedical and Health Informatics}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Dieffenderfer, James and Goodell, Henry and Mills, Steven and McKnight, Michael and Yao, Shanshan and Lin, Feiyan and Beppler, Eric and Bent, Brinnae and Lee, Bongmook and Misra, Veena and et al.}, year={2016}, month={Sep}, pages={1251–1264} }
 @inproceedings{lim_malhotra_mills_muth_lee_misra_2016, title={Metal oxide gas sensing characterization by low frequency noise spectroscopy}, DOI={10.1109/icsens.2016.7808835}, abstractNote={This work demonstrates a new method for selective identification of low ppb concentrations of O3. Atomic layer deposited thin film SnO2 was used as a sensing layer. SnO2 sensitized quartz crystal microbalances (QCM) demonstrate expected mass loading behavior as well as unique frequency domain response towards synthetic air, O3, and NO2 at room temperature. Power spectral densities (PSD) of the response of each gas were calculated and contain peaks at different normalized frequencies. These PSD peaks are found to have significant differences in magnitude for each analyte and provide evidence of selective room temperature adsorption of gases on SnO2.}, booktitle={2016 ieee sensors}, author={Lim, M. and Malhotra, A. and Mills, S. and Muth, J. and Lee, B. and Misra, Veena}, year={2016} }
 @article{ramanan_lee_misra_2016, title={Physical understanding of trends in current collapse with atomic layer deposited dielectrics in AlGaN/GaN MOS heterojunction FETs}, volume={31}, ISSN={["1361-6641"]}, DOI={10.1088/0268-1242/31/3/035016}, abstractNote={Many passivation dielectrics are pursued for suppressing current collapse due to trapping/detrapping of access-region surface traps in AlGaN/GaN based metal oxide semiconductor heterojuction field effect transistors (MOS-HFETs). The suppression of current collapse can potentially be achieved either by reducing the interaction of surface traps with the gate via surface leakage current reduction, or by eliminating surface traps that can interact with the gate. But, the latter is undesirable since a high density of surface donor traps is required to sustain a high 2D electron gas density at the AlGaN/GaN heterointerface and provide a low ON-resistance. This presents a practical trade-off wherein a passivation dielectric with the optimal surface trap characteristics and minimal surface leakage is to be chosen. In this work, we compare MOS-HFETs fabricated with popular ALD gate/passivation dielectrics like SiO2, Al2O3, HfO2 and HfAlO along with an additional thick plasma-enhanced chemical vapor deposition SiO2 passivation. It is found that after annealing in N2 at 700 °C, the stack containing ALD HfAlO provides a combination of low surface leakage and a high density of shallow donor traps. Physics-based TCAD simulations confirm that this combination of properties helps quick de-trapping and minimal current collapse along with a low ON resistance.}, number={3}, journal={SEMICONDUCTOR SCIENCE AND TECHNOLOGY}, author={Ramanan, Narayanan and Lee, Bongmook and Misra, Veena}, year={2016}, month={Mar} }
 @inproceedings{tanneeru_mills_lim_mahmud_dieffenderfer_bozkurt_nagle_lee_misra_2016, title={Room temperature sensing of VOCS by atomic layer deposition of metal oxide}, DOI={10.1109/icsens.2016.7808786}, abstractNote={This work demonstrates room temperature sensing of volatile organic compound (VOC) — acetone via an ultrathin film metal oxide sensing layer. Atomic layer deposition (ALD) enables a high quality ultrathin film with precise thickness control. The 14nm ultrathin SnO2 thin film was deposited by ALD resulting in VOCs sensing at room temperature. The ultra-low power consumption (less than 50nW) and the room temperature operation of these devices make them compatible with wearable devices for real-time health and environment monitoring.}, booktitle={2016 ieee sensors}, author={TANNEERU, AKHILESH and Mills, S. and Lim, M. and Mahmud, M. M. and Dieffenderfer, J. and Bozkurt, A. and Nagle, T. and Lee, B. and Misra, V.}, year={2016} }
 @inproceedings{ji_lee_wang_misra_huang_2015, title={A new AlGaN/GaN power HFET employing partial deep trench drain structure for high voltage application}, DOI={10.1109/wipda.2015.7369277}, abstractNote={A new AlGaN/GaN heterojuction field effect transistor (HFET) employing the partial deep trench drain structure for high voltage application has been proposed and verified successfully to achieve low leakage current and small Rdson. In order to reduce leakage current and on-resistance of HFET devices, we propose a partial deep trench on drain edge adjacent to access region for the first time, which contributes to reducing the surface electric field under the off-state. In addition, trenched area under drain Ohmic metal enhances Ohmic contact on the surface of AlGaN layer which reduces contact resistivity of drain Ohmic contact. The proposed deep trench drain successfully reduces Ohmic contact resistance under the on-state and leakage current under the off-state at the same time.}, booktitle={WiPDA 2015 3rd IEEE Workshop on Wide Bandgap Power Devices and Applications}, author={Ji, I. H. and Lee, B. and Wang, S. Z. and Misra, Veena and Huang, A. Q.}, year={2015}, pages={147–149} }
 @article{ramanan_lee_misra_2015, title={ALD gate dielectrics for improved threshold voltage stability in AlGaN/GaN MOS-HFETs for power applications}, volume={30}, ISSN={["1361-6641"]}, DOI={10.1088/0268-1242/30/12/125017}, abstractNote={Dielectrics by atomic layer deposition (ALD) are sought after for fabricating AlGaN/GaN based metal oxide semiconductor heterojunction field effect transistors (MOS-HFETs) for power applications. The ideal gate dielectric is required to suppress gate leakage and minimize threshold voltage (VT) instability by hosting minimal interface traps. Additionally, with the need for an enhancement mode device, it is preferable if it minimizes VT shift in the negative direction. For the first time, we compare popular ALD dielectrics like SiO2, Al2O3, HfO2 and HfAlO with identical electrical thickness on AlGaN/GaN, thereby ensuring identical electrostatic conditions across different dielectrics. High-k ALD dielectrics (HfAlO, HfO2 and Al2O3) are found to suppress gate leakage but host a high density of interface traps with AlGaN, thereby resulting in significant VT instability. ALD SiO2 gate dielectric, annealed in N2 above 600 °C, is a promising gate dielectric candidate which provides the most stable and least negative shift in VT while also substantially suppressing gate leakage below that of an HFET.}, number={12}, journal={SEMICONDUCTOR SCIENCE AND TECHNOLOGY}, author={Ramanan, Narayanan and Lee, Bongmook and Misra, Veena}, year={2015}, month={Dec} }
 @article{ramanan_lee_misra_2015, title={Accurate characterization and understanding of interface trap density trends between atomic layer deposited dielectrics and AlGaN/GaN with bonding constraint theory}, volume={106}, ISSN={0003-6951 1077-3118}, url={http://dx.doi.org/10.1063/1.4922799}, DOI={10.1063/1.4922799}, abstractNote={Many dielectrics have been proposed for the gate stack or passivation of AlGaN/GaN based metal oxide semiconductor heterojunction field effect transistors, to reduce gate leakage and current collapse, both for power and RF applications. Atomic Layer Deposition (ALD) is preferred for dielectric deposition as it provides uniform, conformal, and high quality films with precise monolayer control of film thickness. Identification of the optimum ALD dielectric for the gate stack or passivation requires a critical investigation of traps created at the dielectric/AlGaN interface. In this work, a pulsed-IV traps characterization method has been used for accurate characterization of interface traps with a variety of ALD dielectrics. High-k dielectrics (HfO2, HfAlO, and Al2O3) are found to host a high density of interface traps with AlGaN. In contrast, ALD SiO2 shows the lowest interface trap density (<2 × 1012 cm−2) after annealing above 600 °C in N2 for 60 s. The trend in observed trap densities is subsequently explained with bonding constraint theory, which predicts a high density of interface traps due to a higher coordination state and bond strain in high-k dielectrics.}, number={24}, journal={Applied Physics Letters}, publisher={AIP Publishing}, author={Ramanan, Narayanan and Lee, Bongmook and Misra, Veena}, year={2015}, month={Jun}, pages={243503} }
 @article{lim_mills_lee_misra_2015, title={Application of AlGaN/GaN Heterostructures for Ultra-Low Power Nitrogen Dioxide Sensing}, volume={4}, ISSN={["2162-8769"]}, DOI={10.1149/2.0101510jss}, abstractNote={Ultra-low power room temperature NO2 sensors are demonstrated using AlGaN/GaN. The chemically stable semiconductor was sensitized to increase the sensitivity to enable ultra-low power, low ppb level detection without additional heaters. Sensors were sensitized by two methods, ultra-thin ALD SnO2 and surface enhancement by ICP-RIE in BCl3 gas. Both sensitization techniques demonstrate room temperature response, while the unsensitized sensors did not respond. At room temperature, surface enhanced sensors show a significant increase in sensitivity compared to SnO2 sensitized sensors. Sensitized sensors have fast response times and ultra-low power consumption to enable wearable monitoring systems with high spatial resolution of NO2. © The Author(s) 2015. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution Non-Commercial No Derivatives 4.0 License (CC BY-NC-ND, http://creativecommons.org/licenses/by-nc-nd/4.0/), which permits non-commercial reuse, distribution, and reproduction in any medium, provided the original work is not changed in any way and is properly cited. For permission for commercial reuse, please email: oa@electrochem.org. [DOI: 10.1149/2.0101510jss] All rights reserved.}, number={10}, journal={ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY}, author={Lim, Michael and Mills, Steven and Lee, Bongmook and Misra, Veena}, year={2015}, pages={S3034–S3037} }
 @article{mills_lim_lee_misra_2015, title={Atomic Layer Deposition of SnO2 for Selective Room Temperature Low ppb Level O-3 Sensing}, volume={4}, ISSN={["2162-8769"]}, DOI={10.1149/2.0111510jss}, abstractNote={This work demonstrates ultra-low power ozone sensors for real time, continuous, and portable monitoring. Atomic Layer Deposition (ALD) of SnO2 enables precise control of ultrathin film thickness on the order of the Debye length to enhance sensitivity at room temperature. Correlation between ozone concentration and the rate of resistance change is used to maintain fast response times and ultraviolet (UV) illumination hastens recovery. ALD SnO2 ultrathin film sensors realize room temperature operation with highly selective detection of 50 ppb ozone with average power consumption of 150 μW making them well suited for real time, portable environmental monitoring systems. © The Author(s) 2015. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution Non-Commercial No Derivatives 4.0 License (CC BY-NC-ND, http://creativecommons.org/licenses/by-nc-nd/4.0/), which permits non-commercial reuse, distribution, and reproduction in any medium, provided the original work is not changed in any way and is properly cited. For permission for commercial reuse, please email: oa@electrochem.org. [DOI: 10.1149/2.0111510jss] All rights reserved.}, number={10}, journal={ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY}, author={Mills, Steven and Lim, Michael and Lee, Bongmook and Misra, Veena}, year={2015}, pages={S3059–S3061} }
 @article{ramanan_lee_misra_2015, title={Comparison of Methods for Accurate Characterization of Interface Traps in GaN MOS-HFET Devices}, volume={62}, ISSN={["1557-9646"]}, DOI={10.1109/ted.2014.2382677}, abstractNote={Reliability of dielectrics is a critical concern in GaN metal-oxide-semiconductor-heterojunction-field-effect transistor (MOS-HFET) devices for use in high-voltage power and RF applications. Accurate characterization of interface traps is essential toward developing an understanding of the reliability issues associated with this system and to evaluate the effectiveness of different dielectrics proposed for use in the gate-stack or the passivation of the access regions. Using small-signal equivalent circuit models and TCAD simulations, it is found that conductance and capacitance methods for trap density estimation potentially have severely constrained detection limits and can probe only shallow traps. In contrast, a pulsed-IV method, used along with UV irradiation, can accurately detect a wide range of trap densities over the entire wide bandgap. The effectiveness of this method is also experimentally demonstrated using an AlGaN/GaN MOS-HFET device with HfAlO gate dielectric.}, number={2}, journal={IEEE TRANSACTIONS ON ELECTRON DEVICES}, author={Ramanan, Narayanan and Lee, Bongmook and Misra, Veena}, year={2015}, month={Feb}, pages={546–553} }
 @article{singamaneni_prater_nori_kumar_lee_misra_narayan_2015, title={Ferroelectric and magnetic properties of multiferroic BiFeO3-La0.7Sr0.3MnO3 heterostructures integrated with Si (100)}, volume={117}, ISSN={0021-8979 1089-7550}, url={http://dx.doi.org/10.1063/1.4913811}, DOI={10.1063/1.4913811}, abstractNote={We report on the electrical, ferroelectric, and magnetic properties of BiFeO3 (BFO)-La0.7Sr0.3MnO3 heterostructures deposited epitaxially onto Si(100) substrates. Temperature dependent (200–350 K) current-voltage (I-V), switching spectroscopy piezo-response force microscopy (SSPFM), and temperature dependent (5–300 K) anisotropic magnetization measurements have been performed. The BFO (100-nm thick)-based device structures were fabricated with a 250 nm thick La0.7Sr0.3MnO3 bottom electrode and 200 μm circular top Pt electrodes. I-V measurements performed at various temperatures indicated that the devices retained their as-deposited characteristics and exhibited non-leaky behavior up to at least 50 cycles. The temperature-dependent measurements showed clear diode-like behavior and resistive (hysteretic) switching behaviour. Characteristic butterfly loops (of several cycles) were observed in the PFM amplitude signals of the BFO film. In addition, the phase signal indicated a clear (180°) switching behavior at the switching voltage of 4–5 V, providing unambiguous evidence for the occurrence of ferroelectricity in BFO films integrated on Si (100). The temperature- and angle-dependent zero field cooled isothermal (5 K) magnetization measurements were consistent with the presence of uniaxial magnetic anisotropy. This work makes an important step for the fabrication of CMOS-compatible BFO devices for memory applications.}, number={17}, journal={Journal of Applied Physics}, publisher={AIP Publishing}, author={Singamaneni, Srinivasa Rao and Prater, J. T. and Nori, S. and Kumar, D. and Lee, Bongmook and Misra, V. and Narayan, J.}, year={2015}, month={May}, pages={17D908} }
 @article{misra_bozkurt_calhoun_jackson_jur_lach_lee_muth_oralkan_oeztuerk_et al._2015, title={Flexible Technologies for Self-Powered Wearable Health and Environmental Sensing}, volume={103}, ISSN={["1558-2256"]}, DOI={10.1109/jproc.2015.2412493}, abstractNote={This article provides the latest advances from the NSF Advanced Self-powered Systems of Integrated sensors and Technologies (ASSIST) center. The work in the center addresses the key challenges in wearable health and environmental systems by exploring technologies that enable ultra-long battery lifetime, user comfort and wearability, robust medically validated sensor data with value added from multimodal sensing, and access to open architecture data streams. The vison of the ASSIST center is to use nanotechnology to build miniature, self-powered, wearable, and wireless sensing devices that can enable monitoring of personal health and personal environmental exposure and enable correlation of multimodal sensors. These devices can empower patients and doctors to transition from managing illness to managing wellness and create a paradigm shift in improving healthcare outcomes. This article presents the latest advances in high-efficiency nanostructured energy harvesters and storage capacitors, new sensing modalities that consume less power, low power computation, and communication strategies, and novel flexible materials that provide form, function, and comfort. These technologies span a spatial scale ranging from underlying materials at the nanoscale to body worn structures, and the challenge is to integrate them into a unified device designed to revolutionize wearable health applications.}, number={4}, journal={PROCEEDINGS OF THE IEEE}, author={Misra, Veena and Bozkurt, Alper and Calhoun, Benton and Jackson, Thomas N. and Jur, Jesse S. and Lach, John and Lee, Bongmook and Muth, John and Oralkan, Oemer and Oeztuerk, Mehmet and et al.}, year={2015}, month={Apr}, pages={665–681} }
 @article{yang_lee_misra_2015, title={High Mobility 4H-SiC Lateral MOSFETs Using Lanthanum Silicate and Atomic Layer Deposited SiO2}, volume={36}, ISSN={["1558-0563"]}, DOI={10.1109/led.2015.2399891}, abstractNote={We report high mobility Si-face 4H-SiC MOSFET results via a novel interface engineering technique using a gate-stack consisting of lanthanum silicate (LaSiOx) and atomic layer deposited SiO2. Peak field effect mobility of 132.6 cm2/V · s has been achieved while maintaining a positive threshold voltage (3.1 V). From the peak field effect mobility's dependence on measurement temperatures, it has been found that the mobility of La containing MOSFET is limited by phonon scattering.}, number={4}, journal={IEEE ELECTRON DEVICE LETTERS}, author={Yang, Xiangyu and Lee, Bongmook and Misra, Veena}, year={2015}, month={Apr}, pages={312–314} }
 @article{yang_lee_misra_2015, title={Investigation of Lanthanum Silicate Conditions on 4H-SiC MOSFET Characteristics}, volume={62}, ISSN={0018-9383 1557-9646}, url={http://dx.doi.org/10.1109/TED.2015.2480047}, DOI={10.1109/ted.2015.2480047}, abstractNote={The lanthanum silicate interface engineering has been shown to dramatically improve the mobility of 4H-silicon carbide (SiC) MOSFETs. We studied the impact of post deposition annealing (PDA) conditions and the initial lanthanum oxide (La<sub>2</sub>O<sub>3</sub>) thickness on the MOSFET performance. The combination of 900 °C PDA and 1 nm La<sub>2</sub>O<sub>3</sub> leads to highest field-effect mobility. Higher PDA temperature leads to mobility reduction due to lower lanthanum concentration at the SiC/dielectric interface. The peak mobility and threshold voltage show strong dependence on the initial La<sub>2</sub>O<sub>3</sub> thickness.}, number={11}, journal={IEEE Transactions on Electron Devices}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Yang, Xiangyu and Lee, Bongmook and Misra, Veena}, year={2015}, month={Nov}, pages={3781–3785} }
 @inproceedings{misra_lee_manickam_lim_pasha_mills_bhansali_2015, title={Ultra-low power sensing platform for personal health and personal environmental monitoring}, DOI={10.1109/iedm.2015.7409687}, abstractNote={The vision of the NSF Center on Advanced Self-Powered Systems of Integrated Sensors and Technologies (ASSIST) is to develop nano-enabled technologies to achieve a paradigm shift towards long-term health and wellness management. To achieve this, the center is building self-powered, wearable and multimodal sensing systems for correlation of environmental exposures to physiological parameters. This paper presents the latest advances in environmental and personal health sensors that have ultra-low power consumption and are highly selective and sensitive to enable real time, continuous, and wearable platforms.}, booktitle={2015 IEEE International Electron Devices Meeting (IEDM)}, author={Misra, Veena and Lee, B. and Manickam, P. and Lim, M. and Pasha, S. K. and Mills, S. and Bhansali, S.}, year={2015} }
 @article{sarkar_lee_misra_2015, title={Understanding the gradual reset in Pt/Al2O3/Ni RRAM for synaptic applications}, volume={30}, ISSN={["1361-6641"]}, DOI={10.1088/0268-1242/30/10/105014}, abstractNote={In this work, a study has been performed to understand the gradual reset in Al2O3 resistive random-access memory (RRAM). Concentration of vacancies created during the forming or set operation is found to play a major role in the reset mechanism. The reset was observed to be gradual when a significantly higher number of vacancies are created in the dielectric during the set event. The vacancy concentration inside the dielectric was increased using a multi-step forming method which resulted in a diffusion-dominated gradual filament dissolution during the reset in Al2O3 RRAM. The gradual dissolution of the filament allows one to control the conductance of the dielectric during the reset. RRAM devices with gradual reset show excellent endurance and retention for multi-bit storage. Finally, the conductance modulation characteristics realizing synaptic learning are also confirmed in the RRAM.}, number={10}, journal={SEMICONDUCTOR SCIENCE AND TECHNOLOGY}, author={Sarkar, Biplab and Lee, Bongmook and Misra, Veena}, year={2015}, month={Oct} }
 @inproceedings{sarkar_lee_misra_2015, title={Understanding the influence of E-a and band-offset toward the conductance modulation in Al2O3 and HfO2 synaptic RRAM}, DOI={10.1109/drc.2015.7175599}, abstractNote={This work highlights the contribution of E<sub>a</sub> and band-offset toward conductance change in RRAM dielectrics. Both Al<sub>2</sub>O<sub>3</sub> and HfO<sub>2</sub> RRAM showed a gradual conductance change suitable for synaptic applications, and the lower E<sub>a</sub> of the dielectric helps in generating higher number of vacancies during set and higher band-offset of the dielectric limiting the TAT current during reset resulting in a higher conductance change in Al<sub>2</sub>O<sub>3</sub> RRAM compared to HfO<sub>2</sub> RRAM.}, booktitle={2015 73rd Annual Device Research Conference (DRC)}, author={Sarkar, B. and Lee, B. and Misra, Veena}, year={2015}, pages={149–150} }
 @inproceedings{ramanan_lee_misra_2014, title={A novel methodology using pulsed-IV for interface or border traps characterization on AlGaN/GaN MOSHFETs}, DOI={10.1109/ispsd.2014.6856052}, abstractNote={Characterization of traps at a dielectric/AlGaN interface is critical to evaluate the reliability of the dielectric for the gate stack or passivation of an AlGaN/GaN based MOS Heterojunction Field Effect Transistor (MOSHFET). In this work, we propose a new methodology for interface and border traps characterization using simple DC IV, CV and pulsed-IV measurements. Along with a generic UV lamp, we use this technique to characterize both shallow and deep trap concentrations across the entire AlGaN band gap. The resulting analysis of the ALD HfAlO/AlGaN interface reveals a high density of shallow traps (~7×10<sup>13</sup> cm<sup>-2</sup>.eV<sup>-1</sup>) and deep traps (10<sup>11</sup>-10<sup>12</sup> cm<sup>-2</sup>.eV<sup>-1</sup>) with a characteristic U-shape.}, booktitle={Proceedings of the international symposium on power semiconductor}, author={Ramanan, N. and Lee, B. and Misra, Veena}, year={2014}, pages={366–369} }
 @article{ramanan_lee_misra_2014, title={Device Modeling for Understanding AlGaN/GaN HEMT Gate-Lag}, volume={61}, ISSN={["1557-9646"]}, DOI={10.1109/ted.2014.2313814}, abstractNote={Using a simple simulation framework, it is shown that a passivation dielectric that minimizes surface leakage and creates a high density of shallow traps at the surface is vital to minimize the formation of the virtual gate and eliminate AlGaN/GaN HEMT gate-lag. Under large negative gate voltage, this is also expected to create higher fields and current crowding at the gate edge, promoting an increase in total gate leakage. While the AlGaN barrier properties are also found to impact gate-lag, the use of a passivation dielectric that minimizes surface leakage can overpower it's influence and suppress current collapse. Access region shrinking and the use of a longer gate are also found to improve gate-lag.}, number={6}, journal={IEEE TRANSACTIONS ON ELECTRON DEVICES}, author={Ramanan, Narayanan and Lee, Bongmook and Misra, Veena}, year={2014}, month={Jun}, pages={2012–2018} }
 @article{sarkar_ramanan_jayanti_di spigna_lee_franzon_misra_2014, title={Dual Floating Gate Unified Memory MOSFET With Simultaneous Dynamic and Non-Volatile Operation}, volume={35}, ISSN={["1558-0563"]}, DOI={10.1109/led.2013.2289751}, abstractNote={Dual floating gate flash memory has been fabricated and characterized to show dynamic operation, non-volatile operation, and simultaneous dynamic and non-volatile operation. The gate stack consists of a thin dielectric separating two floating gates sandwiched between a tunnel dielectric and interpoly dielectric. The quality of the thin dielectric that separates the floating gates is of utmost importance to retain dynamic operation. In this letter, we investigate a dual floating gate memory transistor and show its potential to combine DRAM and flash functionality in the same device.}, number={1}, journal={IEEE ELECTRON DEVICE LETTERS}, author={Sarkar, Biplab and Ramanan, Narayanan and Jayanti, Srikant and Di Spigna, Neil and Lee, Bongmook and Franzon, Paul and Misra, Veena}, year={2014}, month={Jan}, pages={48–50} }
 @article{kirkpatrick_lee_ramanan_misra_2014, title={Flash MOS-HFET operational stability for power converter circuits}, volume={11}, ISSN={["1862-6351"]}, DOI={10.1002/pssc.201300547}, abstractNote={Abstract}, number={3-4}, journal={PHYSICA STATUS SOLIDI C: CURRENT TOPICS IN SOLID STATE PHYSICS, VOL 11, NO 3-4}, author={Kirkpatrick, Casey and Lee, Bongmook and Ramanan, Narayanan and Misra, Veena}, year={2014}, pages={875–878} }
 @article{yang_lee_misra_2014, title={High Mobility 4H-SiC MOSFETs Using Lanthanum Silicate Interface Engineering and ALD Deposited SiO2}, volume={778-780}, ISBN={["*****************"]}, ISSN={["0255-5476"]}, DOI={10.4028/www.scientific.net/msf.778-780.557}, abstractNote={In this work, we have developed a novel gate stack to enhance the mobility of Si face (0001) 4H-SiC lateral MOSFETs while maintaining a high threshold voltage. The gate dielectric consists a thin lanthanum silicate layer at SiC/dielectric interface and SiO2deposited by atomic layer deposition. MOSFETs using this interface engineering technique show a peak field effect mobility of 133.5 cm2/Vs while maintaining a positive threshold voltage of above 3V. The interface state density measured on MOS capacitor with lanthanum silicate interfacial layers is reduced compared to the capacitors without the silicate. It is shown that the presence of the lanthanum at the interface reduces the formation of a lower quality SiOxinterfacial layer typically formed at the SiC surface during typical high temperature anneals. This better quality interfacial layer produces a sharp SiC/dielectric interface, which is confirmed by cross section Z-contrast STEM images.}, journal={SILICON CARBIDE AND RELATED MATERIALS 2013, PTS 1 AND 2}, author={Yang, Xiangyu and Lee, Bongmook and Misra, Veena}, year={2014}, pages={557–561} }
 @inproceedings{ji_lee_wang_misra_huang_choi_2014, title={High voltage AlGaN/GaN HFET employing low taper angle field-plate for stable forward blocking capability}, DOI={10.1109/ispsd.2014.6856028}, abstractNote={A new high voltage AlGaN/GaN heterojuction field effect transistor (HFET) employing low taper angle field-plate (LTA-FP) has been proposed and verified experimentally to achieve stable forward blocking capability with low leakage current. Proposed device with a LTA-FP of 10 degrees, fabricated by adopting a new taper etching process, exhibits stable forward blocking capability with low leakage current (2 orders of magnitude smaller) under repetitive high voltage stress, whereas the conventional device with steep FP of 70 degree shows that unstable behavior under the same stress. These experimental results indicate that the proposed LTA-FP suppresses the electric field concentration at the gate edge successfully and is an effective approach to secure the stable blocking characteristics of GaN based high voltage devices.}, booktitle={Proceedings of the international symposium on power semiconductor}, author={Ji, I. H. and Lee, B. M. and Wang, S. Z. and Misra, Veena and Huang, A. Q. and Choi, Y. H.}, year={2014}, pages={269–272} }
 @inproceedings{sarkar_lee_misra_2014, title={Implications of lower zero-field activation energy of dielectric in Al2O3/HfO2 bi-layer dielectric RRAM forming process}, volume={64}, number={14}, booktitle={Nonvolatile memories 3}, author={Sarkar, B. and Lee, B. and Misra, V.}, year={2014}, pages={41–46} }
 @article{lee_choi_kirkpatrick_huang_misra_2013, title={Improved high-temperature device transport properties and off-state characteristics of AlGaN/GaN power devices with atomic layer deposition (ALD) HfAlO high-k dielectric}, volume={28}, ISSN={["1361-6641"]}, DOI={10.1088/0268-1242/28/7/074016}, abstractNote={The effect of the atomic layer deposition (ALD) HfAlO high-k dielectric on device transport properties and breakdown characteristics of an AlGaN/GaN metal–oxide–semiconductor hetero-junction field-effect transistor (MOS-HFET) was evaluated based on temperature-dependent measurements. It was found that the MOS-HFET device with a HfAlO gate dielectric shows high-channel mobility greater than the Schottky HFET device for the measured temperature range (25–150 °C). In the case of off-state breakdown characteristics, the MOS-HFET device greatly suppressed gate leakage currents for measured temperatures (25–200 °C) resulting in improvements in off-state breakdown characteristics. In contrast, large gate/drain leakage currents were observed for the Schottky HFET device at high temperature (>100 °C) resulting in about 200 V of breakdown voltage reduction. It was also found that the ALD HfAlO layer reduced surface leakage current by passivating the GaN surface effectively. Therefore, the MOS-HFET structure with the HfAlO gate dielectric is very attractive for GaN-based high-power and high-temperature device applications.}, number={7}, journal={SEMICONDUCTOR SCIENCE AND TECHNOLOGY}, author={Lee, B. and Choi, Y. H. and Kirkpatrick, C. and Huang, A. Q. and Misra, V.}, year={2013}, month={Jul} }
 @inproceedings{sarkar_jayanti_spigna_lee_misra_franzon_2013, title={Investigation of intermediate dielectric for dual floating gate MOSFET}, DOI={10.1109/nvmts.2013.6851052}, abstractNote={A dual floating gate transistor offers potential as a unified memory, with simultaneous volatile and non-volatile storage. The quality of the dielectric between the two floating gates is critical to achieving the required dynamic cycle endurance. This paper reports on the results of early experiments into the material choice and process for this dielectric.}, booktitle={2013 13th Non-Volatile Memory Technology Symposium (NVMTS)}, author={Sarkar, B. and Jayanti, S. and Spigna, N. Di and Lee, B. and Misra, V. and Franzon, Paul}, year={2013} }
 @article{ramanan_lee_kirkpatrick_suri_misra_2013, title={Properties of atomic layer deposited dielectrics for AlGaN/GaN device passivation}, volume={28}, ISSN={["1361-6641"]}, DOI={10.1088/0268-1242/28/7/074004}, abstractNote={In order to minimize ac–dc dispersion, reduce gate leakage and maximize ac transconductance, there is a critical need to identify optimal interfaces, low-k passivation dielectrics and high-k gate dielectrics. In this paper, an investigation of different atomic layer deposited (ALD) passivation dielectrics on AlGaN/GaN-based hetero-junction field effect transistors (HFETs) was performed. Angle-resolved x-ray photoelectron spectroscopy revealed that HCl/HF and NH4OH cleans resulted in a reduction of native oxide and carbon levels at the GaN surface. The role of high temperature anneals, following the ALD, on the effectiveness of passivation was also explored. Gate-lag measurements on HFETs passivated with a thin ALD high-k Al2O3 or HfAlO layer capped with a thick plasma enhanced chemical vapor deposited (PECVD) low-k SiO2 layer, annealed at 600–700 °C, were found to be as good as or even better than those with conventional PECVD silicon nitride passivation. Further, it was observed that different passivation dielectric stacks required different anneal temperatures for improved gate-lag behavior compared to the as-deposited case.}, number={7}, journal={SEMICONDUCTOR SCIENCE AND TECHNOLOGY}, author={Ramanan, Narayanan and Lee, Bongmook and Kirkpatrick, Casey and Suri, Rahul and Misra, Veena}, year={2013}, month={Jul} }
 @article{kirkpatrick_lee_suri_yang_misra_2012, title={Atomic Layer Deposition of SiO2 for AlGaN/GaN MOS-HFETs}, volume={33}, ISSN={["1558-0563"]}, DOI={10.1109/led.2012.2203782}, abstractNote={This letter investigates the electrical properties of SiO<sub>2</sub> gate dielectric on GaN heterostructures deposited by atomic layer deposition (ALD). ALD SiO<sub>2</sub> has a dielectric constant of 3.9 and a bandgap of 8.8 eV. ALD SiO<sub>2</sub> provides a good interface to GaN and minimizes the interfacial layer growth. The threshold voltage of metal-oxide-semiconductor heterojunction field-effect transistors with ALD SiO<sub>2</sub> dielectric is -1.5 V, owing to a fixed charge concentration of -1.6 × 10<sup>12</sup> cm<sup>-2</sup>. It was also found that devices with ALD SiO<sub>2</sub> dielectric exhibit three orders of magnitude reduction in gate leakage current compared to conventional Schottky gate HFETs.}, number={9}, journal={IEEE ELECTRON DEVICE LETTERS}, author={Kirkpatrick, Casey J. and Lee, Bongmook and Suri, Rahul and Yang, Xiangyu and Misra, Veena}, year={2012}, month={Sep}, pages={1240–1242} }
 @article{kaushal_iniguez-de-la-torre_gonzalez_mateos_lee_misra_margala_2012, title={Effects of a High-k Dielectric on the Performance of III-V Ballistic Deflection Transistors}, volume={33}, ISSN={["1558-0563"]}, DOI={10.1109/led.2012.2197669}, abstractNote={This letter presents a first successful integration of a high-k dielectric, i.e., Al2O3, with III-V semiconductors in ballistic deflection transistors (BDTs). The Al2O3 is deposited using atomic layer deposition, which allows the formation of uniform layers along the walls of etched trenches. The BDT transfer characteristic shows strong dependence on the dielectric permittivity of the material filling the etched trenches. When Al2O3 is deposited in the trenches, the transconductance of the BDT is enhanced and shifted to lower gate bias. Moreover, the ratio between output and leakage currents was also enhanced.}, number={8}, journal={IEEE ELECTRON DEVICE LETTERS}, author={Kaushal, Vikas and Iniguez-de-la-Torre, Ignacio and Gonzalez, Tomas and Mateos, Javier and Lee, Bongmook and Misra, Veena and Margala, Martin}, year={2012}, month={Aug}, pages={1120–1122} }
 @article{lee_kirkpatrick_choi_yang_huang_misra_2012, title={Normally-off AlGaN/GaN MOSHFET using ALD SiO2 tunnel dielectric and ALD HfO2 charge storage layer for power device application}, volume={9}, ISSN={["1862-6351"]}, DOI={10.1002/pssc.201100422}, abstractNote={Abstract}, number={3-4}, journal={PHYSICA STATUS SOLIDI C: CURRENT TOPICS IN SOLID STATE PHYSICS, VOL 9, NO 3-4}, author={Lee, Bongmook and Kirkpatrick, Casey and Choi, Young-hwan and Yang, Xiangyu and Huang, Alex Q. and Misra, Veena}, year={2012}, pages={868–870} }
 @article{kirkpatrick_lee_choi_huang_misra_2012, title={Threshold voltage stability comparison in AlGaN/GaN FLASH MOS-HFETs utilizing charge trap or floating gate charge storage}, volume={9}, ISSN={["1862-6351"]}, DOI={10.1002/pssc.201100421}, abstractNote={Abstract}, number={3-4}, journal={PHYSICA STATUS SOLIDI C: CURRENT TOPICS IN SOLID STATE PHYSICS, VOL 9, NO 3-4}, author={Kirkpatrick, Casey and Lee, Bongmook and Choi, YoungHwan and Huang, Alex and Misra, Veena}, year={2012}, pages={864–867} }
 @article{jeff_yun_ramalingam_lee_misra_triplett_gangopadhyay_2011, title={Charge storage characteristics of ultra-small Pt nanoparticle embedded GaAs based non-volatile memory}, volume={99}, ISSN={["0003-6951"]}, DOI={10.1063/1.3625426}, abstractNote={Charge storage characteristics of ultra-small Pt nanoparticle embedded devices were characterized by capacitance-voltage measurements. A unique tilt target sputtering configuration was employed to produce highly homogenous nanoparticle arrays. Pt nanoparticle devices with sizes ranging from ∼0.7 to 1.34 nm and particle densities of ∼3.3–5.9 × 1012 cm−2 were embedded between atomic layer deposited and e-beam evaporated tunneling and blocking Al2O3 layers. These GaAs-based non-volatile memory devices demonstrate maximum memory windows equivalent to 6.5 V. Retention characteristics show that over 80% charged electrons were retained after 105 s, which is promising for device applications.}, number={7}, journal={APPLIED PHYSICS LETTERS}, author={Jeff, R. C., Jr. and Yun, M. and Ramalingam, B. and Lee, B. and Misra, V. and Triplett, G. and Gangopadhyay, S.}, year={2011}, month={Aug} }
 @article{lee_lichtenwalner_novak_misra_2011, title={Impact of AlTaO Dielectric Capping on Device Performance and Reliability for Advanced Metal Gate/High-k PMOS Application}, volume={58}, ISSN={["1557-9646"]}, DOI={10.1109/ted.2011.2160064}, abstractNote={We have investigated the effect of ultrathin Al-Ta-based capping layers on HfO2 and experimentally demonstrated that, with proper Al and Ta composition, an AlTaO capping layer is a good candidate dielectric for PMOSFET devices. Lower threshold voltage and significantly improved mobility were observed with AlTaO capping without degrading the dielectric properties. The addition of Ta in an AlTaO structure produces d-states in the Al2O3 matrix, resulting in an additional VT shift toward the PMOS band edge. This AlTaO capping layer not only modulates the device VT suitably for PMOS applications but also retards Al diffusion through the HfO2 layer, preventing Al-caused mobility degradation. Furthermore, the incorporation of a capping layer can improve reliability characteristics during the negative bias stress.}, number={9}, journal={IEEE TRANSACTIONS ON ELECTRON DEVICES}, author={Lee, Bongmook and Lichtenwalner, Daniel J. and Novak, Steven R. and Misra, Veena}, year={2011}, month={Sep}, pages={2928–2935} }
 @article{lee_novak_lichtenwalner_yang_misra_2011, title={Investigation of the Origin of V-T/V-FB Modulation by La2O3 Capping Layer Approaches for NMOS Application: Role of La Diffusion, Effect of Host High-k Layer, and Interface Properties}, volume={58}, ISSN={["1557-9646"]}, DOI={10.1109/ted.2011.2159306}, abstractNote={The role of La<sub>2</sub>O<sub>3</sub> capping in the <i>VT</i>/<i>V</i><sub>FB</sub> shift with various high- <i>k</i> and metal gate electrodes was systematically investigated. It was found that the La concentration at the high-<i>k</i>/SiO<sub>2</sub> interface is mainly responsible for the <i>VT</i>/<i>V</i><sub>FB</sub> modulation in NMOS devices, whereas the effect of the host high-<i>k</i> and gate electrodes on <i>VT</i>/<i>V</i><sub>FB</sub> is minimal. A 400-mV shift in <i>VT</i> from the control HfO<sub>2</sub> device with minimal degradation in mobility was obtained when a La<sub>2</sub>O<sub>3</sub> layer was inserted between the high-<i>k</i> and SiO<sub>2</sub> layers. It was also found that the incorporation of La<sub>2</sub>O<sub>3</sub> in the dielectric stack improves device reliability in terms of breakdown and positive-bias temperature instability characteristics. The main key for the <i>V</i><sub>FB</sub> shift is the ability of La diffusion through the host high-<i>k</i> material.}, number={9}, journal={IEEE TRANSACTIONS ON ELECTRON DEVICES}, author={Lee, Bongmook and Novak, Steven R. and Lichtenwalner, Daniel J. and Yang, Xiangyu and Misra, Veena}, year={2011}, month={Sep}, pages={3106–3115} }
 @article{kirkpatrick_lee_yang_misra_wetzel_khan_2011, title={Performance improvement of AlGaN/GaN high electron mobility transistors with atomic layer deposition (ALD) of SiO2 and HfAlO dielectrics}, volume={8}, ISSN={["1862-6351"]}, DOI={10.1002/pssc.201001064}, abstractNote={Abstract}, number={7-8}, journal={PHYSICA STATUS SOLIDI C: CURRENT TOPICS IN SOLID STATE PHYSICS, VOL 8, NO 7-8}, author={Kirkpatrick, Casey and Lee, Bongmook and Yang, Xiangyu and Misra, Veena and Wetzel, C and Khan, A}, year={2011} }
 @inproceedings{lee_kirkpatrick_yang_jayanti_suri_roberts_misra_2010, title={Normally-off AlGaN/GaN-on-Si MOSHFETs with TaN floating gates and ALD SiO2 tunnel dielectrics}, DOI={10.1109/iedm.2010.5703401}, abstractNote={In this work, we have demonstrated a normally-off AlGaN/GaN metal-oxide semiconductor heterojunction field effect transistor (MOSHFET) wherein the enhancement mode operation is enabled by charge storage within a metal floating gate embedded in a dielectric stack and negative charges in the tunnel oxide. By combining ALD SiO2 and TaN floating gate (FG), up to 6V of VT shift after pulse programming (corresponding ∼ 1.2×1013 charges/cm2 stored within the FG) is obtained which results in a normally-off device with low gate leakage and good transconductance.}, booktitle={2010 international electron devices meeting - technical digest}, author={Lee, B. and Kirkpatrick, C. and Yang, X. Y. and Jayanti, S. and Suri, R. and Roberts, J. and Misra, Veena}, year={2010} }
 @article{novak_lee_yang_misra_2010, title={Platinum Nanoparticles Grown by Atomic Layer Deposition for Charge Storage Memory Applications}, volume={157}, ISSN={["1945-7111"]}, DOI={10.1149/1.3365031}, abstractNote={This paper explores platinum nanoparticle formation during the early stages of growth by atomic layer deposition. Particle size and distribution can be controlled by altering growth parameters. The particles show excellent temperature stability up to 900°C as examined by transmission electron microscopy and in situ heating. Capacitance-voltage and charge retention measurements demonstrate the memory effect in metal-oxide-semiconductor capacitors with embedded nanoparticles. The size, density, charge storage, and temperature stability of the platinum nanoparticles make them attractive for use as charge storage layers for nonvolatile memory devices.}, number={6}, journal={JOURNAL OF THE ELECTROCHEMICAL SOCIETY}, author={Novak, Steven and Lee, Bongmook and Yang, Xiangyu and Misra, Veena}, year={2010}, pages={H589–H592} }
 @article{suri_lee_lichtenwalner_biswas_misra_2008, title={Electrical characteristics of metal-oxide-semiconductor capacitors on p-GaAs using atomic layer deposition of ultrathin HfAlO gate dielectric}, volume={93}, ISSN={["0003-6951"]}, DOI={10.1063/1.3007978}, abstractNote={Properties of ultrathin HfAlO gate dielectrics on sulfur-passivated p-GaAs were investigated using capacitance-voltage and current-voltage measurement techniques and angle-resolved x-ray photoelectron spectroscopy. By optimizing the individual layer thickness of atomic-layer deposited Al2O3 and HfO2 and the postdeposition anneal (PDA) conditions, a low equivalent oxide thickness of 1.6 nm, low gate leakage of 2.6×10−3 A/cm2 at Vg=Vfb−1 V, and excellent frequency dispersion characteristics were obtained. No interfacial As–O bonding and only a small amount of Ga–O bonding were detected after PDA at 500 °C. These results reveal a good quality dielectric interface on GaAs without an additional interface passivation layer.}, number={19}, journal={APPLIED PHYSICS LETTERS}, author={Suri, Rahul and Lee, Bongmook and Lichtenwalner, Daniel J. and Biswas, Nivedita and Misra, Veena}, year={2008}, month={Nov} }
 @article{chen_lee_sarkar_gowda_misra_2007, title={A molecular memory device formed by HfO2 encapsulation of redox-active molecules}, volume={91}, ISSN={["0003-6951"]}, DOI={10.1063/1.2800824}, abstractNote={Solid state metal-insulator-molecule-metal (MIMM) devices were fabricated by encapsulating a redox-active molecular layer between a metal substrate and a dielectric thin film of atomic layer deposition (ALD) hafnium dioxide (HfO2). Redox properties of molecules are preserved after atomic layer deposition. The leakage current of devices is greatly improved by incorporating the ALD HfO2 thin layer. Capacitance measurements of these MIMM devices show a large frequency dispersion indicating the charging and discharging of the molecular layer.}, number={17}, journal={APPLIED PHYSICS LETTERS}, author={Chen, Zhong and Lee, Bongmook and Sarkar, Smita and Gowda, Srivardhan and Misra, Veena}, year={2007}, month={Oct} }
 @article{lee_biswas_novak_misra_2007, title={Characteristics of Ni/Gd FUSI for NMOS gate electrode applications}, volume={28}, ISSN={["1558-0563"]}, DOI={10.1109/LED.2007.897889}, abstractNote={This letter investigates the work function tuning of nickel/gadolinium (Ni/Gd) fully silicided (FUSI) gate electrodes on HfSiOx dielectrics. It was found that as the percentage of Gd in the Ni/Gd increased from 10% to 30%, the effective work function value after a one-step 450-degC FUSI anneal decreased from 4.75 to 4.35 eV. In addition, the presence of Gd also resulted in lowering of equivalent oxide thickness (EOT) values. The mechanism for a decreased EOT is attributed to the reduction of low-kappa interfacial layers by the presence of Gd in the gate stack. The decrease in work function is attributed to the creation of oxygen vacancies within the high-kappa layer created by the presence of Gd layer.}, number={7}, journal={IEEE ELECTRON DEVICE LETTERS}, author={Lee, Bongmook and Biswas, Nivedita and Novak, Steven R. and Misra, Veena}, year={2007}, month={Jul}, pages={555–557} }
 @article{chen_jha_lazar_biswas_lee_lee_wielunski_garfunkel_misra_2006, title={Influence of oxygen diffusion through capping layers of low work function metal gate electrodes}, volume={27}, ISSN={["1558-0563"]}, DOI={10.1109/LED.2006.871184}, abstractNote={This letter evaluates Ru and W capping layers for MoTa metal gate electrodes in MOS capacitor applications. The authors report that the oxygen diffusion from the capping layer plays an important role in determining the MoTa alloy effective work function value on SiO/sub 2/. A MoTa alloy metal gate with Ru capping exhibits stable effective work function up to 900/spl deg/C annealing but is not stable with W capping. Auger electron spectroscopy and Rutherford backscattering spectroscopy analyses show minimal oxygen diffusion into MoTa gate stacks with Ru capping while severe oxygen diffusion into the gate is observed with W capping metal after 900/spl deg/C annealing. Current-voltage analysis also demonstrates different barrier heights of MoTa on SiO/sub 2/ with Ru or W capping layer after 900/spl deg/C annealing, confirming the effective work function value change.}, number={4}, journal={IEEE ELECTRON DEVICE LETTERS}, author={Chen, B and Jha, R and Lazar, H and Biswas, N and Lee, J and Lee, B and Wielunski, L and Garfunkel, E and Misra, V}, year={2006}, month={Apr}, pages={228–230} }