Josh Stevens

College of Engineering

Works (2)

Updated: April 5th, 2024 15:41

2023 article

Chiplet Set For Artificial Intelligence

2023 IEEE INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE, 3DIC.

By: J. Stevens n, T. Pan n, P. Ravichandiran n & P. Franzon n 

author keywords: ASIP; chiplet; AI accelerator; AIB
TL;DR: This paper presents a chipletized design used for Artificial Intelligence, which details a scalable AI chiplet set, along with Central Processing Units (CPUs), and focuses on phase one, which uses the United Semiconductor Japan Co. (USJC) 55 nm LP process to fabricate the design. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: August 14, 2023

2021 article

Design for 3D Stacked Circuits

2021 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM).

By: P. Franzon n , W. Davis n, E. Rotenberg n, J. Stevens n, S. Lipa n, T. Nigussie n, H. Pan  n, L. Baker n ...

TL;DR: 2.5D and 3D technologies can give rise to a node equivalent of scaling due to improved connectivity because of improved connectivity, but design issues that need to be addressed in pursuing such exploitations include thermal management, design for test and computer aided design. (via Semantic Scholar)
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Sources: Web Of Science, NC State University Libraries
Added: July 11, 2022

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