Works (12)
1998 article
Evaluation Of 2.0 nm Grown and Deposited Dielectrics in 0.1 μm PMOSFETs
Srivastava, A., Heinisch, H. H., Vogel, E., Parker, C., Osburn, C. M., Masnari, N. A., … Hauser, J. R. (1998, January 1). MRS Proceedings.
Ed(s):
1998 conference paper
Evaluation and comparison of 3.0 nm gate-stack dielectrics for tenth-micron technology NMOSFETs
Rapid thermal and integrated processing VII: Symposium held April 13-15, 1998, San Francisco, California, U.S.A. (Materials Research Society symposium proceedings ; v.525), 157–162. Warrendale, Pennsylvania: Materials Research Society.
Ed(s):
1998 article
Parasitic Resistance Considerations of Using Elevated Source/Drain Technology for Deep Submicron Metal Oxide Semiconductor Field Effect Transistors
Sun, J., Bartholomew, R. F., Bellur, K., Srivastava, A., Osburn, C. M., Masnari, N. A., & Westhoff, R. (1998, June 1). Journal of The Electrochemical Society.
1997 conference paper
A 0.18 ?m CMOS technology for elevated source/drain MOSFETs using selective silicon epitaxy
ULSI science and technology/1997: Proceedings of the Sixth International Symposium on UltraLarge Scale Integration Science and Technology (Proceedings (Electrochemical Society); v. 97-3), 571–585. Pennington, NJ: Electrochemical Society.
Ed(s):
1997 article
A Comparative Study of n+/p Junction Formation for Deep Submicron Elevated Source/Drain Metal Oxide Semiconductor Field Effect Transistors
Sun, J., Bartholomew, R. F., Bellur, K., Srivastava, A., Osburn, C. M., Masnari, N. A., & Westhoff, R. (1997, October 1). Journal of The Electrochemical Society.
1997 conference paper
Parasitic resistance considerations of using elevated source/drain for deep submicron MOSFET technology
ULSI science and technology/1997: Proceedings of the Sixth International Symposium on UltraLarge Scale Integration Science and Technology (Proceedings (Electrochemical Society); v. 97-3), 587–597. Pennington, NJ: Electrochemical Society.
Ed(s):
1997 article
The effect of the elevated source/drain doping profile on performance and reliability of deep submicron MOSFETs
Sun, J. J., Bartholomew, R. F., Bellur, K., Srivastava, A., Osburn, C. M., & Masnari, N. A. (1997, January 1). IEEE Transactions on Electron Devices.
1996 article
Sub-Half Micron Elevated SourceDrain NMOSFETS by Low Temperature Selective Epitaxial Deposition
Sun, J., Bartholomew, R. F., Bellur, K., O'Neil, P. A., Srivastava, A., Violette, K. E., … Masnari, N. A. (1996, January 1). MRS Proceedings.
Ed(s):
1995 journal article
Effects of profile doped elevated source/drain structures on deep-submicron MOSFETs
Solid-State Electronics, 38(3), 573–579.
Contributors: H. Tian n, K. Kim n , J. Hauser n, n & M. Littlejohn n
1994 journal article
An evaluation of super-steep-retrograde channel doping for deep-submicron MOSFET applications
IEEE Transactions on Electron Devices, 41(10), 1880–1882.
1994 article
Single wafer process integration for submicron structures
Masnari, N. A. (1994, July 1). Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena.
1993 article
Cener for advanced electronic materials processing
Masnari, N. A., Hauser, J. R., Lucovsky, G., Maher, D. M., Markunas, R. J., Ozturk, M. C., & Wortman, J. J. (1993, January 1). Proceedings of the IEEE.