Works (12)

Updated: April 11th, 2023 10:13

1998 conference paper

Evaluation and comparison of 3.0 nm gate-stack dielectrics for tenth-micron technology NMOSFETs

Rapid thermal and integrated processing VII: Symposium held April 13-15, 1998, San Francisco, California, U.S.A. (Materials Research Society symposium proceedings ; v.525), 157–162. Warrendale, Pennsylvania: Materials Research Society.

Source: NC State University Libraries
Added: August 6, 2018

1998 article

Evaluation of 2.0 nm grown and deposited dielectrics in 0.1 mu m PMOSFETs

RAPID THERMAL AND INTEGRATED PROCESSING VII, Vol. 525, pp. 163–170.

By: A. Srivastava, H. Heinisch n, E. Vogel, C. Parker, C. Osburn, N. Masnari, J. Wortman, . Hauser n

Source: Web Of Science
Added: August 6, 2018

1998 journal article

Parasitic resistance considerations of using elevated source/drain technology for deep submicron metal oxide semiconductor field effect transistors

JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 145(6), 2131–2137.

By: J. Sun, R. Bartholomew n, K. Bellur, A. Srivastava, C. Osburn, N. Masnari, R. Westhoff n

Source: Web Of Science
Added: August 6, 2018

1997 conference paper

A 0.18 ?m CMOS technology for elevated source/drain MOSFETs using selective silicon epitaxy

ULSI science and technology/1997: Proceedings of the Sixth International Symposium on UltraLarge Scale Integration Science and Technology (Proceedings (Electrochemical Society); v. 97-3), 571–585. Pennington, NJ: Electrochemical Society.

By: A. Srivastava, J. Sun, K. Bellur, R. Bartholomew, P. O'Neil, S. Celik, C. Osburn, N. Masnari ...

Source: NC State University Libraries
Added: August 6, 2018

1997 journal article

A comparative study of n(+)/p junction formation for deep submicron elevated source/drain metal oxide semiconductor field effect transistors

JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 144(10), 3659–3664.

By: J. Sun, R. Bartholomew, K. Bellur, A. Srivastava, C. Osburn, N. Masnari, R. Westhoff

Source: Web Of Science
Added: August 6, 2018

1997 conference paper

Parasitic resistance considerations of using elevated source/drain for deep submicron MOSFET technology

ULSI science and technology/1997: Proceedings of the Sixth International Symposium on UltraLarge Scale Integration Science and Technology (Proceedings (Electrochemical Society); v. 97-3), 587–597. Pennington, NJ: Electrochemical Society.

By: J. Sun, R. Bartholomew, K. Bellur, A. Srivastava, C. Osburn, N. Masnari, R. Westhoff

Source: NC State University Libraries
Added: August 6, 2018

1997 journal article

The effect of the elevated source drain doping profile on performance and reliability of deep submicron MOSFET's

IEEE TRANSACTIONS ON ELECTRON DEVICES, 44(9), 1491–1498.

Source: Web Of Science
Added: August 6, 2018

1996 article

Sub-half micron elevated source/drain NMOSFETs by low temperature selective epitaxial deposition

RAPID THERMAL AND INTEGRATED PROCESSING V, Vol. 429, pp. 343–347.

Source: Web Of Science
Added: August 6, 2018

1995 journal article

Effects of profile doped elevated source/drain structures on deep-submicron MOSFETs

Solid-State Electronics, 38(3), 573–579.

By: H. Tian n, K. Kim, J. Hauser, N. Masnari & M. Littlejohn

Sources: Web Of Science, Crossref
Added: August 6, 2018

1994 journal article

An evaluation of super-steep-retrograde channel doping for deep-submicron MOSFET applications

IEEE Transactions on Electron Devices, 41(10), 1880–1882.

By: H. Tian*, R. Hulfachor, J. Ellis-Monaghan*, K. Kim, M. Littlejohn, J. Hauser, N. Masnari

Sources: Web Of Science, Crossref
Added: August 6, 2018

1994 article

SINGLE-WAFER PROCESS INTEGRATION FOR SUBMICRON STRUCTURES

JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, Vol. 12, pp. 2749–2751.

By: N. Masnari

Source: Web Of Science
Added: August 6, 2018

1993 journal article

CENTER FOR ADVANCED ELECTRONIC MATERIALS PROCESSING

PROCEEDINGS OF THE IEEE, 81(1), 42–59.

By: N. Masnari, . Hauser, G. Lucovsky, D. Maher, R. Markunas, M. Ozturk, J. Wortman

Source: Web Of Science
Added: August 6, 2018