Nino A. Masnari

Evaluation and comparison of 3.0 nm gate-stack dielectrics for tenth-micron technology NMOSFETs. (1998). Rapid thermal and integrated processing VII: Symposium held April 13-15, 1998, San Francisco, California, U.S.A.  (Materials Research Society symposium proceedings ; v.525), 157–162. Warrendale, Pennsylvania: Materials Research Society.

Srivastava, A., Heinisch, H. H., Vogel, E., Parker, C., Osburn, C. M., Masnari, N. A., … Hauser, JR. (1998). Evaluation of 2.0 nm grown and deposited dielectrics in 0.1 mu m PMOSFETs. RAPID THERMAL AND INTEGRATED PROCESSING VII, Vol. 525, pp. 163–170. https://doi.org/10.1557/proc-525-163

Sun, J., Bartholomew, R. F., Bellur, K., Srivastava, A., Osburn, C. M., Masnari, N. A., & Westhoff, R. (1998). Parasitic resistance considerations of using elevated source/drain technology for deep submicron metal oxide semiconductor field effect transistors. JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 145(6), 2131–2137. https://doi.org/10.1149/1.1838607

Srivastava, A., Sun, J., Bellur, K., Bartholomew, R. F., O'Neil, P., Celik, S. M., … Fowler, B. (1997). A 0.18 ?m CMOS technology for elevated source/drain MOSFETs using selective silicon epitaxy. ULSI science and technology/1997: Proceedings of the Sixth International Symposium on UltraLarge Scale Integration Science and Technology (Proceedings (Electrochemical Society); v. 97-3), 571–585. Pennington, NJ: Electrochemical Society.

Sun, J., Bartholomew, R. F., Bellur, K., Srivastava, A., Osburn, C. M., Masnari, N. A., & Westhoff, R. (1997). A comparative study of n(+)/p junction formation for deep submicron elevated source/drain metal oxide semiconductor field effect transistors. JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 144(10), 3659–3664. https://doi.org/10.1149/1.1838066

Sun, J., Bartholomew, R. F., Bellur, K., Srivastava, A., Osburn, C. M., Masnari, N. A., & Westhoff, R. (1997). Parasitic resistance considerations of using elevated source/drain for deep submicron MOSFET technology. ULSI science and technology/1997: Proceedings of the Sixth International Symposium on UltraLarge Scale Integration Science and Technology (Proceedings (Electrochemical Society); v. 97-3), 587–597. Pennington, NJ: Electrochemical Society.

Sun, J. J., Bartholomew, R. F., Bellur, K., Srivastava, A., Osburn, C. M., & Masnari, N. A. (1997). The effect of the elevated source drain doping profile on performance and reliability of deep submicron MOSFET's. IEEE TRANSACTIONS ON ELECTRON DEVICES, 44(9), 1491–1498. https://doi.org/10.1109/16.622606

Sun, J., Bartholomew, R. F., Bellur, K., ONeil, P. A., Srivastava, A., Violette, K. E., … Masnari, N. A. (1996). Sub-half micron elevated source/drain NMOSFETs by low temperature selective epitaxial deposition. RAPID THERMAL AND INTEGRATED PROCESSING V, Vol. 429, pp. 343–347. https://doi.org/10.1557/proc-429-343

Tian, H., Kim, K. W., Hauser, J. R., Masnari, N. A., & Littlejohn, M. A. (1995). Effects of profile doped elevated source/drain structures on deep-submicron MOSFETs. Solid-State Electronics, 38(3), 573–579. https://doi.org/10.1016/0038-1101(94)00160-H

Tian, H., Hulfachor, R. B., Ellis-Monaghan, J. J., Kim, K. W., Littlejohn, M. A., Hauser, J. R., & Masnari, N. A. (1994). An evaluation of super-steep-retrograde channel doping for deep-submicron MOSFET applications. IEEE Transactions on Electron Devices, 41(10), 1880–1882. https://doi.org/10.1109/16.324605

MASNARI, N. A. (1994). SINGLE-WAFER PROCESS INTEGRATION FOR SUBMICRON STRUCTURES. JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, Vol. 12, pp. 2749–2751. https://doi.org/10.1116/1.587186

MASNARI, N. A., HAUSER, JR, LUCOVSKY, G., MAHER, D. M., MARKUNAS, R. J., OZTURK, M. C., & WORTMAN, J. J. (1993). CENTER FOR ADVANCED ELECTRONIC MATERIALS PROCESSING. PROCEEDINGS OF THE IEEE, 81(1), 42–59. https://doi.org/10.1109/JPROC.1993.752025