@article{sargolzaeiaval_ramesh_ozturk_2022, title={A comprehensive analytical model for thermoelectric body heat harvesting incorporating the impact of human metabolism and physical activity}, volume={324}, ISSN={["1872-9118"]}, DOI={10.1016/j.apenergy.2022.119738}, abstractNote={Wearable electronic devices, which can provide hassle-free, long-term, continuous monitoring for different health parameters are of interest for a variety of applications including managing chronic diseases and post-operative patient care. Thermoelectric generators (TEGs) that rely on the Seebeck effect provide a promising path to self-powered wearable electronics via harvesting body heat. The net harvested energy depends on several factors including metabolic heat, core body temperature, and skin resistance, which are regulated by the human thermoregulatory system. These factors are influenced by age, sex, height and body mass index (BMI) and they can cause appreciable differences in the amount of harvested energy. In this paper, we present a comprehensive model, which combines an analytical TEG model with established biological models for the human body to accurately predict the performance of a wearable TEG. The model calculates variations in metabolic rate and core body temperature during physical activity, which are then used to calculate the skin resistance and the skin temperature following an iterative procedure. These parameters are then used to determine the temperature differential across the TEG and the resulting output power delivered to an external load. Experimental validation of the model was achieved using a wrist worn flexible TEG during different physical activities, which were carefully designed to separate the impact of convection from the human thermoregulatory response. It was determined that increase in metabolism from normal walking could lead to a 20% increase in the TEG output voltage. The model was used to predict the impact of age and sex on TEG output power. The results indicate that age can have a significant impact on TEG performance. It is shown that the power generated by adults over the age of 65 can be 30%–35% less than the power generated by younger adults under the age of 30. This reduction in power was attributed to an increase in skin resistance, which was found to be 13% for females and 25% for males. The skin resistance of females was also found to be higher, which correlated well with their higher average fat content. The overall impact of sex was found to be smaller than age, females generating 5%–10% less power than males. The model takes into account all pertinent TEG parameters including properties of the semiconductor materials, physical dimensions of the semiconductor legs, fill factor and electrical and thermal parasitic resistances. Using these input parameters, and modeling of the human body as a heat source, the model can help optimize TEG module design for a specific wearable application.}, journal={APPLIED ENERGY}, author={Sargolzaeiaval, Yasaman and Ramesh, Viswanath Padmanabhan and Ozturk, Mehmet C.}, year={2022}, month={Oct} }
 @article{yildiz_lubna_ramesh_ozturk_bradford_2022, title={Microporous vertically aligned CNT nanocomposites with tunable properties for use in flexible heat sinks}, volume={7}, ISSN={["2468-2179"]}, DOI={10.1016/j.jsamd.2022.100509}, abstractNote={Effective thermal management of electronic systems depends on the heat transfer efficiency or the heat dissipation capability and the thermal conductivity of heat sink components, which has a critical impact on the performance of the devices. The rapidly growing field of microelectronics creates an enormous need for next-generation flexible, lightweight heat sinks. In this work, flexible, microporous nanocomposites are fabricated utilizing a unique yet easily tunable processing method, targeting heat-sink applications. The highly porous and low-density nanohybrid structures were fabricated in a unique processing technique using conformally pyrolytic carbon (PyC) coated vertically aligned carbon nanotube (VACNT) arrays and polydimethylsiloxane (PDMS) infiltration. Simply by varying the concentration of the PDMS in the VACNT structure, the microporosity can be tuned from 50% to 93%, and at the same time, the density of the structure varies from 0.11 g/cm3 to 0.51 g/cm3. The through-thickness thermal conductivity of the VACNT – PDMS nanocomposites did not vary substantially with increasing PDMS concentration, and the highest performance samples exhibited 14.1 W/mK thermal conductivity. The highly flexible nanocomposite structure also showed excellent mechanical resiliency and exhibited complete recovery from 80% compressive strain. The final heat-sink structure with fins was fabricated by a controlled laser etching technique. Analysis of the flexible VACNT array heat sink showed a significant ∼27% reduction in thermal resistance with an air velocity of 1.5 m/s and about ∼40% improvement in the output performance of a thermoelectric generator (TEG) on which it was mounted. The high thermal conductivity of VACNTs and the large surface area provided by the microporous structure, as well as the laser-etched fins, all together contributed to better thermal management performance.}, number={4}, journal={JOURNAL OF SCIENCE-ADVANCED MATERIALS AND DEVICES}, author={Yildiz, Ozkan and Lubna, Mostakima M. and Ramesh, Viswanath P. and Ozturk, Mehmet and Bradford, Philip D.}, year={2022}, month={Dec} }
 @article{neumann_kara_sargolzaeiaval_im_ma_yang_ozturk_dickey_2021, title={Aerosol Spray Deposition of Liquid Metal and Elastomer Coatings for Rapid Processing of Stretchable Electronics}, volume={12}, ISSN={["2072-666X"]}, url={https://doi.org/10.3390/mi12020146}, DOI={10.3390/mi12020146}, abstractNote={We report a spray deposition technique for patterning liquid metal alloys to form stretchable conductors, which can then be encapsulated in silicone elastomers via the same spraying procedure. While spraying has been used previously to deposit many materials, including liquid metals, this work focuses on quantifying the spraying process and combining it with silicones. Spraying generates liquid metal microparticles (~5 μm diameter) that pass through openings in a stencil to produce traces with high resolution (~300 µm resolution using stencils from a craft cutter) on a substrate. The spraying produces sufficient kinetic energy (~14 m/s) to distort the particles on impact, which allows them to merge together. This merging process depends on both particle size and velocity. Particles of similar size do not merge when cast as a film. Likewise, smaller particles (<1 µm) moving at the same speed do not rupture on impact either, though calculations suggest that such particles could rupture at higher velocities. The liquid metal features can be encased by spraying uncured silicone elastomer from a volatile solvent to form a conformal coating that does not disrupt the liquid metal features during spraying. Alternating layers of liquid metal and elastomer may be patterned sequentially to build multilayer devices, such as soft and stretchable sensors.}, number={2}, journal={MICROMACHINES}, publisher={MDPI AG}, author={Neumann, Taylor V. and Kara, Berra and Sargolzaeiaval, Yasaman and Im, Sooik and Ma, Jinwoo and Yang, Jiayi and Ozturk, Mehmet C. and Dickey, Michael D.}, year={2021}, month={Feb} }
 @misc{vallem_sargolzaeiaval_ozturk_lai_dickey_2021, title={Energy Harvesting and Storage with Soft and Stretchable Materials}, volume={33}, ISSN={["1521-4095"]}, url={https://doi.org/10.1002/adma.202004832}, DOI={10.1002/adma.202004832}, abstractNote={Abstract}, number={19}, journal={ADVANCED MATERIALS}, author={Vallem, Veenasri and Sargolzaeiaval, Yasaman and Ozturk, Mehmet and Lai, Ying-Chih and Dickey, Michael D.}, year={2021}, month={May} }
 @article{padmanabhan ramesh_sargolzaeiaval_neumann_misra_vashaee_dickey_ozturk_2021, title={Flexible thermoelectric generator with liquid metal interconnects and low thermal conductivity silicone filler}, volume={5}, ISSN={["2397-4621"]}, DOI={10.1038/s41528-021-00101-3}, abstractNote={Abstract}, number={1}, journal={NPJ FLEXIBLE ELECTRONICS}, author={Padmanabhan Ramesh, Viswanath and Sargolzaeiaval, Yasaman and Neumann, Taylor and Misra, Veena and Vashaee, Daryoosh and Dickey, Michael D. and Ozturk, Mehmet C.}, year={2021}, month={Mar} }
 @article{heidari_ozturk_ghannam_law_khanbareh_miah_2021, title={IEEE ACCESS SPECIAL SECTION EDITORIAL: ENERGY HARVESTING TECHNOLOGIES FOR WEARABLE AND IMPLANTABLE DEVICES}, volume={9}, ISSN={["2169-3536"]}, DOI={10.1109/ACCESS.2021.3088622}, abstractNote={Implantable and wearable electronic devices can improve the quality of life as well as the life expectancy of many chronically ill patients, provided that certain biological signs can be accurately monitored. Thanks to advancements in packaging and nanofabrication, it is now possible to embed various microelectronic and micromechanical sensors such as gyroscopes, accelerometers, and image sensors into a small area on a flexible substrate and at a relatively low cost. Furthermore, these devices have been integrated with wireless communication technologies to enable the transmission of both signals and energy. However, to ensure that these devices can truly improve a patient’s quality of life, new preventative, diagnostic, and therapeutic devices that can provide hassle-free, long-term, continuous monitoring will need to be developed, which must rely on novel energy harvesting solutions that are non-obstructive to its wearer. So far, research in the field has focused on materials, new processing techniques, and one-off devices. However, existing progress is not sufficient for future electronic devices to be useful in any new application, and a great demand exists toward scaling up the research toward circuits and systems. Few interesting developments in this direction indicate that special attention should be given toward the design, simulation, and modeling of energy harvesting techniques while keeping system integration and power management in consideration.}, journal={IEEE ACCESS}, author={Heidari, Hadi and Ozturk, Mehmet and Ghannam, Rami and Law, Man-Kay and Khanbareh, Hamideh and Miah, Abdul Halim}, year={2021}, pages={91324–91327} }
 @article{sargolzaeiaval_ramesh_neumann_misra_vashaee_dickey_ozturk_2020, title={Flexible thermoelectric generators for body heat harvesting - Enhanced device performance using high thermal conductivity elastomer encapsulation on liquid metal interconnects}, volume={262}, ISSN={["1872-9118"]}, DOI={10.1016/j.apenergy.2019.114370}, abstractNote={This paper reports flexible thermoelectric generators (TEGs) employing eutectic gallium indium (EGaIn) liquid metal interconnects encased in a novel, high thermal conductivity (HTC) elastomer. These TEGs are part of a broader effort to harvest thermal energy from the body and convert it into electrical energy to power wearable electronics. The flexible TEGs reported in this paper employ the same thermoelectric legs' used in rigid TEGs, thus eliminating the need to develop new materials specifically for flexible TEGs that often sacrifice the so-called figure of merit' for flexibility. Flexible TEGs reported here embed rigid thermoelectric legs' in soft and flexible packaging, using stretchable EGaIn interconnects. The use of liquid metal interconnects provides ultimate stretchability and low electrical resistance between the thermoelectric legs. The liquid metal lines are encased in a new stretchable silicone elastomer doped with both graphene nano-platelets and EGaIn to increase its thermal conductivity. This high thermal conductivity elastomer not only reduces the parasitic thermal resistance of the encapsulation layer but it also serves as a heat spreader, leading to 1.7X improvement in the output power density of TEGs compared to devices fabricated with a conventional elastomer. The device performance is further improved by a thin Cu layer acting as a heat spreader providing an additional 1.3X enhancement in the output power at 1.2 m/s air velocity (typical walking speed). Worn on the wrist, our best devices achieve power levels in excess of 30 μW/cm2 at an air velocity of 1.2 m/s outperforming previously reported flexible TEGs.}, journal={APPLIED ENERGY}, author={Sargolzaeiaval, Yasaman and Ramesh, Viswanath Padmanabhan and Neumann, Taylor V and Misra, Veena and Vashaee, Daryoosh and Dickey, Michael D. and Ozturk, Mehmet C.}, year={2020}, month={Mar} }
 @misc{nozariasbmarz_collins_dsouza_polash_hosseini_hyland_liu_malhotra_ortiz_mohaddes_et al._2020, title={Review of wearable thermoelectric energy harvesting: From body temperature to electronic systems}, volume={258}, ISSN={["1872-9118"]}, url={https://publons.com/publon/30967440/}, DOI={10.1016/j.apenergy.2019.114069}, abstractNote={Global demand for battery-free metrics and health monitoring devices has urged leading research agencies and their subordinate centers to set human energy harvesting and self-powered wearable technologies as one of their primary research objectives. After an overview of wearables market trends, different active and passive methods of body energy harvesting for powering low-consumption electronic devices are introduced, and challenges of device fabrication are discussed. The discussion continues with the primary emphasis on thermoelectric generators for body heat harvesting. The physiological aspects of the human body involved in heat generation are elaborated. System requirements and the influence of different parameters on the performance of thermoelectric generators are studied at the material, device, and system levels. Finally, the advancements in the development of rigid and flexible thermoelectric generators for wearable and textile integration are presented.}, journal={APPLIED ENERGY}, author={Nozariasbmarz, Amin and Collins, Henry and Dsouza, Kelvin and Polash, Mobarak Hossain and Hosseini, Mahshid and Hyland, Melissa and Liu, Jie and Malhotra, Abhishek and Ortiz, Francisco Matos and Mohaddes, Farzad and et al.}, year={2020}, month={Jan} }
 @article{nozariasbmarz_suarez_dycus_cabral_lebeau_ozturk_vashaee_2020, title={Thermoelectric generators for wearable body heat harvesting: Material and device concurrent optimization}, volume={67}, ISSN={["2211-3282"]}, DOI={10.1016/j.nanoen.2019.104265}, abstractNote={Body heat harvesting systems based on thermoelectric generators (TEGs) can play a significant role in wearable electronics intended for continuous, long-term health monitoring. However, to date, the harvested power density from the body using TEGs is limited to a few micro-watts per square centimeter, which is not sufficient to turn on many wearables. The thermoelectric materials research has been mainly focused on enhancing the single parameter zT, which is insufficient to meet the requirements for wearable applications. To develop TEGs that work effectively in wearable devices, one has to consider the material, device, and system requirements concurrently. Due to the lack of an efficient heatsink and the skin thermal resistance, a key challenge to achieving this goal is to design systems that maximize the temperature differential across the TEG while not compromising the body comfort. This requires favoring approaches that deliver the largest possible device thermal resistance relative to the external parasitic resistances. Therefore, materials with low thermal conductivity are critically important to maximize the temperature gradient. Also, to achieve a high boost converter efficiency, wearable TEGs need to have the highest possible output voltage, which calls for a high Seebeck coefficient. At the device level, dimensions of the legs (length versus the base area) and fill factor are both critical parameters to ensure that the parasitic thermal resistances are again negligible compared to the resistance of the module itself. In this study, the concurrent impact of material and device parameters on the efficiency of wearable TEGs is considered. Nanocomposite thermoelectric materials based on bismuth telluride alloys were synthesized using microwave processing and optimized to meet the requirements of wearable TEGs. Microwave energy decrystallized the material leading to a strong reduction of the thermal conductivity while maintaining a high zT at the body temperature. A comprehensive quasi-3D analytical model was developed and used to optimize the material and device parameters. The nanocomposite TEG produced 44 μW/cm2 under no air flow condition, and 156.5 μW/cm2 under airflow. In comparison to commercial TEGs tested under similar conditions, the nanocomposite based TEGs exhibited 4–7 times higher power density on the human body depending on the convective cooling conditions.}, journal={NANO ENERGY}, author={Nozariasbmarz, Amin and Suarez, Francisco and Dycus, J. Houston and Cabral, Matthew J. and LeBeau, James M. and Ozturk, Mehmet C. and Vashaee, Daryoosh}, year={2020}, month={Jan} }
 @article{sargolzaeiaval_ramesh_neumann_miles_dickey_ozturk_2019, title={High Thermal Conductivity Silicone Elastomer Doped with Graphene Nanoplatelets and Eutectic GaIn Liquid Metal Alloy}, volume={8}, ISSN={["2162-8769"]}, DOI={10.1149/2.0271906jss}, abstractNote={This paper reports the thermal conductivity and mechanical properties of Sylgard 184 polydimethylsiloxane (PDMS) elastomer loaded with graphene nano-platelets (GnPs) and eutectic Ga-In (EGaIn) liquid metal droplets. We fabricated samples with different GnP and EGaIn concentrations and measured their thermal conductivity using the steady-state absolute technique. The results show that the thermal conductivity of the elastomer can be enhanced up to 5.6X when both GNP and EGaIn are included in the elastomer. Without EGaIn, the enhancement is limited to 4.4X. The results suggest that EGaIn inclusion did not change the viscosity of the uncured material significantly at any GnP loading level. We also observed that addition of just EGaIn to PDMS did not have a significant impact on the material's stiffness while lowering its ultimate tensile strength by a factor of 2X and the maximum elongation at the break point by a factor of 1.6X. On the other hand, it was demonstrated that GnP addition to pure PDMS or EGaIn doped PDMS made the elastomer stiffer and less tear resistant with lower elongation at the break point.}, number={6}, journal={ECS JOURNAL OF SOLID STATE SCIENCE AND TECHNOLOGY}, author={Sargolzaeiaval, Yasaman and Ramesh, Viswanath Padmanabhan and Neumann, Taylor V. and Miles, Rebecca and Dickey, Michael D. and Ozturk, Mehmet C.}, year={2019}, month={Jun}, pages={P357–P362} }
 @article{suarez_parekh_ladd_vashaee_dickey_öztürk_2017, title={Flexible thermoelectric generator using bulk legs and liquid metal interconnects for wearable electronics}, volume={202}, ISSN={0306-2619}, url={http://dx.doi.org/10.1016/J.APENERGY.2017.05.181}, DOI={10.1016/J.APENERGY.2017.05.181}, abstractNote={Interest in wearable electronics for continuous, long-term health and performance monitoring is rapidly increasing. The reduction in power levels consumed by sensors and electronic circuits accompanied by the advances in energy harvesting methods allows for the realization of self-powered monitoring systems that do not have to rely on batteries. For wearable electronics, thermoelectric generators (TEGs) offer the unique ability to continuously convert body heat into usable energy. For body harvesting, it is preferable to have TEGs that are thin, soft and flexible. Unfortunately, the performances of flexible modules reported to date have been far behind those of their rigid counterparts. This is largely due to lower efficiencies of the thermoelectric materials, electrical or thermal parasitic losses and limitations on leg dimensions posed by the synthesis techniques. In this work, we present an entirely new approach and explore the possibility of using standard bulk legs in a flexible package. Bulk thermoelectric legs cut from solid ingots are far superior to thermoelectric materials synthesized using other techniques. A key enabler of the proposed technology is the use of EGaIn liquid metal interconnects, which not only provide extremely low interconnect resistance but also stretchability with self-healing, both of which are essential for flexible TE modules. The results suggest that this novel approach can finally produce flexible TEGs that have the potential to challenge the rigid TEGs and provide a pathway for the realization of self-powered wearable electronics.}, journal={Applied Energy}, publisher={Elsevier BV}, author={Suarez, Francisco and Parekh, Dishit P. and Ladd, Collin and Vashaee, Daryoosh and Dickey, Michael D. and Öztürk, Mehmet C.}, year={2017}, month={Sep}, pages={736–745} }
 @misc{nozariasbmarz_agarwal_coutant_hall_liu_liu_malhotra_norouzzadeh_oeztuerk_ramesh_et al._2017, title={Thermoelectric silicides: A review}, volume={56}, ISSN={["1347-4065"]}, url={http://dx.doi.org/10.7567/jjap.56.05da04}, DOI={10.7567/jjap.56.05da04}, abstractNote={Traditional research on thermoelectric materials focused on improving the figure-of-merit zT to enhance the energy conversion efficiency. With further growth and commercialization of thermoelectric technology beyond niche applications, other factors such as materials availability, toxicity, cost, recyclability, thermal stability, chemical and mechanical properties, and ease of fabrication become important for making viable technologies. Several silicide alloys were identified that have the potential to fulfill these requirements. These materials are of interest due to their abundancy in earth’s crust (e.g., silicon), non-toxicity, and good physical and chemical properties. In this paper, an overview of the silicide thermoelectrics from traditional alloys to advanced material structures is presented. In addition, some of the most effective approaches as well as fundamental physical concepts for designing and developing efficient thermoelectric materials are presented and future perspectives are discussed.}, number={5}, journal={JAPANESE JOURNAL OF APPLIED PHYSICS}, author={Nozariasbmarz, Amin and Agarwal, Aditi and Coutant, Zachary A. and Hall, Michael J. and Liu, Jie and Liu, Runze and Malhotra, Abhishek and Norouzzadeh, Payam and Oeztuerk, Mehmet C. and Ramesh, Viswanath P. and et al.}, year={2017}, month={May} }
 @article{suarez_nozariasbmarz_vashaee_ozturk_2016, title={Designing thermoelectric generators for self-powered wearable electronics}, volume={9}, ISSN={["1754-5706"]}, DOI={10.1039/c6ee00456c}, abstractNote={Computational efficient, quasi-3D model for designing body wearable thermoelectric generators and experimental verification.}, number={6}, journal={ENERGY & ENVIRONMENTAL SCIENCE}, author={Suarez, Francisco and Nozariasbmarz, Amin and Vashaee, Daryoosh and Ozturk, Mehmet C.}, year={2016}, pages={2099–2113} }
 @article{gurarslan_yu_su_yu_suarez_yao_zhu_ozturk_zhang_cao_2014, title={Surface-Energy-Assisted Perfect Transfer of Centimeter-Scale Mono layer and Few-Layer MoS2 Films onto Arbitrary Substrates}, volume={8}, ISSN={["1936-086X"]}, DOI={10.1021/nn5057673}, abstractNote={The transfer of synthesized 2D MoS2 films is important for fundamental and applied research. However, it is problematic to translate the well-established transfer processes for graphene to MoS2 due to different growth mechanisms and surface properties. Here we demonstrate a surface-energy-assisted process that can perfectly transfer centimeter-scale monolayer and few-layer MoS2 films from original growth substrates onto arbitrary substrates with no observable wrinkles, cracks, and polymer residues. The unique strategies used in this process include leveraging the penetration of water between hydrophobic MoS2 films and hydrophilic growth substrates to lift off the films and dry transferring the film after the lift off. This is in stark contrast with the previous transfer process for synthesized MoS2 films, which explores the etching of the growth substrate by hot base solutions to lift off the films. Our transfer process can effectively eliminate the mechanical force caused by bubble generations, the attacks from chemical etchants, and the capillary force induced when transferring the film outside solutions as in the previous transfer process, which consists of the major causes for the previous unsatisfactory transfer. Our transfer process also benefits from using polystyrene (PS), instead of poly(methyl methacrylate) (PMMA) that was widely used previously, as the carrier polymer. PS can form more intimate interaction with MoS2 films than PMMA and is important for maintaining the integrity of the film during the transfer process. This surface-energy-assisted approach can be generally applied to the transfer of other 2D materials, such as WS2.}, number={11}, journal={ACS NANO}, author={Gurarslan, Alper and Yu, Yifei and Su, Liqin and Yu, Yiling and Suarez, Francisco and Yao, Shanshan and Zhu, Yong and Ozturk, Mehmet and Zhang, Yong and Cao, Linyou}, year={2014}, month={Nov}, pages={11522–11528} }
 @article{dhawan_du_batchelor_wang_leonard_misra_ozturk_gerhold_vo-dinh_2011, title={Hybrid Top-Down and Bottom-Up Fabrication Approach for Wafer-Scale Plasmonic Nanoplatforms}, volume={7}, ISSN={["1613-6810"]}, DOI={10.1002/smll.201002186}, abstractNote={Bridging the nanoscale level of probe fabrication and the megascale dimensions of sensor systems is one of the greatest challenges in the development of large-area plasmonic sensing platforms. We report a generalized hybrid nanofabrication approach combining top-down (deep-UV lithography) and bottom-up (controlled lateral epitaxial growth and atomic layer deposition) fabrication techniques for the development of nanostructured platforms. This technology allows the development of reproducible substrates with controlled sub-10 nm gaps between plasmonic nanostructures over an entire 6 inch wafer (1 inch ≈ 2.54 cm). By integrating soft matter (DNA probes) and hard matter (silicon nanochips), these}, number={6}, journal={SMALL}, author={Dhawan, Anuj and Du, Yan and Batchelor, Dale and Wang, Hsin-Neng and Leonard, Donovon and Misra, Veena and Ozturk, Mehmet and Gerhold, Michael D. and Vo-Dinh, Tuan}, year={2011}, month={Mar}, pages={727–731} }
 @article{alptekin_ozturk_2010, title={NixPt1-xSi/n-Si contacts with sub-0.1 eV effective Schottky barrier heights obtained by sulfur segregation}, volume={87}, ISSN={["1873-5568"]}, DOI={10.1016/j.mee.2010.04.008}, abstractNote={We demonstrate tuning of the Schottky barrier height, ϕB of nickel–platinum alloy silicide (NixPt1-xSi) contacts on n-type silicon by segregating sulfur at the silicide/Si interface. It is shown that while there is negligible effect of sulfur on the thermal stability and silicide resistance, extremely small barrier height values of 0.05–0.07 eV at the silicide/Si interface can be achieved by sulfur segregation.}, number={11}, journal={MICROELECTRONIC ENGINEERING}, author={Alptekin, Emre and Ozturk, Mehmet C.}, year={2010}, month={Nov}, pages={2358–2360} }
 @article{alptekin_ozturk_2010, title={Ultrahigh Vacuum Chemical Vapor Deposition of Doped and Intrinsic Si1-xCx Epitaxy from Disilane, Trimethylsilane, and Phosphine}, volume={157}, ISSN={["1945-7111"]}, DOI={10.1149/1.3414167}, abstractNote={Epitaxial Si 1―x C x alloys grown in recessed source/drain junctions of n-channel MOSFETs are of interest to induce uniaxial tensile strain in the channel for electron mobility enhancement. In this work, we have studied chemical vapor deposition of intrinsic and heavily phosphorus-doped Si 1―x C x epitaxial layers on silicon using disilane, trimethylsilane, phosphine, and hydrogen as the gaseous precursors. The results show that phosphorus segregation to the growth surface can be fully suppressed by growing the layers at or below 550°C. The best films were obtained at this temperature yielding a growth rate of 4 nm/min. A maximum phosphorus concentration of 1.3 × 10 21 cm ―3 was obtained with a minimum resistivity of 0.67 mΩ cm and a substitutional carbon concentration of 1.0%.}, number={6}, journal={JOURNAL OF THE ELECTROCHEMICAL SOCIETY}, author={Alptekin, Emre and Ozturk, Mehmet C.}, year={2010}, pages={H699–H704} }
 @article{alptekin_ozturk_misra_cho_kim_chopra_2009, title={Erbium Silicide Formation on Si1-xCx Epitaxial Layers}, volume={156}, ISSN={["1945-7111"]}, DOI={10.1149/1.3097189}, abstractNote={Erbium silicide (ErSi 2-x ) formation was investigated on Si 1-x C x epitaxial layers grown on Si substrates. Substitutional carbon incorporation in the epitaxial layers was in the range of 0.6-1.6%. The silicide films were formed by rapid thermal annealing of sputter-deposited erbium layers in the temperature range of 350-700°C. The sheet resistance of the silicide films formed on Si 1-x C x epitaxial layers was found to be equal to or less than the sheet resistance of the films formed on Si epitaxial layers. At 600°C, an average resistivity of 114 ± 4 μΩ cm was obtained. The silicide grains were found to be epitaxially aligned to the substrate along the (100) orientation, regardless of the carbon concentration in the underlying epitaxial layer. Compositional analysis of the films indicated carbon accumulation at the ErSi 2-x /Si 1-x C x interface with no carbon incorporation in the silicide. The films formed on Si 1-x C x epitaxial layers exhibited a smooth interface/surface morphology free of pinholes, contrary to the silicides formed on Si. The root-mean-square surface roughness was found to be less than 1.5 nm, which was found to be the case with both substitutional and interstitial incorporation of carbon atoms in the epitaxial layer.}, number={5}, journal={JOURNAL OF THE ELECTROCHEMICAL SOCIETY}, author={Alptekin, Emre and Ozturk, Mehmet C. and Misra, Veena and Cho, Yonah and Kim, Yihwan and Chopra, Saurabh}, year={2009}, pages={H378–H383} }
 @article{alptekin_kirkpatrick_misra_ozturk_2009, title={Platinum Germanosilicide Contacts Formed on Strained and Relaxed Si1-xGex Layers}, volume={56}, ISSN={["1557-9646"]}, DOI={10.1109/TED.2009.2018159}, abstractNote={Contact resistivity is a key contributor to the parasitic series resistance of nanoscale MOSFETs. Since the contact resistivity is an exponential function of the Schottky barrier height, new contact materials that can provide smaller barrier heights to source-drain junctions are needed. Platinum germanosilicide (PtSi<sub>1-x</sub>Ge<sub>x</sub>) is of interest as a contact material to the recessed Si<sub>1-x</sub>Ge<sub>x</sub> junctions of p-channel MOSFETs due to the large work function of platinum silicide (PtSi). In this paper, we explore the impact of in-plane biaxial compressive strain in Si<sub>1-x</sub>Ge<sub>x</sub> layers on PtSi<sub>1-x</sub>Ge<sub>x</sub> formation and the impact of the PtSi<sub>1-x</sub>Ge<sub>x</sub> on the strain in Si<sub>1-x</sub>Ge<sub>x</sub>. The parameters considered in this paper include the Ge content, the thickness of the Si<sub>1-x</sub>Ge<sub>x</sub> epitaxial layer, and the PtSi<sub>1-x</sub>Ge<sub>x</sub> thickness. The results show that the resistance, surface morphology, and the crystalline structure of the PtSi<sub>1-x</sub>Ge<sub>x</sub> films are independent of the strain in the original Si<sub>1-x</sub>Ge<sub>x</sub> layer. The results also indicate that PtSi<sub>1-x</sub>Ge<sub>x</sub> does not influence the strain in the Si<sub>1-x</sub>Ge<sub>x</sub> layer. The barrier-height measurements suggest the presence of Fermi-level pinning, and the pinning position is independent of the strain in the alloy, and it is primarily determined by the Ge concentration. As a result of Fermi-level pinning, hole Schottky barrier height of PtSi<sub>1-x</sub>Ge<sub>x</sub>-Si<sub>1-x</sub>Ge<sub>x</sub> contacts is 0.1-0.2 eV higher than that of the PtSi-Si contacts.}, number={6}, journal={IEEE TRANSACTIONS ON ELECTRON DEVICES}, author={Alptekin, Emre and Kirkpatrick, Casey Joe and Misra, Veena and Ozturk, Mehmet C.}, year={2009}, month={Jun}, pages={1220–1227} }
 @article{alptekin_ozturk_misra_2009, title={Schottky Barrier Height of Erbium Silicide on Si1-xCx}, volume={30}, ISSN={["1558-0563"]}, DOI={10.1109/LED.2009.2026297}, abstractNote={In this letter, the Schottky barrier height of erbium silicide contacts formed on Si1-xCx alloys was measured. The alloys were pseudomorphically grown on Si wafers with 0% to 1.2% C occupying the substitutional sites. Schottky barrier diodes were fabricated with an ideality factor of 1.13 or less. The hole barrier height was found to be 0.73 eV independent of the C concentration. This suggests that the electron barrier height should decrease with increasing C concentration due to the reduction in the semiconductor bandgap. For 1.2% C, the electron barrier is estimated to be 0.29 eV.}, number={9}, journal={IEEE ELECTRON DEVICE LETTERS}, author={Alptekin, Emre and Ozturk, Mehmet C. and Misra, Veena}, year={2009}, month={Sep}, pages={949–951} }
 @article{alptekin_ozturk_2009, title={Schottky Barrier Height of Nickel Silicide Contacts Formed on Si1-xCx Epitaxial Layers}, volume={30}, ISSN={["1558-0563"]}, DOI={10.1109/LED.2009.2034114}, abstractNote={Embedded Si1 - xCx source/drain junctions are currently considered to achieve electron mobility enhancement in nMOSFETs by inducing uniaxial tensile strain in the channel region. To utilize the mobility advantage of this technology, it is imperative to form low-resistivity contacts to Si1 - xCx alloys. In this letter, the electron and hole barrier heights at the NiSi/Si1 - xCx interface were measured up to a carbon concentration of 1.2%. The results indicate that the NiSi Fermi level moves away from the valence-band edge with increasing carbon concentration such that the hole barrier height increases by 68 meV in spite of the upward movement of the valence band. Within the same carbon concentration range, the electron barrier height decreases by as much as 170 meV, which is significant considering the exponential dependence of contact resistivity on barrier height.}, number={12}, journal={IEEE ELECTRON DEVICE LETTERS}, author={Alptekin, Emre and Ozturk, Mehmet C.}, year={2009}, month={Dec}, pages={1320–1322} }
 @article{alptekin_ozturk_2009, title={Tuning of the Nickel Silicide Schottky Barrier Height on p-Type Silicon by Indium Implantation}, volume={30}, ISSN={["1558-0563"]}, DOI={10.1109/LED.2009.2033451}, abstractNote={In this letter, indium (In) implantation is introduced as a method to tune the Schottky barrier height of nickel silicide (NiSi) contacts formed on p-type silicon. Indium implantation is performed prior to NiSi formation and the implant conditions are chosen such that the implanted region is entirely consumed by the silicide. During silicide formation, some of the indium segregates at the NiSi-Si interface and can have a significant impact on the Schottky barrier height. It is shown that the barrier height decreases almost linearly with the In dose from 0.37 eV on p-type Si to 0.16 eV with an In dose of 1 times 1014 cm-2 on p-type Si.}, number={12}, journal={IEEE ELECTRON DEVICE LETTERS}, author={Alptekin, Emre and Ozturk, Mehmet C.}, year={2009}, month={Dec}, pages={1272–1274} }
 @article{alptekin_ozturk_misra_2009, title={Tuning of the Platinum Silicide Schottky Barrier Height on n-Type Silicon by Sulfur Segregation}, volume={30}, ISSN={["1558-0563"]}, DOI={10.1109/LED.2009.2014182}, abstractNote={The Schottky barrier height PhiB of platinum silicide (PtSi) contacts on n-type silicon was tuned by sulfur segregation at the PtSi/Si interface. Sulfur was implanted prior to Pt deposition and segregated at the interface during PtSi formation. It was observed that the barrier height could be tuned by changing the sulfur dose. A minimum barrier height of 0.12 eV was obtained on n-type (100) Si substrates. Since PtSi naturally provides a small PhiB of 0.2 eV on p-type Si, it carries the potential to serve as the single metal source/drain contact metal in a CMOS integrated circuit with PhiB tuning on n-channel transistors.}, number={4}, journal={IEEE ELECTRON DEVICE LETTERS}, author={Alptekin, Emire and Ozturk, Mehmet C. and Misra, Veena}, year={2009}, month={Apr}, pages={331–333} }
 @misc{ozturk_misra_chopra_2007, title={Methods of fabricating strained semiconductor-on-insulator field-effect transistors and related devices}, volume={7,211,458}, number={2007 May 1}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Ozturk, M. and Misra, V. and Chopra, S.}, year={2007} }
 @misc{zhang_misra_bedair_ozturk_2007, title={Optoelectonic devices having arrays of quantum-dot compound semiconductor superlattices therein}, volume={7,265,375}, number={2007 Sept. 4}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Zhang, Z.-B. and Misra, V. and Bedair, S. M. A. and Ozturk, M.}, year={2007} }
 @article{zhao_duscher_rozgonyi_zikry_chopra_ozturk_2007, title={Quantitative nanoscale local strain profiling in embedded SiGe metal-oxide-semiconductor structures}, volume={90}, ISSN={["1077-3118"]}, url={http://www.scopus.com/inward/record.url?eid=2-s2.0-34248361149&partnerID=MN8TOARS}, DOI={10.1063/1.2738188}, abstractNote={Mechanical strain by strain engineering has been widely used in Si metal-oxide-semiconductor field effect transistors. Experimental convergent beam electron diffraction (CBED) strain measurements and finite element calculations to quantitatively correlate the strain in the transmission electron microscope (TEM) sample with the actual device. It was found that the magnitude of the longitudinal strain, εx, along the channel direction, is about 20% higher in the TEM sample than in the real device. This combined approach can be used to explain data from other CBED studies of strained Si devices.}, number={19}, journal={APPLIED PHYSICS LETTERS}, author={Zhao, W. and Duscher, G. and Rozgonyi, G. and Zikry, M. A. and Chopra, S. and Ozturk, M. C.}, year={2007}, month={May} }
 @article{chopra_ozturk_misra_ren_mcneil_2007, title={The effects of nickel germanosilicide contacts on the biaxial compressive stress in thin epitaxial silicon-germanium alloys on silicon}, volume={91}, ISSN={["1077-3118"]}, DOI={10.1063/1.2795346}, abstractNote={When a thin Si1−xGex epitaxial layer is grown on Si, it is under biaxial compression. In this letter, it is shown that a nickel germanosilicide (NiSi1−xGex) layer formed on Si1−xGex can significantly reduce the in-plane compressive strain in Si1−xGex. It is proposed that the observed reduction is due to the biaxial tensile stress applied by the NiSi1−xGex layer. Because the Si1−xGex bandgap is a strong function of the strain, this is expected to have a strong impact on the metal-semiconductor barrier height and the contact resistivity of the interface if the metal Fermi level is pinned near the Si1−xGex midgap.}, number={14}, journal={APPLIED PHYSICS LETTERS}, author={Chopra, Saurabh and Ozturk, Mehmet C. and Misra, Veena and Ren, Zhongqiao and McNeil, L. E.}, year={2007}, month={Oct} }
 @article{chopra_ozturk_misra_mcguire_mcneil_2006, title={Analysis of boron strain compensation in silicon-germanium alloys by Raman spectroscopy}, volume={88}, ISSN={["1077-3118"]}, DOI={10.1063/1.2205752}, abstractNote={The impact of heavy boron doping on the biaxial compressive strain in Si1−xGex layers grown on Si has been investigated using Raman spectroscopy and theoretical calculations. It is shown that one boron atom is sufficient to compensate the strain due to approximately 6.9 Ge atoms. This effect is appreciably large for boron concentrations as low as 1%, typical for applications, which employ heavily boron doped layers. Using strain compensation, the Ge content can be substantially increased without increasing the stored strain energy. This phenomenon can be useful in applications, which require low-resistivity p-type strained Si1−xGex layers with high Ge content.}, number={20}, journal={APPLIED PHYSICS LETTERS}, author={Chopra, Saurabh and Ozturk, Mehmet C. and Misra, Veena and McGuire, Kris and McNeil, Laurie E.}, year={2006}, month={May} }
 @article{chopra_ozturk_misra_mcguire_mcneil_2006, title={Critical thickness of heavily boron-doped silicon-germanium alloys}, volume={89}, ISSN={["1077-3118"]}, DOI={10.1063/1.2374870}, abstractNote={In this work, the effect of boron concentration on the critical thickness of heavily boron doped Si1−xGex alloys (Si1−x−yGexBy) has been studied using Raman spectroscopy. The experimental results indicate that while boron decreases the stored strain energy, it can substantially increase the critical thickness for a given Ge concentration. The Si1−x−yGexBy critical thickness was calculated using two different models based on energy balance and kinetic considerations. The results show that the kinetic model provides a good estimate for the Si1−x−yGexBy critical thickness.}, number={20}, journal={APPLIED PHYSICS LETTERS}, author={Chopra, Saurabh and Ozturk, Mehmet C. and Misra, Veena and McGuire, Kris and McNeil, L. E.}, year={2006}, month={Nov} }
 @article{liu_ozturk_2005, title={Effects of heavy boron doping on the valence band offset at the Si1-xGex/Si interface and Si1-xGex band gap}, volume={87}, ISSN={["1077-3118"]}, DOI={10.1063/1.2149295}, abstractNote={Heavily boron-doped Si1−xGex alloys are currently used in recessed source/drain regions of nanoscale metal oxide silicon field effect transistors. Small boron atoms can partially compensate the Si1−xGex strain and change its band gap, which can influence key device parameters such as the junction contact resistance. In this work, the depletion region capacitance of SiGe∕Si heterojunction diodes was measured to determine the valence band offset and the Si1−xGex band gap. The results show that boron doping can have a significant impact on the Si1−xGex band gap and values between those of relaxed and fully strained Si1−xGex alloys can be obtained.}, number={25}, journal={APPLIED PHYSICS LETTERS}, author={Liu, J and Ozturk, MC}, year={2005}, month={Dec} }
 @article{lin_ozturk_chen_rhee_lee_misra_2005, title={Impact of Ge on integration of HfO2 and metal gate electrodes on strained Si channels}, volume={87}, ISSN={["1077-3118"]}, DOI={10.1063/1.2009809}, abstractNote={Tensile-strained Si epitaxial layers (7.5nm–17nm) were grown on relaxed Si0.5Ge0.5 virtual substrates by ultrahigh-vacuum rapid thermal chemical vapor deposition. Metal-oxide-silicon capacitors were fabricated with SiO2 or HfO2 as gate dielectrics and Ru–Ta alloy or TaN as the metal gate electrodes. The results indicate that the interface trap density (Dit) increased as the strained silicon thickness decreased, which was attributed to the presence of Ge in the strained Si layer. Higher Dit was observed with SiO2 which may be due to Si consumption during oxidation, leading to a higher density of Ge at the interface. Leakage current density (Jg) was also observed to increase with increasing strained silicon thickness. This trend of increasing Dit and Jg with decreasing strained silicon thickness did not change after rapid thermal annealing. Both Ru–Ta and TaN gate electrodes were found to exhibit as good a performance on strained Si as on bulk Si.}, number={7}, journal={APPLIED PHYSICS LETTERS}, author={Lin, YX and Ozturk, MC and Chen, B and Rhee, SJ and Lee, JC and Misra, V}, year={2005}, month={Aug} }
 @article{rying_ozturk_bilbro_lu_2005, title={In situ selectivity and thickness monitoring during selective silicon epitaxy using quadrupole mass spectrometry and wavelets}, volume={18}, ISSN={["1558-2345"]}, DOI={10.1109/TSM.2004.836660}, abstractNote={This work reports on a novel in situ sensing technique for monitoring the thickness of selectively grown Si epitaxial layers. The technique can be extended to detect selectivity loss when Si nuclei begin to appear on the insulator surface. In this technique, a quadruple mass spectrometer (QMS) monitors the ionized molecular hydrogen (H/sub 2//sup +/) signal, which is a by-product of the chemical-vapor deposition process. The thickness of the epitaxial layer is determined by evaluating the area under the hydrogen signal. We have deliberately used silane (SiH/sub 4/) without HCl or Cl/sub 2/ to achieve both nonselective and selective depositions. We also show that the amount of hydrogen produced by the deposition process is a strong function of the exposed Si area on the wafer and the effect can be accurately monitored by QMS. This finding was exploited to develop an in situ sensing method to detect the selectivity loss. When selectivity is lost, Si nuclei begin to form on the insulator surface increasing the effective Si area on the wafer. Consequently, the rate of hydrogen production increases rapidly as nuclei coalesce, resulting in a distinct change in the functional form of the hydrogen signal. The hydrogen signal was analyzed using an automatic edge detection procedure based on the wavelet transform modulus maxima representation. The technique facilitated the determination of selective film thickness from the time-integrated hydrogen (H/sub 2//sup +/) signal. To the authors' knowledge, This work represents one of the first applications of wavelets to in situ process monitoring and fault detection in semiconductor manufacturing. The authors expect the methodology presented in This work to be readily transferable to other selective deposition processes, including those that utilize dichlorosilane and disilane since hydrogen is a by-product of those processes as well.}, number={1}, journal={IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING}, author={Rying, EA and Ozturk, MC and Bilbro, GL and Lu, JC}, year={2005}, month={Feb}, pages={112–121} }
 @article{liu_ozturk_2005, title={Nickel germanosilicide contacts formed on heavily boron doped Si1-xGex source/drain junctions for nanoscale CMOS}, volume={52}, ISSN={["1557-9646"]}, DOI={10.1109/TED.2005.850613}, abstractNote={Formation of source/drain junctions with a small parasitic series resistance is one of the key challenges for CMOS technology nodes beyond 100 nm. A new source/drain technology based on selective deposition of heavily in situ doped Si/sub 1-x/Ge/sub x/ layers was recently developed in this laboratory. This paper presents formation and structural characterization of self-aligned nickel germanosilicide contacts formed on heavily boron doped Si/sub 1-x/Ge/sub x/ alloys. The results show that thin NiSi/sub 1-x/Ge/sub x/ contacts with a resistivity of /spl sim/25 /spl mu//spl Omega/-cm can be formed on Si/sub 1-x/Ge/sub x/ alloys at temperatures as low as 350/spl deg/C. However, the low resistivity and the structural integrity of the NiSi/sub 1-x/Ge/sub x/ films can be maintained up to a maximum temperature of 450/spl deg/C. At higher temperatures, Ge out-diffusion from NiSi/sub 1-x/Ge/sub x/ grains results in interface roughening and NiSi spikes. If the maximum processing temperature is kept within 400/spl deg/C, p/sup +/-n junctions with excellent leakage behavior can be formed. A minimum contact resistivity of 2/spl times/10/sup -8/ /spl Omega/-cm/sup 2/ is demonstrated for Ge concentrations above /spl sim/40%, which can be linked to the smaller semiconductor bandgap and high boron activation under the metal contact. The results suggest that NiSi/sub 1-x/Ge/sub x/ contacts formed on Si/sub 1-x/Ge/sub x/ junctions have the potential to satisfy the contact resistivity requirements of future CMOS technology nodes.}, number={7}, journal={IEEE TRANSACTIONS ON ELECTRON DEVICES}, author={Liu, J and Ozturk, MC}, year={2005}, month={Jul}, pages={1535–1540} }
 @misc{zhang_misra_bedair_ozturk_2005, title={Optoelectronic devices having arrays of quantum-dot compound semiconductor superlattices therein}, volume={6,914,256}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Zhang, Z. and Misra, V. and Bedair, S. M. A. and Ozturk, M.}, year={2005} }
 @misc{zhang_misra_bedair_ozturk_2004, title={Methods of forming nano-scale electronic and optoelectronic devices using non-photolithographically defined nano-channel templates}, volume={6,709,929}, number={2004 Mar. 23}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Zhang, Z. and Misra, V. and Bedair, S. M. A. and Ozturk, M.}, year={2004} }
 @article{osburn_kim_han_de_yee_gannavaram_lee_lee_luo_zhu_et al._2002, title={Vertically scaled MOSFET gate stacks and junctions: How far are we likely to go?}, volume={46}, ISSN={["2151-8556"]}, DOI={10.1147/rd.462.0299}, abstractNote={The vertical scaling requirements for gate stacks and for shallow extension junctions are reviewed. For gate stacks, considerable progress has been made in optimizing oxide/nitride and oxynitride dielectrics to reduce boron penetration and dielectric leakage compared to pure SiO2 in order to allow sub-2-nm dielectrics. Several promising alternative material candidates exist for 1-nm equivalent oxide thickness (EOT)-for example, HfO2, ZrO2, and their silicates. Nevertheless, considerable challenges lie ahead if we are to achieve an EOT of less than 0.5 nm. If only a single molecular interface layer of oxide is needed to preserve high channel mobility, it seems likely that an EOT of 0.4-0.5 nm would represent the physical limit of dielectric scaling, but even then with a very high leakage (∼105 A/cm2). For junctions, the main challenge lies in providing low parasitic series resistance as depths are scaled in order to reduce short-channel effects. Because contacts are ultimately expected to dominate the parasitic resistance, low-barrier-height contacts and/or very heavily doped junctions will be required. While ion implantation and annealing processes can certainly be extended to meet the junction-depth and series-resistance requirements for additional generations, alternative low-temperature deposition processes that produce either metastably or extraordinarily activated, abruptly doped regions seem better suited to solve the contact resistance problem.}, number={2-3}, journal={IBM JOURNAL OF RESEARCH AND DEVELOPMENT}, author={Osburn, CM and Kim, I and Han, SK and De, I and Yee, KF and Gannavaram, S and Lee, SJ and Lee, CH and Luo, ZJ and Zhu, W and et al.}, year={2002}, pages={299–315} }
 @article{fang_ozturk_pa o'neil_seebauer_2001, title={Arsenic redistribution during rapid thermal chemical vapor deposition of TiSi2 on Si}, volume={148}, ISSN={["0013-4651"]}, DOI={10.1149/1.1339236}, abstractNote={This paper studies the redistribution behavior of implanted arsenic during selective rapid thermal chemical vapor deposition of titanium disilicide (TiSi 2 ). The arsenic implant doses ranged from 3 × 10 14 cm -2 to 5 × 10 15 cm -2 . The TiSi 2 films were deposited either directly on arsenic-implanted silicon substrates or on epitaxial silicon buffer layers selectively deposited with varying thicknesses before TiSi 2 depositions. SiH 4 and TiCl 4 were used as precursors for TiSi 2 depositions and Si 2 H 6 and Cl 2 for selective silicon epitaxial growth. Experimental data revealed that the majority of the implanted arsenic was lost from the silicon substrate into the deposited TiSi 2 films when epitaxial silicon buffer layers were not employed. With the inclusion of the buffer layer, the arsenic loss could be reduced significantly. The loss of arsenic observed could not be explained by considering substrate consumption alone. In both cases arsenic exhibited strongly enhanced out-diffusion from the silicon substrate into the TiSi 2 film. The injection of vacancies during the TiSi 2 depositions has been proposed as the reason for this enhanced out-diffusion. Monte Carlo simulations have been performed to verify the proposed model.}, number={2}, journal={JOURNAL OF THE ELECTROCHEMICAL SOCIETY}, author={Fang, H and Ozturk, MC and PA O'Neil and Seebauer, EG}, year={2001}, month={Feb}, pages={G43–G49} }
 @article{ban_ozturk_misra_wortman_venables_maher_1999, title={A low-thermal-budget in situ doped multilayer silicon epitaxy process for MOSFET channel engineering}, volume={146}, ISSN={["0013-4651"]}, DOI={10.1149/1.1391744}, abstractNote={This paper describes an in situ boron‐doped, multilayer epitaxial silicon process that can be used to obtain doping profiles for channels in the deep‐submicron regime. We have extensively studied lightly doped channel structures in which an intrinsic silicon layer is grown on an in situ doped epitaxial silicon film. Low‐thermal‐budget processing is achieved by the ultrahigh‐vacuum rapid thermal chemical vapor deposition technique which combines low‐temperature surface preparation and deposition (≤800°C) while providing high growth rates using disilane . Boron doping is achieved using diborane diluted in hydrogen (500 ppm) as the precursor. Temperature and gas switching are compared in terms of doping transition, interface contamination (carbon and oxygen incorporation), and impurity diffusion upon annealing. Our results reveal that for a contamination‐free epitaxial silicon interface, interfacial carbon contamination must be eliminated or reduced to a minimum level. Using this process, short‐channel n‐channel metal‐oxide semiconductor devices μm) have been fabricated for the first time demonstrating the potential use of the technique. It was found that lightly doped channel metal‐oxide semiconductor field effect transistors are more easily scalable into the 0.1 μm regime with superior short‐channel characteristics. © 1999 The Electrochemical Society. All rights reserved.}, number={3}, journal={JOURNAL OF THE ELECTROCHEMICAL SOCIETY}, author={Ban, I and Ozturk, MC and Misra, V and Wortman, JJ and Venables, D and Maher, DM}, year={1999}, month={Mar}, pages={1189–1196} }
 @article{fang_ozturk_seebauer_batchelor_1999, title={Effects of arsenic doping on chemical vapor deposition of titanium silicide}, volume={146}, ISSN={["0013-4651"]}, DOI={10.1149/1.1392621}, abstractNote={This work examines the effects of implanted arsenic on nucleation and growth of TiSi 2 formed by rapid thermal chemical vapor deposition using SiH 4 and TiCl 4 as the precursors. In this study depositions were carried out in a temperature range of 750 to 850°C on Si substrates implanted with As atoms. The As implant doses ranged from 3 × 10 14 to 5 × 10 15 cm -2 . It is shown that heavy dose As can result in a barrier to TiSi 2 nucleation and enhance silicon substrate consumption. A surface passivation model is proposed to explain the effects. On Si, As provides a stable surface structure which inhibits adsorption of SiH 4 and TiCl 4 . Higher temperatures aid As desorption from the Si surface providing nucleation sites. With moderate implant doses, As results in an incubation time whereas very high doses (≥5 × 10 15 cm -2 ) almost completely suppress nucleation. During deposition, As diffuses through the TiSi 2 layer and plays a similar role on the TiSi 2 surface. Because TiCl 4 adsorption on TiSi 2 is favored, the substrate supplies the Si atoms for TiSi 2 formation resulting in enhanced consumption. Because this process relies on Si diffusion through TiSi 2 , beyond a threshold thickness the efficiency of the Si diffusion process drops resulting in suppression of the deposition process. The results indicate that the As dose also plays a role in grain size and surface morphology of the deposited layers. Higher As doses result in smaller grained TiSi 2 films which can be attributed to the role of As in nucleation.}, number={11}, journal={JOURNAL OF THE ELECTROCHEMICAL SOCIETY}, author={Fang, H and Ozturk, MC and Seebauer, EG and Batchelor, DE}, year={1999}, month={Nov}, pages={4240–4245} }
 @article{pa o'neil_ozturk_batchelor_xu_maher_1999, title={Effects of oxygen during selective silicon epitaxial growth using disilane and chlorine}, volume={146}, ISSN={["0013-4651"]}, DOI={10.1149/1.1391938}, abstractNote={Using Si 2 H 6 and Cl 2 in an ultrahigh-vacuum rapid thermal chemical vapor deposition reactor, we have investigated the effects of oxygen (≥5 × 10 -6 Torr) introduced during selective silicon deposition for both chlorinated and nonchlorinated process chemistries. The effects of oxygen have been investigated with regard to oxygen incorporation, selectivity with respect to thermal SiO 2 , growth rate, and epitaxial structure. Initial studies have revealed that during silicon depositions from Si 2 H 6 , the inherent selectivity of Si 2 H 6 to SiO 2 is enhanced upon the addition of oxygen to the process ambient. Furthermore, using a nonchlorinated process chemistry, oxygen adsorbs predominantly at the epitaxy-substrate interface and causes increased surface roughness. We have found, however, that the addition of chlorine can play a significant role in the passivation of the epitaxy-substrate interface with oxygen and improves the resulting film's surface morphology.}, number={6}, journal={JOURNAL OF THE ELECTROCHEMICAL SOCIETY}, author={PA O'Neil and Ozturk, MC and Batchelor, AD and Xu, MM and Maher, DM}, year={1999}, month={Jun}, pages={2344–2352} }
 @article{pa o'neil_ozturk_batchelor_maher_1999, title={Effects of oxygen on selective silicon deposition using disilane}, volume={38}, ISSN={["0167-577X"]}, DOI={10.1016/S0167-577X(98)00200-6}, abstractNote={Using Si2H6 in an ultrahigh vacuum rapid thermal chemical vapor deposition reactor, we have investigated the role of high levels of oxygen (>5×10−6 Torr) introduced during selective silicon deposition. The effects of oxygen have been investigated with regard to oxygen incorporation, selectivity with respect to thermal SiO2, growth rate, and epitaxial quality. The addition of oxygen was found to enhance the inherent process selectivity of Si2H6 to SiO2 while causing no reduction in the silicon growth rate or measurable oxygen incorporation into the growing film for oxygen pressures below 5×10−5 Torr. Contrary to published reports, the silicon film was devoid of the pyramidal defects usually characteristic to highly oxygenated processes. The silicon surface morphology, however, exhibited increased roughness with increasing oxygen partial pressure. The surface roughness is believed to be a result of the high levels of oxygen adsorbed at the initial growth surface.}, number={6}, journal={MATERIALS LETTERS}, author={PA O'Neil and Ozturk, MC and Batchelor, AD and Maher, DM}, year={1999}, month={Mar}, pages={418–422} }
 @article{pa o'neil_ozturk_batchelor_venables_xu_maher_1999, title={Growth of selective silicon epitaxy using disilane and chlorine on heavily implanted substrates - I. Role of implanted BF2}, volume={146}, ISSN={["0013-4651"]}, DOI={10.1149/1.1392052}, abstractNote={In this report, we present results on the low thermal budget deposition of selective silicon epitaxy on heavily arsenic implanted substrates using Si 2 H 6 and Cl 2 in an ultrahigh vacuum rapid thermal chemical vapor deposition reactor. The selectivity of silicon to SiO 2 as well as the silicon growth kinetics, epitaxial quality, and dopant incorporation for varying substrate implant dose conditions and varying levels of chlorine during processing were investigated. We demonstrate that an increase in the arsenic implant dose can reduce the silicon growth by means of an inherent incubation time for deposition occurring in a chlorinated ambient. The extent to which the silicon growth suppression occurs, however, can be lessened by specific changes in the system conditions, and therefore, growth reductions due to arsenic can be minimized. In addition to changes in the silicon growth kinetics, arsenic implanted substrates have demonstrated a tendency to degrade the surface morphology and enhance the density of defects within the deposited silicon epitaxial films. Furthermore, by depositing the silicon film immediately following implantation and prior to any high temperature anneal, movement of arsenic into the deposited silicon layers has been observed at growth temperatures as low as 800°C. Therefore, the incorporation of arsenic into the deposited epitaxial films has been found to be controllable such that abrupt profiles or intentional diffuse structures can be achieved by variation of the process sequence and the annealing conditions.}, number={8}, journal={JOURNAL OF THE ELECTROCHEMICAL SOCIETY}, author={PA O'Neil and Ozturk, MC and Batchelor, AD and Venables, D and Xu, MM and Maher, DM}, year={1999}, month={Aug}, pages={3070–3078} }
 @article{pa o'neil_ozturk_batchelor_venables_maher_1999, title={Growth of selective silicon epitaxy using disilane and chlorine on heavily implanted substrates - II. Role of implanted arsenic}, volume={146}, ISSN={["0013-4651"]}, DOI={10.1149/1.1392053}, abstractNote={In this report, we present results on the low thermal budget deposition of selective silicon epitaxy on heavily arsenic implanted substrates using and in an ultrahigh vacuum rapid thermal chemical vapor deposition reactor. The selectivity of silicon to as well as the silicon growth kinetics, epitaxial quality, and dopant incorporation for varying substrate implant dose conditions and varying levels of chlorine during processing were investigated. We demonstrate that an increase in the arsenic implant dose can reduce the silicon growth by means of an inherent incubation time for deposition occurring in a chlorinated ambient. The extent to which the silicon growth suppression occurs, however, can be lessened by specific changes in the system conditions, and therefore, growth reductions due to arsenic can be minimized. In addition to changes in the silicon growth kinetics, arsenic implanted substrates have demonstrated a tendency to degrade the surface morphology and enhance the density of defects within the deposited silicon epitaxial films. Furthermore, by depositing the silicon film immediately following implantation and prior to any high temperature anneal, movement of arsenic into the deposited silicon layers has been observed at growth temperatures as low as 800°C. Therefore, the incorporation of arsenic into the deposited epitaxial films has been found to be controllable such that abrupt profiles or intentional diffuse structures can be achieved by variation of the process sequence and the annealing conditions. © 1999 The Electrochemical Society. All rights reserved.}, number={8}, journal={JOURNAL OF THE ELECTROCHEMICAL SOCIETY}, author={PA O'Neil and Ozturk, MC and Batchelor, AD and Venables, D and Maher, DM}, year={1999}, month={Aug}, pages={3079–3086} }
 @article{ban_ozturk_1999, title={In situ phosphorus doping during silicon epitaxy in an ultrahigh vacuum rapid thermal chemical vapor deposition reactor}, volume={146}, ISSN={["0013-4651"]}, DOI={10.1149/1.1392631}, abstractNote={Phosphorus incorporation during selective silicon epitaxy using the phosphine (PH 3 ), disilane (Si 2 H 6 ), and chlorine (Cl 2 ) chemistry in a cold-wall ultrahigh vacuum rapid thermal chemical vapor deposition reactor was investigated. We have studied the dependence of silicon growth rate and phosphorus incorporation on phosphine partial pressure and temperature in the range of ∼10 -9 to 10 -6 Torr, and 650 to 800°C, respectively. Even at such low partial pressures, phosphorus concentration above 10 18 cm -3 was obtained due to the high sticking coefficient of phosphine. Phosphorus incorporation was found to be a strong function of temperature. Two possible incorporation mechanisms have been discussed in detail: surface electronic effects created by silicon becoming extrinsic at high phosphorus concentrations and high phosphorus surface coverage in the form of P-P dimers. A reduction in silicon growth rate was observed due to phosphine. Doping concentration was found to be uniform in the films at low temperatures (650-750°C) accompanied with by phosphorus peaks at interfaces for growth temperatures above 800°C. A significant chamber memory effect was observed in the process which prohibits intrinsic silicon deposition following an in situ phosphorus-doped layer.}, number={11}, journal={JOURNAL OF THE ELECTROCHEMICAL SOCIETY}, author={Ban, I and Ozturk, MC}, year={1999}, month={Nov}, pages={4303–4308} }
 @article{celik_ozturk_1999, title={Low thermal budget surface preparation for selective epitaxy a study on process robustness}, volume={146}, ISSN={["0013-4651"]}, DOI={10.1149/1.1391804}, abstractNote={The robustness of a low thermal budget surface preparation method for selective silicon epitaxial growth has been investigated. After the HF dip, the stability of hydrogen passivation on Si(100) in deionized water and air has been studied. No significant increase was observed in oxygen and carbon coverage for deionized water rinse times varying from 10 to 1000 s. On wafers exposed to air for up to 10,000 s, carbon coverage on Si(100) stayed at the same level, whereas the oxygen coverage increased steadily. An in situ clean at 800°C for 10 s reduced the interfacial oxygen below the secondary ion mass spectroscopy detection levels on wafers that had been contaminated by exposure to air for up to 1000 s. In situ cleaning was studied in ambients with different partial pressures of intentionally introduced oxygen and nitrogen backgrounds. Oxygen was removed from Si(100) during the in situ clean for nitrogen partial pressures up to I X 10 -6 Torr. When the oxygen partial pressure is sufficiently high (I X 10 -6 Torr), oxide removal was not complete after in situ cleaning. There was no observable increase in the surface roughness for samples annealed in oxygen partial pressure up to I × 10 -5 Torr. Hydrogen passivation was removed from the substrates and the surfaces were exposed to vacuum at room temperature for different times. After 10,000 s, the oxygen coverage was less than 2% of a monolayer. The carbon contamination on the surface was instantaneous and no additional carbon accumulation on the surface was observed up to 10,000 s. There was no apparent increase in the defect density for these wait times.}, number={4}, journal={JOURNAL OF THE ELECTROCHEMICAL SOCIETY}, author={Celik, SM and Ozturk, MC}, year={1999}, month={Apr}, pages={1557–1564} }
 @article{pa o'neil_ozturk_batchelor_xu_maher_1999, title={Quality of selective silicon epitaxial films deposited using disilane and chlorine}, volume={146}, ISSN={["0013-4651"]}, DOI={10.1149/1.1391937}, abstractNote={We have previously reported on the selectivity and growth of a silicon epitaxy process using Si 2 H 6 and Cl 2 in an ultrahigh-vacuum rapid thermal chemical vapor deposition reactor. In this report, we have extended the previous work and provide information regarding the structural and electrical quality of thick (3000 A) selective silicon epitaxial layers deposited under a variety of growth conditions. Electrical test structures, including enclosed n-channel metal oxide semiconductor field effect transistors (MOSFETs) and large-area gated diodes, were fabricated within the epitaxial layers. We demonstrate that variations in the chlorine to silicon ratio (Cl/Si) and the process temperature can lead to structural defects and low generation lifetimes. The defects, however, had a benign effect over the MOSFET drive current and channel transconductance. Overall, the results in this study indicate that high levels of chlorine, as well as low growth temperatures, can potentially inhibit the structural and/or electrical quality of selectively deposited silicon films. However, for growth at or above 800°C with Cl/Si ratio of 0.23, excellent selectivity as well as extremely high bulk generation lifetimes can be obtained for films with structural defect densities well below the detection limits used within this study.}, number={6}, journal={JOURNAL OF THE ELECTROCHEMICAL SOCIETY}, author={PA O'Neil and Ozturk, MC and Batchelor, AD and Xu, MM and Maher, DM}, year={1999}, month={Jun}, pages={2337–2343} }
 @article{celik_ozturk_1998, title={Low thermal budget in situ surface cleaning for selective silicon epitaxy}, volume={145}, ISSN={["0013-4651"]}, DOI={10.1149/1.1838849}, abstractNote={In this paper, we present a process which provides low thermal budget removal of carbon, oxygen, and chlorine from the silicon surface by annealing the substrate in a vacuum ambient with water and oxygen partial pressures less than 10 9 Torr. Following the in situ clean, silicon was deposited epitaxially, and carbon, oxygen, and chlorine levels at the epitaxy/substrate interface were quantified using secondary ion mass spectroscopy. It was demonstrated that these contaminants were removed from the silicon surface with a 10 s anneal at temperatures as low as 750°C. Both SiO 2 patterned and bare silicon wafers were employed, and the patterns on the surface did not show any effect on the in situ clean efficiency. The impact of chlorine as a contaminant was also studied, and no effect on the in situ cleaning efficiency was observed. Surface roughness was quantified by atomic force microscopy, which revealed that surface roughness on Si did not increase after in situ cleaning in vacuum. A defect analysis was performed using optical and scanning electron microscopy. A correlation was obtained between the defect density and the carbon levels at the epitaxy/substrate interface. However, electrical device characterization did not show any correlation between different in situ clean temperatures and the n-channel metal-oxidation-silicon field effect transistor leakage current or transconductance.}, number={10}, journal={JOURNAL OF THE ELECTROCHEMICAL SOCIETY}, author={Celik, SM and Ozturk, MC}, year={1998}, month={Oct}, pages={3602–3609} }
 @inproceedings{srivastava_sun_bellur_bartholomew_o'neil_celik_osburn_masnari_ozturk_westhoff_et al._1997, title={A 0.18 ?m CMOS technology for elevated source/drain MOSFETs using selective silicon epitaxy}, booktitle={ULSI science and technology/1997: Proceedings of the Sixth International Symposium on UltraLarge Scale Integration Science and Technology (Proceedings (Electrochemical Society); v. 97-3)}, publisher={Pennington, NJ: Electrochemical Society}, author={Srivastava, A. and Sun, J. and Bellur, K. and Bartholomew, R. F. and O'Neil, P. and Celik, S. M. and Osburn, C. M. and Masnari, N. A. and Ozturk, M. C. and Westhoff, R. and et al.}, year={1997}, pages={571–585} }
 @article{oneil_ozturk_violette_batchelor_christensen_maher_1997, title={Optimization of process conditions for selective silicon epitaxy using disilane, hydrogen, and chlorine}, volume={144}, ISSN={["0013-4651"]}, DOI={10.1149/1.1838003}, abstractNote={We have previously reported a process for low temperature selective silicon epitaxy using Si 2 H 6 , H 2 , and Cl 2 in an ultrahigh vacuum rapid thermal chemical vapor deposition reactor. Selective deposition implies that growth occurs on the Si surface but not on any of the surrounding insulator surfaces. Using this method and process chemistry, the level of Cl species required to maintain adequate selectivity has been greatly reduced in comparison to SiH 2 Cl 3 -based, conventional CVD approaches. In this report, we have extended upon the previous work and provide information regarding the selectivity of the silicon deposition process to variations in the growth conditions. We have investigated the selectivity of the process to variations in disilane flow/partial pressure, growth temperature, and system contamination. We demonstrate that increases in either the Si 2 H 6 partial pressure or flow rate, the process temperature, or the source contamination levels can lead to selectivity degradation. In regard to the structural quality of the selective epitaxial layers, we have observed epitaxial defects that have appeared to be a strong function of two basic conditions: the contamination level of the process and the chlorine flow rate or chlorine partial pressure. Overall, the results in this study indicate several process conditions that can inhibit the quality of a selective silicon deposition process developed for single-wafer manufacturing.}, number={9}, journal={JOURNAL OF THE ELECTROCHEMICAL SOCIETY}, author={ONeil, PA and Ozturk, MC and Violette, KE and Batchelor, D and Christensen, K and Maher, DM}, year={1997}, month={Sep}, pages={3309–3315} }
 @article{li_mirabedini_kuehn_wortman_ozturk_batchelor_christensen_maher_1997, title={Rapid thermal chemical vapor deposition of in situ boron doped polycrystalline silicon germanium films on silicon dioxide for complimentary metal oxide semiconductor applications}, volume={71}, DOI={10.1063/1.120344}, abstractNote={In situ boron-doped polycrystalline Si1−xGex (x>0.4) films have been formed on the thermally grown oxides in a rapid thermal chemical vapor deposition processor using SiH4-GeH4-B2H6-H2 gas system. Our results showed that in situ boron-doped Si1−xGex films can be directly deposited on the oxide surface, in contrast to the rapid thermal deposition of undoped silicon-germanium (Si1−xGex) films on oxides which is a partially selective process and requires a thin silicon film pre-deposition to form a continuous film. For the in situ boron-doped Si1−xGex films, we observed that with the increase of the germane percentage in the gas source, the Ge content and the deposition rate of the film are increased, while its resistivity is decreased down to 0.66 mΩ cm for a Ge content of 73%. Capacitance-voltage characteristics of p-type metal-oxide-semiconductor capacitors with p+-Si1−xGex gates showed negligible polydepletion effect for a 75 Å gate oxide, indicating that a high doping level of boron at the poly-Si1−xGex/oxide interface was achieved.}, number={23}, journal={Applied Physics Letters}, author={Li, V. Z. Q. and Mirabedini, M. R. and Kuehn, R. T. and Wortman, J. J. and Ozturk, M. C. and Batchelor, D. and Christensen, K. and Maher, D. M.}, year={1997}, pages={3388–3390} }
 @article{ban_ozturk_demirlioglu_1997, title={Suppression of oxidation-enhanced boron diffusion in silicon by carbon implantation and characterization of MOSFET's with carbon-implanted channels}, volume={44}, ISSN={["0018-9383"]}, DOI={10.1109/16.622613}, abstractNote={In NMOS transistors with boron-doped channels, Oxdation-Enhanced Diffusion (OED) is a key contributor to boron profile broadening. Starting with the arguments presented in several recent reports on the role of carbon in silicon as a sink for self-interstitials, we have explored the feasibility of using carbon in the Metal Oxide Silicon Field Effect Transistor (MOSFET) active region to retard boron diffusion during gate oxidation. A highly effective suppression of OED of boron was observed providing more than an order of magnitude reduction in boron diffusivity. MOSFETs with carbon- and boron-implanted channels have been fabricated to evaluate the impact of carbon on the electrical properties of Si. Boron diffusion, activation, and critical electrical parameters including subthreshold swing, threshold voltage, off-state leakage current, and channel mobility have been evaluated as a function of the carbon dose. While our results show that carbon can effectively suppress boron diffusion daring gate oxidation, carbon can also lead to poor boron activation and degradation in MOSFET performance when carbon dose levels above a threshold of /spl sim/10/sup 14/ cm/sup -2/ are utilized. Our results, however, indicate considerable improvement in boron activation with increases in the thermal budget. We show that if carbon implantation damage is annealed out prior to boron implantation, not only is boron activation improved, but carbon continues to serve as a sink for self-interstitials, thereby effectively suppressing OED.}, number={9}, journal={IEEE TRANSACTIONS ON ELECTRON DEVICES}, author={Ban, I and Ozturk, MC and Demirlioglu, EK}, year={1997}, month={Sep}, pages={1544–1551} }
 @article{sun_bartholomew_bellur_oneil_srivastava_violette_ozturk_osburn_masnari_1996, title={Sub-half micron elevated source/drain NMOSFETs by low temperature selective epitaxial deposition}, volume={429}, ISBN={["1-55899-332-0"]}, ISSN={["0272-9172"]}, DOI={10.1557/proc-429-343}, abstractNote={Abstract}, journal={RAPID THERMAL AND INTEGRATED PROCESSING V}, author={Sun, J and Bartholomew, RF and Bellur, K and ONeil, PA and Srivastava, A and Violette, KE and Ozturk, MC and Osburn, CM and Masnari, NA}, year={1996}, pages={343–347} }
 @misc{ozturk_sanganeria_1995, title={Method for forming a layer of uniform thickness on a semiconductor wafer during rapid thermal processing}, volume={5,439,850}, number={1995 Aug. 8}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Ozturk, M. and Sanganeria, M.}, year={1995} }
 @misc{ozturk_grider_sanganeria_ashburn_wortman_1994, title={Selective deposition of doped silicon-germanium alloy on semiconductor substrate, and resulting structures}, volume={5,336,903}, number={1994 Aug. 9}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Ozturk, M. and Grider, D. and Sanganeria, M. and Ashburn, S. and Wortman, J.}, year={1994} }
 @article{masnari_hauser_lucovsky_maher_markunas_ozturk_wortman_1993, title={CENTER FOR ADVANCED ELECTRONIC MATERIALS PROCESSING}, volume={81}, ISSN={["0018-9219"]}, DOI={10.1109/JPROC.1993.752025}, abstractNote={Microelectronics manufacturing technology is rapidly moving toward integrated circuits with submicron minimum feature sizes. This is being driven by the development of devices and circuits with reduced device lateral dimensions, increased density per chip, thinner material layers, increased use of the vertical dimension (three-dimensional circuits), low volume/fast tumaround design (ASIC's), increased use of heterojunctions, mixed material technologies, and quantum-based device structures. These trends require precise control of thin layers processed on wafers and a need for lower temperature processing or a lower overall thermal budget}, number={1}, journal={PROCEEDINGS OF THE IEEE}, author={MASNARI, NA and HAUSER, JR and LUCOVSKY, G and MAHER, DM and MARKUNAS, RJ and OZTURK, MC and WORTMAN, JJ}, year={1993}, month={Jan}, pages={42–59} }
 @misc{ozturk_wortman_1993, title={Deposition of germanium thin films on silicon dioxide employing interposed polysilicon laye}, volume={5,250,452}, number={1993 Oct. 5}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Ozturk, M. and Wortman, J.}, year={1993} }
 @misc{ozturk_grider_sanganeria_ashburn_1993, title={Selective deposition of doped silion-germanium alloy on semiconductor substrate}, volume={5,242,847}, number={1993 Sep. 7}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Ozturk, M. and Grider, D. and Sanganeria, M. and Ashburn, S.}, year={1993} }
 @misc{ozturk_wortman_1992, title={Germanium silicon dioxide gate MOSFET}, volume={5,101,247}, number={1992 Mar. 31}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Ozturk, M. and Wortman, J.}, year={1992} }
 @misc{ozturk_wortman_grider_1992, title={Selective germanium deposition on silicon and resulting structures}, volume={5,089,872}, number={1992 Feb. 18}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Ozturk, M. and Wortman, J. and Grider, D.}, year={1992} }