@article{sarkar_ramanan_jayanti_di spigna_lee_franzon_misra_2014, title={Dual Floating Gate Unified Memory MOSFET With Simultaneous Dynamic and Non-Volatile Operation}, volume={35}, ISSN={["1558-0563"]}, DOI={10.1109/led.2013.2289751}, abstractNote={Dual floating gate flash memory has been fabricated and characterized to show dynamic operation, non-volatile operation, and simultaneous dynamic and non-volatile operation. The gate stack consists of a thin dielectric separating two floating gates sandwiched between a tunnel dielectric and interpoly dielectric. The quality of the thin dielectric that separates the floating gates is of utmost importance to retain dynamic operation. In this letter, we investigate a dual floating gate memory transistor and show its potential to combine DRAM and flash functionality in the same device.}, number={1}, journal={IEEE ELECTRON DEVICE LETTERS}, author={Sarkar, Biplab and Ramanan, Narayanan and Jayanti, Srikant and Di Spigna, Neil and Lee, Bongmook and Franzon, Paul and Misra, Veena}, year={2014}, month={Jan}, pages={48–50} }
 @inproceedings{sarkar_jayanti_spigna_lee_misra_franzon_2013, title={Investigation of intermediate dielectric for dual floating gate MOSFET}, DOI={10.1109/nvmts.2013.6851052}, abstractNote={A dual floating gate transistor offers potential as a unified memory, with simultaneous volatile and non-volatile storage. The quality of the dielectric between the two floating gates is critical to achieving the required dynamic cycle endurance. This paper reports on the results of early experiments into the material choice and process for this dielectric.}, booktitle={2013 13th Non-Volatile Memory Technology Symposium (NVMTS)}, author={Sarkar, B. and Jayanti, S. and Spigna, N. Di and Lee, B. and Misra, V. and Franzon, Paul}, year={2013} }
 @article{jayanti_misra_2011, title={Suppression of dielectric crystallization on metal by introduction of SiO2 layer for metal floating gate memory blocking oxide}, volume={99}, ISSN={["1077-3118"]}, DOI={10.1063/1.3661173}, abstractNote={A technique of reducing the higher degree of dielectric crystallization on polycrystalline metal has been investigated by inserting a thin SiO2 layer interfacing the metal for application as high-k blocking oxide in metal floating gate FLASH memories. Grazing incidence x-ray diffraction study showed that the insertion of an amorphous interfacial layer (IL) suppresses the crystallization of HfAlO blocking oxide considerably. The electrical performance of the blocking oxide stacks was characterized using metal-insulator-metal capacitors, and the thermal stability was observed to improve by more than an order of magnitude with the incorporation of SiO2 IL.}, number={22}, journal={APPLIED PHYSICS LETTERS}, author={Jayanti, Srikant and Misra, Veena}, year={2011}, month={Nov} }
 @article{jayanti_yang_lichtenwalner_misra_2010, title={Technique to improve performance of Al2O3 interpoly dielectric using a La2O3 interface scavenging layer for floating gate memory structures}, volume={96}, ISSN={["0003-6951"]}, DOI={10.1063/1.3355547}, abstractNote={A technique of scavenging the SiO2 interfacial layer (IL) to improve the electrical performance of Al2O3 as the interpoly dielectric for flash memories has been studied. Scavenging was performed by the reaction of a thin La2O3 layer with the native oxide to form a high-κ lanthanum silicate. Significant improvement in the charge trapping and leakage characteristics were obtained. Transmission electron microscopy analysis was done to corroborate the electrical results. Results show that seven orders of magnitude leakage reduction was achieved by the replacement of the SiO2 IL with a higher-κ dielectric LaSiO at the Si interface.}, number={9}, journal={APPLIED PHYSICS LETTERS}, author={Jayanti, Srikant and Yang, Xiangyu and Lichtenwalner, Daniel J. and Misra, Veena}, year={2010}, month={Mar} }