Tse-Han Pan

College of Engineering

2023 article

Chiplet Set For Artificial Intelligence

2023 IEEE INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE, 3DIC.

By: J. Stevens n, T. Pan n, P. Ravichandiran n & P. Franzon n

author keywords: ASIP; chiplet; AI accelerator; AIB
TL;DR: This paper presents a chipletized design used for Artificial Intelligence, which details a scalable AI chiplet set, along with Central Processing Units (CPUs), and focuses on phase one, which uses the United Semiconductor Japan Co. (USJC) 55 nm LP process to fabricate the design. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: August 14, 2023

2023 article

System Aware Floorplanning for Chip-Package Co-design

2023 IEEE 32ND CONFERENCE ON ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS, EPEPS.

By: T. Pan n, P. Franzon n, V. Srinivas*, M. Nagarajan* & D. Popovic*

author keywords: Floorplanning; Chip-package co-design
TL;DR: A new floorplanning solution based on a novel floorplan model that more closely depicts the design challenges imposed by modern SoC system constraints is presented. (via Semantic Scholar)
UN Sustainable Development Goal Categories
11. Sustainable Cities and Communities (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: January 2, 2024

2021 article

Design Benefits of Hybrid Bonding for 3D Integration

IEEE 71ST ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2021), pp. 1876–1881.

By: T. Nigussie*, T. Pan n, S. Lipa n, W. Pitts n, J. DeLaCruz* & P. Franzon n

author keywords: 3DIC; Hybrid bonding; DBI; Thermo-Compression Bonding; Partitioning; 3D design flow
TL;DR: Electrical and thermal analyses of 3D digital designs using hybrid bonding, specifically using the design rules, and other properties, for the XPERI DBI® technology at a $\mathrm{1.6}\ \mu \ mathrm{m}$ pad pitch are presented. (via Semantic Scholar)
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries
Added: November 1, 2021

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