Works (9)
Updated: July 5th, 2023 15:47
2013 conference paper
Exploring early design tradeoffs in 3DIC
2013 IEEE International Symposium on Circuits and Systems (ISCAS), 545–549.
Event: 2013 IEEE International Symposium on Circuits and Systems (ISCAS) at Beijing, China on May 19-23, 2013
TL;DR:
This paper explores some of the approaches to creating 3D specific designs and the CAD tools that can help in that exploration, together with early results from a thermal pathfinding tool.
(via Semantic Scholar)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018
2012 conference paper
A 10.35 mW/GFlop Stacked SAR DSP unit using fine-grain partitioned 3D integration
2012 ieee custom integrated circuits conference (cicc).
TL;DR:
This paper shows how this technique was used to build the first fine-grain partitioned 3D integrated system to be demonstrated with silicon measurements in the literature, which is an ultra efficient floating-point synthetic aperture radar (SAR) DSP processing unit.
(via Semantic Scholar)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018
2012 journal article
Junction-level thermal analysis of 3-D integrated circuits using high definition power blurring
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 31(5), 676–689.
TL;DR:
This paper presents a resistive mesh-based approach that improves on the fidelity of prior approaches by constructing a thermal model of the full structure of 3DICs, including the interconnect, and introduces a method for dividing the thermal response caused by a heat load into a high fidelity “near response” and a lower fidelity” in order to implement Power Blurring high definition (HD).
(via Semantic Scholar)
UN Sustainable Development Goal Categories
9. Industry, Innovation and Infrastructure
(Web of Science)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018
2011 conference paper
3D specific systems: Design and CAD
2011 Asian Test Symposium, 470–473.
Event: 2011 Asian Test Symposium at New Delhi, India on November 20-23, 2011
author keywords: 3DIC; 3D IC; three dimensional IC; TSV; stacked memory; memory on logic; FFT
UN Sustainable Development Goal Categories
9. Industry, Innovation and Infrastructure
(Web of Science)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018
2011 journal article
Area-Efficient Antenna-Scalable MIMO Detector for K-best Sphere Decoding
JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 68(2), 171–182.
author keywords: MIMO; K-best; Sphere decoder; VLSI
TL;DR:
A reconfigurable in-place architecture that is scalable to an arbitrary number of antennas at run-time, while reducing area significantly compared with other sphere decoders, and to improve the throughput of the in-place architecture without any degradation in BER performance is proposed.
(via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy
(OpenAlex)
11. Sustainable Cities and Communities
(Web of Science)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018
2011 journal article
Reconfigurable five-layer three-dimensional integrated memory-on-logic synthetic aperture radar processor
IET COMPUTERS AND DIGITAL TECHNIQUES, 5(3), 198–204.
TL;DR:
A floating-point synthetic aperture radar processor that achieves a power efficiency of 18.0 mW/GFlop in simulation through the use of three-dimensional (3D) integration and reconfiguration of the data path is presented.
(via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy
(OpenAlex)
9. Industry, Innovation and Infrastructure
(Web of Science)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018
2009 conference paper
A low power 3D integrated FFT engine using hypercube memory division
ISLPED 09, 231–236.
TL;DR:
A floating point FFT processor that leverages both 3D integration and a hypercube memory division scheme to reduce the power consumption of a 1024 point F FT down to 4.227 μJ is demonstrated.
(via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy
(OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018
2009 conference paper
Junction-level thermal extraction and simulation of 3DICs
2009 IEEE International Conference on 3d Systems Integration, 395–401.
Event: 2009 IEEE International Conference on 3D System Integration at San Francisco, CA on September 28-30, 2009
TL;DR:
It was found that lowering the simulation resolution and using composite thermal conductivities failed to accurately predict the location of these tentpoles, so large isolated temperature spikes were found near groups of clock buffers at the edge of the SRAMs on the middle tier.
(via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy
(OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018
conference paper
Comparative analysis of two 3D integration implementations of a SAR processor
Thorolfsson, T., Melamed, S., Charles, G., & Franzon, P. D. 2009 IEEE International Conference on 3d Systems Integration, 25–28.
Source: NC State University Libraries
Added: August 6, 2018
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