William Davis

Zhao, Q., & Davis, W. R. (2021). A Virtual Platform for Object Detection Systems. 2021 IEEE INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE (3DIC). https://doi.org/10.1109/3DIC52383.2021.9687602

Wang, Z., & Davis, W. R. (2021). An Instruction-Level Power and Energy Model for the Rocket Chip Generator. 2021 IEEE/ACM INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN (ISLPED). https://doi.org/10.1109/ISLPED52811.2021.9502485

Kalafala, K., Fu, H., Davis, W. R., Aadithya, K., & Clevenger, L. A. (2021, August 16). Bridging the Organization Gap for EDA Machine Learning Data. Presented at the DesignCon.

Francisco, L., Franzon, P., & Davis, W. R. (2021). Fast and Accurate PPA Modeling with Transfer Learning. 2021 ACM/IEEE 3RD WORKSHOP ON MACHINE LEARNING FOR CAD (MLCAD). https://doi.org/10.1109/MLCAD52597.2021.9531109

Davis, W. R., Franzon, P., Francisco, L., Huggins, B., & Jain, R. (2021). Fast and Accurate PPA Modeling with Transfer Learning. 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD). Presented at the 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), Munich, Germany. https://doi.org/10.1109/ICCAD51958.2021.9643533

Sadangi, S., Pasumarthy, V., Pitts, W. S., & Davis, W. R. (2021, May). FreePDK3: A Novel PDK for Physical Verification at the 3nm Node. Presented at the Synopsys Speaker Series.

Frenkil, J., Dhanwada, N., Davis, R., & Ratchkov, D. (2021, March 1). System-Level Power Analysis with IEEE 2416 Power Models. Workshop presented at the Design and Verification Conference and Exhibition (DVCON).

Dhanwada, N., Davis, R., Dhanwada, N., & Frenkil, J. (2021, July 28). UPM/IEEE 2416 Power Modeling Standard: A Practitioner’s Perspective. Embedded Tutorial presented at the IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED).

Davis, W. R. (2021, August). Views from the Cloud. Panel Discussion presented at the Si2 Annual Technical Forum.

Davis, W. R. (2020, April). A Gentle Introduction to the Open Model Interface for Reliability Simulations. Presented at the Si2 OpenAccess Live Forum.

Davis, W. R., & Shaw, C. (2020, April). An Industry-standard approach toward modeling device aging. Virtual session video presented at the International Reliability Physics Symposium.

Francisco, L., Lagare, T., Jain, A., Chaudhary, S., Kulkarni, M., Sardana, D., … Franzon, P. (2020). Design Rule Checking with a CNN Based Feature Extractor. PROCEEDINGS OF THE 2020 ACM/IEEE 2ND WORKSHOP ON MACHINE LEARNING FOR CAD (MLCAD '20), pp. 9–14. https://doi.org/10.1145/3380446.3430625

Davis, W. R. (2020, January 30). EDA Roadmap for Machine Learning & AI Standardization. Panel Discussion, presented at the DesignCon, Santa Clara, CA.

Davis, W. R., Shaw, C., & Hassan, A. R. (2020). How to write a compact reliability model with the Open Model Interface (OMI. 2020 IEEE International Reliability Physics Symposium (IRPS). Presented at the 2020 IEEE International Reliability Physics Symposium (IRPS), Dallas, TX. https://doi.org/10.1109/IRPS45951.2020.9128222

Baker, A., Davis, W. R., Dhanwada, N., Frenkil, J., & Ratchkov, D. (2020, July 20). System Level Power Analysis with UPM. Virtual tutorial presented at the Design Automation Conference (DAC).

Park, J. B., Davis, W. R., & Franzon, P. D. (2019). 3-D-DATE: A Circuit-Level Three-Dimensional DRAM Area, Timing, and Energy Model. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 66(2), 756–768. https://doi.org/10.1109/TCSI.2018.2868901

Gupta, B., & Davis, W. R. (2019). Characterization of Fast, Accurate Leakage Power Models for IEEE P2416. 20th International Symposium on Quality Electronic Design (ISQED). Presented at the 20th International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA. https://doi.org/10.1109/ISQED.2019.8697565

Bhanushali, K., & Davis, W. R. (2019, March 14). Development of FreePDK: An Open-Source Process Design Kit for Advanced Technology Nodes. Presented at the Free Silicon Conference (FSiC).

Huggins, B., Davis, W. R., & Franzon, P. (2019). Estimating Pareto Optimum Fronts to Determine Knob Settings in Electronic Design Automation Tools. 20th International Symposium on Quality Electronic Design (ISQED). Presented at the 20th International Symposium on Quality Electronic Design (ISQED), Santa Clara, CA. https://doi.org/10.1109/ISQED.2019.8697576

Davis, W. R. (2019, June 3). Is Your AI-based EDA Tool Production-Ready? Panel discussion presented at the Design Automation Conference.

Davis, W. R. (2019, October). OpenAccess Partitions: How Fast Can We Go? Presented at the Si2 OpenAccess Live Forum.

Davis, W. R. (2019, June 5). OpenAccess Partitions: How Fast Can We Go? Presented at the Design Automation Conference, Las Vegas, NV.

Harris, T. R., Davis, W. R., Lipa, S., Pitts, W. S., & Franzon, P. D. (2019). Vertical Stack Thermal Characterization of Heterogeneous Integration and Packages. 2019 International 3D Systems Integration Conference (3DIC). Presented at the 2019 International 3D Systems Integration Conference (3DIC), Sendai, Japan. https://doi.org/10.1109/3DIC48104.2019.9058784

Davis, W. R. (2018, January). Physical Design of a Stacked Heterogeneous Multi-Core Processor. Presented at the ARM Research, Cambridge, UK.

Srinivasan, V., Chowdhury, R. B. R., Forbes, E., Widialaksono, R., Zhang, Z. Q., Schabel, J., … Franzon, P. D. (2017). H3 (heterogeneity in 3D): A logic-on-logic 3D-stacked heterogeneous multi-core processor. 2017 IEEE International Conference on Computer Design (ICCD), 145–152. https://doi.org/10.1109/ICCD.2017.30

Davis, W. R. (2017, September 19). Physical Design of a Stacked Heterogeneous Multi-Core Processor. Presented at the Oxford Circuits and Systems Conference, Oxford, UK.

Harris, T. R., Davis, W. R., & Franzon, P. (2016). Novel packaging and thermal measurement for 3D heterogeneous stacks. 2016 International Symposium on 3D Power Electronics Integration and Manufacturing (3D-PEIM). Presented at the 2016 International Symposium on 3D Power Electronics Integration and Manufacturing, Raleigh, NC. https://doi.org/10.1109/3DPEIM.2016.7570543

Widialaksono, R. H., Chowdhury, R. B. R., Zhang, Z., Schabel, J., Lipa, S., Rotenberg, E., … Franzon, P. (2016). Physical Design of a 3D-Stacked Heterogeneous Multi-Core Processor. 2016 IEEE International 3D Systems Integration Conference (3DIC). Presented at the 2016 IEEE International 3D Systems Integration Conference (3DIC), -San Francisco, CA. https://doi.org/10.1109/3DIC.2016.7970036

Harris, T. R., Pavlidis, G., Wyers, E. J., Newberry, D. M., Graham, S., Franzon, P., & Davis, W. R. (2016). Thermal raman and IR measurement of heterogeneous integration stacks. 2016 15th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm), 1505–1510. https://doi.org/10.1109/ITHERM.2016.7517727

Franzon, P. D., Rotenberg, E., Davis, W. R., Tuck, J., Davis, W. R., Zhou, H., … Lipa, S. (2015). Computing in 3D. 2015 International 3D Systems Integration Conference (3DIC). Presented at the 10.1109/3DIC.2015.7334571, Sendai, Japan. https://doi.org/10.1109/3DIC.2015.7334571

Bhanushali, K., & Davis, W. R. (2015). FreePDK15: An Open-Source Predictive Process Design Kit for 15nm FinFET Technology. In ISPD '15: Proceedings of the 2015 Symposium on International Symposium on Physical Design (pp. 165–170). https://doi.org/10.1145/2717764.2717782

Harris, T. R., Wyers, E. J., Wang, L., Graham, S., Pavlidis, G., Franzon, P., & Davis, W. R. (2015). Thermal simulation of heterogeneous GaN/ InP/silicon 3DIC stacks. 2015 International 3D Systems Integration Conference (3DIC), 1–3. https://doi.org/10.1109/3DIC.2015.7334616

Chen, Xi, Zhu, T., Davis, W. R., & Franzon, P. D. (2014). Adaptive and Reliable Clock Distribution Design for 3-D Integrated Circuits. IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 4(11), 1862–1870. https://doi.org/10.1109/tcpmt.2014.2361356

Priyadarshi, S., Hu, J., Steer, M. B., Franzon, P. D., & Davis, W. R. (2014). Electrothermal Simulation of Three Dimensional Integrated Circuits. In R. Sharma (Ed.), Design of 3D Integrated Circuits and Systems. Boca Raton, FL: CRC Press.

Priyadarshi, S., Davis, W. R., & Franzon, P. D. (2014). Pathfinder3D: A framework for exploring early thermal tradeoffs in 3DIC. 2014 IEEE International Conference on IC Design & Technology. Presented at the 2014 IEEE International Conference on IC Design & Technology (ICICDT). https://doi.org/10.1109/icicdt.2014.6838612

Priyadarshi, S., Davis, W. R., Steer, M. B., & Franzon, P. D. (2014). Thermal Pathfinding for 3-D ICs. IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 4(7), 1159–1168. https://doi.org/10.1109/tcpmt.2014.2321005

Dhanwada, N., Davis, R., & Frenkil, J. (2014). Towards a Standard Flow for System Level Power Modeling. 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD). Presented at the 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), San Jose, CA. https://doi.org/10.1109/ICCAD.2014.7001333

Franzon, P. D., Rotenberg, E., Tuck, J., Davis, W. R., Zhou, H., Schabel, J., … Thorolfsson, T. (2013). Applications and design styles for 3DIC. 2013 IEEE International Electron Devices Meeting. Presented at the 2013 IEEE International Electron Devices Meeting, Washington, DC. https://doi.org/10.1109/IEDM.2013.6724717

Tshibangu, N. M., Franzon, P. D., Rotenberg, E., & Davis, W. R. (2013). Design of controller for L2 cache mapped in Tezzaron stacked DRAM. 2013 IEEE International 3D Systems Integration Conference (3DIC). Presented at the 2013 IEEE International 3D Systems Integration Conference (3DIC), San Francisco, CA. https://doi.org/10.1109/3dic.2013.6702397

Franzon, P. D., Priyadarshi, S., Lipa, S., Davis, W. R., & Thorolfsson, T. (2013). Exploring early design tradeoffs in 3DIC. 2013 IEEE International Symposium on Circuits and Systems (ISCAS), 545–549. https://doi.org/10.1109/iscas.2013.6571901

Priyadarshi, S., Choudhary, N., Dwiel, B., Upreti, A., Rotenberg, E., Davis, R., & Franzon, P. (2013). Hetero(2) 3d integration: A scheme for optimizing efficiency/cost of chip multiprocessors. Proceedings of the fourteenth international symposium on quality electronic design (ISQED 2013), 1–7. https://doi.org/10.1109/isqed.2013.6523582

Rotenberg, E., Dwiel, B. H., Forbes, E., Zhang, Z., Widialaksono, R., Chowdhury, R. B. R., … al. (2013). Rationale for a 3D heterogeneous multi-core processor. 2013 IEEE 31st International Conference on Computer Design (ICCD), 154–168. https://doi.org/10.1109/ICCD.2013.6657038

Harris, T. R., Priyadarshi, S., Melamed, S., Ortega, C., Manohar, R., Dooley, S. R., … al. (2012). A Transient Electrothermal Analysis of Three-Dimensional Integrated Circuits. IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2(4), 660–667. https://doi.org/10.1109/tcpmt.2011.2178414

Moezzi-Madani, N., Thorolfsson, T., Chiang, P., & Davis, W. R. (2012). Area-Efficient Antenna-Scalable MIMO Detector for K-best Sphere Decoding. JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 68(2), 171–182. https://doi.org/10.1007/s11265-011-0595-9

Priyadarshi, S., Harris, T. R., Melamed, S., Otero, C., Kriplani, N. M., Christoffersen, C. E., … Steer, M. B. (2012). Dynamic electrothermal simulation of three-dimensional integrated circuits using standard cell macromodels. IET Circuits, Devices & Systems, 6(1), 35. https://doi.org/10.1049/iet-cds.2011.0061

Melamed, S., Thorolfsson, T., Harris, T. R., Priyadarshi, S., Franzon, P., Steer, M. B., & Davis, W. R. (2012). Junction-level thermal analysis of 3-D integrated circuits using high definition power blurring. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 31(5), 676–689. https://doi.org/10.1109/tcad.2011.2180384

Dhanwada, N., Hathaway, D., Frenkil, J., Davis, W. R., & Demircioglu, H. (2012). Leakage Power Contributor Modeling. IEEE DESIGN & TEST OF COMPUTERS, 29(2), 71–78. https://doi.org/10.1109/mdt.2012.2183573

Davis, W. R. (2012, October 9). Modeling Power Variability (from Small to Large. Presented at the Silicon Integration Inititative (Si2) Conference.

Priyadarshi, S., Saunders, C. S., Kriplani, N. M., Demircioglu, H., Davis, W. R., Franzon, P. D., & Steer, M. B. (2012). Parallel Transient Simulation of Multiphysics Circuits Using Delay-Based Partitioning. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 31(10), 1522–1535. https://doi.org/10.1109/tcad.2012.2201156

Priyadarshi, S., Hu, J., Choi, W. H., Melamed, S., Chen, X., Davis, W. R., & Franzon, P. D. (2012). Pathfinder 3D: A Flow for System-Level Design Space Exploration. 2011 IEEE International 3D Systems Integration Conference (3DIC). Presented at the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan. https://doi.org/10.1109/3DIC.2012.6262961

Franzon, P. D., Davis, W. R., Thorolfsson, T., & Melamed, S. (2011). 3D specific systems: Design and CAD. 2011 Asian Test Symposium, 470–473. https://doi.org/10.1109/ats.2011.99

Chen, X., Davis, W. R., & Franzon, P. D. (2011). Adaptive clock distribution for 3D integrated circuits. 2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems, 91–94. https://doi.org/10.1109/epeps.2011.6100195

Moezzi-Madani, N., Thorolfsson, T., Crop, J., Chiang, P., & Davis, W. R. (2011). An energy-efficient 64-QAM MIMO detector for emerging wireless standards. 2011 Design, Automation & Test in Europe. Presented at the 2011 Design, Automation & Test in Europe, Grenoble, France. https://doi.org/10.1109/DATE.2011.5763050

Davis, W. R. (2011, October). Architecture, Design, and CAD for 3D-ICs. Presented at the Institute of Microelectronics, Agency for Science, Technology, and Research (A*STAR), Singapore.

Franzon, P. D., Davis, W. R., Zhou, Z., Priyadarshi, S., Hogan, M., Karnik, T., & Srinivas, G. (2011). Coordinating 3D designs: Interface IP, standards or free form? 2011 IEEE International 3D Systems Integration Conference (3DIC). Presented at the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan. https://doi.org/10.1109/3DIC.2012.6262960

Franzon, P. D., Davis, W. R., & Thorolfsson, T. (2011). Design and Computer Aided Design of 3DIC. In A. Sheibanyrad, F. Pétrot, & A. Jantsch (Eds.), 3D Integration for NoC-based SoC Architectures. Integrated Circuits and Systems (pp. 75–88). https://doi.org/10.1007/978-1-4419-7618-5_4

Davis, W. R., & Demircioglu, H. (2011). Predictive Process Design Kits. In Y. Cao (Ed.), Predictive Technology Model for Robust Nanoelectronic Design. Integrated Circuits and Systems (pp. 121–140). https://doi.org/10.1007/978-1-4614-0445-3_8

Davis, W. R. (2011, June 5). Test & Reliability Challenges in 3D NoCs. Presented at the Design Automation Conference (DAC) Workshop on Diagnostic Services in Networks-on-Chip: Test, Debug, & On-Line Monitoring.

Chen, X., Zhu, T., & Davis, W. R. (2011). Three-dimensional SRAM design with on-chip access time measurement. ELECTRONICS LETTERS, 47(8), 485–486. https://doi.org/10.1049/el.2010.3701

Moezzi-Madani, N., Thorolfsson, T., & Davis, W. R. (2010). A Low-Area Flexible MIMO Detector for WiFi/WiMAX Standards. 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010). Presented at the 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), Dresden, Germany. https://doi.org/10.1109/DATE.2010.5457073

Moezzi-Madani, N., Thorolfsson, T., & Davis, W. R. (2010). Algorithm and hardware complexity reduction techniques for k-best sphere decoders. GLSVLSI '10: Proceedings of the 20th symposium on Great lakes symposium on VLSI, 471–476. https://doi.org/10.1145/1785481.1785589

Franzon, P., Davis, W. R., Thorolfsson, T., & Melamed, S. L. (2010). Creating 3D Specific Systems: Architecture, Design and CAD. International Symposium on Microelectronics, 2010(1), 23–27. https://doi.org/10.4071/isom-2010-TA1-Paper4

Franzon, P. D., Davis, W. R., & Thorolfsson, T. (2010). Creating 3D Specific Systems: Architecture, Design, and CAD. 2010 Design, Automation & Test in Europe Conference & Exhibition, 1684–1688. https://doi.org/10.1109/DATE.2010.5457086

Melamed, S., Thorolfsson, T., Srinivasan, A., Cheng, E., Franzon, P., & Davis, W. R. (2010, October). Investigation of tier-swapping to improve the thermal profile of memory-on-logic 3DICs. Presented at the International Workshop on Thermal Investigations of ICs and Systems (THERMINIC).

Thorolfsson, T., Melamed, S., Davis, W. R., & Franzon, P. D. (2010). Low Power Hypercube Divided Memory FFT Engine Using 3D Integration. ACM Transactions on Design Automation of Electronic Systems, 16(1), 1–25. https://doi.org/10.1145/1870109.1870114

Davis, W. R. (2010, June 13). Modeling Layout-Dependent Stress Effects: Opportunities for OpenDFM. Presented at the Design Automation Conference (DAC) Open Design-for-Manufacturability (OpenDFM) Workshop.

Chen, X., & Davis, W. R. (2010, September 13). Thermal Adaptive Clock Design for 3D Integrated Circuits. Presented at the Semiconductor Research Corporation (SRC) TECHCON.

Harris, T. R., Melamed, S., Luniya, S., Davis, W. R., Steer, M. B., Doxsee, L. E., … Hawkinson, C. (2010). Thermal analysis and verification of a mounted monolithic integrated circuit. Proceedings of the IEEE SoutheastCon 2010 (SoutheastCon), 37–40. https://doi.org/10.1109/SECON.2010.5453924

Davis, W. R., Oh, E. C., Sule, A. M., & Franzon, P. D. (2009). Application Exploration for 3-D Integrated Circuits: TCAM, FIFO, and FFT Case Studies. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 17(4), 496–506. https://doi.org/10.1109/TVLSI.2008.2009352

Hourani, R., Jenkal, R., Davis, W. R., & Alexander, W. (2009). Automated Design Space Exploration for DSP Applications. JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 56(2-3), 199–216. https://doi.org/10.1007/s11265-008-0226-2

Chen, X., & Davis, W. R. (2009). Delay analysis and design exploration for 3D SRAM. 2009 IEEE International Conference on 3d Systems Integration, 244–247. https://doi.org/10.1109/3dic.2009.5306558

Moezzi-Madani, N., & Davis, W. R. (2009). High-Throughput Low-Complexity MIMO Detector Based on K-Best Algorithm. GLSVLSI '09: Proceedings of the 19th ACM Great Lakes symposium on VLSI, 451–456.

Melamed, S., Thorolfsson, T., Srinivasan, A., Cheng, E., Franzon, P., & Davis, R. (2009). Junction-level thermal extraction and simulation of 3DICs. 2009 IEEE International Conference on 3d Systems Integration, 395–401. https://doi.org/10.1109/3DIC.2009.5306529

Moezzi-Madani, N., & Davis, W. R. (2009). Parallel merge algorithm for high-throughput signal processing applications. ELECTRONICS LETTERS, 45(3), 188–189. https://doi.org/10.1049/el:20092616

Davis, W. R. (2009, October). Prototyping in 3D-ICs: Design Flow Needs. Presented at the Silicon Integration Inititative (Si2) and Global Semiconductor Association (GSA) Workshop on Requirements for 3D Design Flow Interoperability Standards.

Mineo, C., & Davis, W. R. (2009, February). Save Your Energy: A Fast and Accurate Approach to NoC Power Estimation. Presented at the Workshop on 3D Integration and Interconnect-Centric Architectures (in conjunction with the International Symposium on High Performance Computer Architecture.

Davis, W. R. (2009, December). The Benefits of 3D Networks-on-Chip. Presented at the Silicon Integration Initiative (Si2) Low-Power Coalition Technical Steering Group Web-Meeting.

Mineo, C., & Davis, W. R. (2009). The Benefits of 3D networks-on-chip as shown with LDPC decoding. 2009 IEEE International Conference on 3d Systems Integration, 89–96. https://doi.org/10.1109/3dic.2009.5306585

Davis, W. R., Sule, A. M., & Franzon, P. D. (2008). An 8192-point Fast Fourier Transform 3D-IC Case Study. 2008 51st Midwest Symposium on Circuits and Systems, 438–441. https://doi.org/10.1109/MWSCAS.2008.4616830

Davis, W. R. (2008, May). An Architecture Evaluator for Three-Dimensional Integrated Circuits. Presented at the Stanford University ECE Department Seminar.

Hourani, R., Dalal, I., Davis, W. R., Doss, C., & Alexander, W. (2008). An Efficient VLSI Implementation for the 1D Convolutional Discreet Wavelet Transform. 2008 51st Midwest Symposium on Circuits and Systems. Presented at the 2008 51st Midwest Symposium on Circuits and Systems, Knoxville, TN. https://doi.org/10.1109/MWSCAS.2008.4616938

Davis, W. R. (2008, June). Automation and Back-End Design within the FreePDK OpenAccess 45nm PDK and Cell Libraries for University Flows. Presented at the Semiconductor Research Corporation (SRC) e-Workshop.

Franzon, P. D., Davis, W. R., Steer, M. B., Hua, H., Lipa, S., Luniya, S., … Obermiller, K. (2008). Computer-Aided Design and Application Exploration for 3D Integrated Circuits. Proceedings of the Government Microcircuit Applications & Critical Technology (GOMACTech) Conference. Presented at the Government Microcircuit Applications & Critical Technology (GOMACTech) Conference.

Franzon, P. D., Davis, W. R., Steer, M. B., Lipa, S., Oh, E. C., Thorolfsson, T., … Obermiller, K. (2008). Design and CAD for 3D Integrated Circuits. DAC '08: Proceedings of the 45th annual Design Automation Conference, 668–673. https://doi.org/10.1145/1391469.1391642

Davis, W. R. (2008, October). FreePDK: A Free OpenAccess 45nm PDK and Cell Library for Universities. Presented at the Semiconductor Research Corporation (SRC) e-Workshop.

Mineo, C., Jenkal, R., Melamed, S., & Davis, W. R. (2008). Inter-Die Signaling in Three Dimensional Integrated Circuits. 2008 IEEE Custom Integrated Circuits Conference. Presented at the 008 IEEE Custom Integrated Circuits Conference, San Jose, CA. https://doi.org/10.1109/CICC.2008.4672171

Davis, W. R., Sule, A. M., & Schoenfliess, K. M. (2007). 3D Interconnect Device Design: Theory vs. Reality. Future Fab International, (23), 38–40.

Davis, W. R. (2007, June). 3D-IC Design: Theory vs. Reality. Presented at the University of Utah ECE Department Seminar, Salt Lake City, UT.

Jenkal, R. S., & Davis, W. R. (2007). An Architecture for Energy Efficient Sphere Decoding. ISLPED '07: Proceedings of the 2007 international symposium on Low power electronics and design, 244–249. https://doi.org/10.1145/1283780.1283833

Franzon, P., Davis, W. R., Steer, M. B., Hao, H., Lipa, S., Luniya, S., … al. (2007). Design for 3D Integration and Applications. 2007 International Symposium on Signals, Systems and Electronics, 263–266, https://doi.org/10.1109/ISSSE.2007.4294463

Sule, A. M., & Davis, W. R. (2007). Designing FIFO Buffers using 3DIC Technology. VLSI Multilevel Interconnection (VMIC) Conference, 267–272.

Davis, W. R. (2007, September). Energy-Efficient Sphere Decoding (and other research efforts. Presented at the DARPA/OSD Trusted Foundry Circuit Designers Meeting, Essex Junction, VT.

Davis, W. R. (2007, November 5). FreePDK: An Open Source, OpenAccess Design Kit. Presented at the OpenAccess Conference.

Stine, J. E., Castellanos, I., Wood, M., Henson, J., Love, F., Davis, W. R., … Jenkal, R. (2007). FreePDK: An Open-Source Variation-Aware Design Kit. 2007 IEEE International Conference on Microelectronic Systems Education (MSE'07). Presented at the 2007 IEEE International Conference on Microelectronic Systems Education (MSE'07), San Diego, CA. https://doi.org/10.1109/MSE.2007.44

Jenkal, R. S., Hua, H., Sule, A., & Davis, W. R. (2006). Architecture for Energy Efficient Sphere Decoding. 2006 IEEE International SOC Conference, 267–270. https://doi.org/10.1109/SOCC.2006.283895

Hourani, R., Jenkal, R., Davis, W. R., & Alexander, W. (2006). Automated Architectural Exploration for Signal Processing Algorithms. In 2006 IEEE Workshop on Signal Processing Systems Design and Implementation (pp. 274–279,). https://doi.org/10.1109/SIPS.2006.352594

Davis, W. R., & Mineo, C. (2006). Breaking Rent’s Rule: Opportunities for 3D Interconnect Networks. VLSI Multilevel Interconnection (VMIC) Conference, 228–233.

Luniya, S., Batty, W., Caccamesi, V., Garcia, M., Christoffersen, C., Melamed, S., … Steer, M. (2006). Compact Electrothermal Modeling of an X-band MMIC. 2006 IEEE MTT-S International Microwave Symposium Digest, 651–654. https://doi.org/10.1109/MWSYM.2006.249698

Davis, W. R. (2006, April). Demystifying 3D ICs: The Pros and Cons of Going Vertical. Presented at the Virginia Tech ECE Department Seminar, Blacksburg, VA.

Hua, H., Mineo, C., Schoenfliess, K., Sule, A., Melamed, S., Jenkal, R., & Davis, W. R. (2006). Exploring Compromises among Timing, Power and Temperature in Three-Dimensional Integrated Circuits. DAC '06: Proceedings of the 43rd annual Design Automation Conference, 997–1002. https://doi.org/10.1145/1146909.1147161

Hua, H., Mineo, C., Schoenfliess, K., Sule, A., Melamed, S., & Davis, W. R. (2006). Performance Trend in Three-Dimensional Integrated Circuits. 2006 International Interconnect Technology Conference, 45–47. https://doi.org/10.1109/IITC.2006.1648642

Hourani, R., Jenkal, R., Davis, R., & Alexander, W. (2006, April). Tool Integration for Signal Processing Architectural Exploration. Presented at the Electronic Design Process (EDP) Workshop.

Davis, W. R., Wilson, J., Mick, S., Xu, M., Hua, H., Mineo, C., … Franzon, P. D. (2005). Demystifying 3D ICs: The procs and cons of going vertical. IEEE DESIGN & TEST OF COMPUTERS, 22(6), 498–510. https://doi.org/10.1109/MDT.2005.136

Davis, W. R. (2005, November 10). OpenAccess Tools for 3D Integration. Presented at the OpenAccess Conference, San Jose, CA.

Hua, H., Sule, A., Mineo, C., & Davis, W. R. (2005, September 12). Pre-route Net Classing for Crosstalk Avoidance. Presented at the Cadence Designer Network Live Conference (CDNLive), San Jose, CA.

Davis, W. R., Hua, H., Sule, A., Mineo, C., Melamed, S., Steer, M., & Franzon, P. D. (2005). Wire-Delay Reduction Analysis of a 3-Tier, 8-Point Fast Fourier Transform 3D-IC. VLSI Multilevel Interconnection (VMIC) Conference, 474–479.

Davis, W. R., Sule, A. M., & Hua, H. (2004). Multi-Parameter Power Minimization of Synthesized Datapaths. IEEE Computer Society Annual Symposium on VLSI, 151–157. https://doi.org/10.1109/ISVLSI.2004.1339523

Yeo, E., Augsburger, S., Davis, W. R., & Nikolić, B. (2003). 500 Mb/s Soft Output Viterbi Decoder. IEEE Journal of Solid State Circuits, 38(7), 1234–1241. https://doi.org/10.1109/JSSC.2003.813250

Davis, W. R. (2003, February 11). Automated Design Flows for High-Performance Systems. Presented at the OpenAccess Conference, San Jose, CA.

Davis, W. R. (2003). Getting High-Performance Silicon from System-Level Design. IEEE Computer Society Annual Symposium on VLSI, 2003. Proceedings., 238–243. https://doi.org/10.1109/ISVLSI.2003.1183482

Kuusilinna, K., Chang, C., Bluethgen, H. M., Davis, W. R., Richards, B., Nikolić, B., & Brodersen, R. W. (2003). Real-Time System-on-a-Chip Emulation. In G. Martin & H. Chang (Eds.), Winning the SoC Revolution (pp. 229–253). https://doi.org/10.1007/978-1-4615-0369-9_10

Davis, W. R. (2003, February). System-Level Design: Past, Present, and Future. Presented at the University of Tennessee ECE Department Seminar, Knoxville, TN.

Yeo, E., Augsburger, S., Davis, W. R., & Nikolić, B. (2002). 500 Mb/s Soft Output Viterbi Decoder. European Solid-State Circuits Conference (ESSCIRC), 523–526,

Davis, W. R., Zhang, N., Camera, K., Marković, D., Smilkstein, T., Ammer, M. J., … Brodersen, R. W. (2002). A Design Environment for High-Throughput, Low-Power Dedicated Signal Processing Systems. IEEE Journal of Solid State Circuits, 37(3), 420–431. https://doi.org/10.1109/4.987095

Davis, W. R. (2002). A Hierarchical, Automated Design Flow for Low-Power, High-Throughput Digital Signal Processing IC’s (PhD Thesis). Electrical Engineering Department, University of California, Berkeley.

Yeo, E., Augsburger, S., Davis, W. R., & Nikolić, B. (2002). Implementation of high throughput soft output viterbi decoders. IEEE Workshop on Signal Processing Systems, 146–151. https://doi.org/10.1109/SIPS.2002.1049700

Davis, W. R., Zhang, N., Camera, K., Chen, F., Marković, D., Chan, N., … Brodersen, R. W. (2001). A Design Environment for High Throughput, Low Power Dedicated Signal Processing Systems. Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 545–548. https://doi.org/10.1109/CICC.2001.929839

Davis, W. R., Zhang, N., Camera, K., Marković, D., Smilkstein, T., Chan, N., … Brodersen, R. W. (2001). An Automated Design Flow for Low-Power, High-Throughput Dedicated Signal Processing Systems. Conference Record of Thirty-Fifth Asilomar Conference on Signals, Systems and Computers, 475–480. https://doi.org/10.1109/ACSSC.2001.986971

Davis, W. R. (2001, December). An Automated Design Flow for Low-Power, High-Throughput Dedicated Signal Processing Systems. Presented at the MathWorks, Inc. seminar Innovation First: System Level Design for DSP and Communications, Waltham, MA.

Davis, W. R. (2001, September). Design Technology for Low Power Radio Systems. Presented at the Computer Aided Network Design Workshop (CANDE), Grand Teton, WY.

Brodersen, R. W., Davis, W. R., Yee, D., & Zhang, N. (2001). Wireless systems-on-a-chip design. 2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers, 45–48. https://doi.org/10.1109/VTSA.2001.934479