The threat to data privacy has never been more alarming than it is today. Among existing privacy-enhancing technologies, differential privacy is widely accepted as the de facto standard for privacy preservation. Yet, the software-based implementation of differential privacy mechanisms are neither friendly for lightweight devices nor secure against side-channel attacks. In this paper, we propose a first-of-its-kind design regime that realizes differential privacy in hardware memories. The salient feature of this novel design lies in its transformation of the notorious memory noises at sub-nominal voltages into the desired differential privacy noises, thereby achieving power saving and privacy preservation simultaneously — a “win-win” outcome. We demonstrate the feasibility of this design regime using a 1Kb memory prototype based on 45nm technology. For future prospects, a research roadmap that contains open research problems is delineated for the broad research community.