2017 journal article
Multiphysics Performance Evaluation of Flexible Substrate Based 1.2kV SiC Half Bridge Intelligent Power Module with Stacked Dies
International Symposium on Microelectronics, 2017(1), 000353–000359.
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy
(OpenAlex)
Source: Crossref
Added: January 25, 2020
Abstract Wide Bandgap (WBG) power devices have become the most promising solution for power conversion systems, with the best trade-off between theoretical characteristics, real commercial availability and maturity of fabrications. Advanced packaging technology is being heavily developed to take full advantages of WBG devices, in terms of materials, mechanical design, fabrication and electrical performance optimizations. In this paper, a flexible substrate based 1.2kV SiC Half Bridge Intelligent Power Module with stacked dies is introduced. The module design is based on the concept “Power Supply in Package (PSiP)”, high functionality is integrated in the module. Together with power stages, gate driver circuits, Low Dropout Regulators (LDO), digital isolators, and bootstrap circuits are integrated in the module. An ultra-thin flexible epoxy-resin based dielectric is applied in the module as substrates, its thickness can be as low as 80μm, with 8W/mK thermal conductivity. The SiC switches are double-side solderable, with copper as topside metallization on pads. No bonding wires are applied in the SiC PSiP module. The highside and lowside SiC switches on the phase leg is stacked vertically for interconnections with low parasitic and high denstiy. This work mainly addresses performance evaluation of the PSiP SiC half bridge module by multiphysics simulations. Q3D is employed to evaluate the parasitic inductance and resistance in the module, showing that parasitic inductance is lower than 1.5nH in the design. The extracted parasitics is imported in spice circuit model, simulation results show limited ringing during switching transients. Thermal simulations are employed to compare junction temperature of power modules with DBC subtrates and flexible substrates, then to evaluate the thermal performance of the designed PSiP SiC model with stacked dies. It shows that junction temperature of designed IPM is higher than regular module at same condition. The paper also provides guideline for optimized heat sink design to lower junction temperature of the SiC IPM. Mechanical simulations are employed to evaluate the pre-stress induced in modules with DBC substrate and flexible dielectric substrate, and proves that mechanical stress induced by reflowing process can be reduced significantly by using ultra-thin flexible dielectric as substrate.