2021 article

Cite it

Design for 3D Stacked Circuits

2021 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM).

By: P. Franzon ⁿ , W. Davis ⁿ, E. Rotenberg ⁿ, J. Stevens ⁿ, S. Lipa ⁿ, T. Nigussie ⁿ, H. Pan  ⁿ, L. Baker ⁿ ...and 3 other authors, including 1 NC State author, J. Schabel  ⁿ, S. Dey ⁿ & W. Li  ⁿ

TL;DR: 2.5D and 3D technologies can give rise to a node equivalent of scaling due to improved connectivity because of improved connectivity, but design issues that need to be addressed in pursuing such exploitations include thermal management, design for test and computer aided design. (via Semantic Scholar)

10.1109/IEDM19574.2021.9720553

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UN Sustainable Development Goal Categories

9. Industry, Innovation and Infrastructure (Web of Science)

Source: Web Of Science

Added: July 11, 2022

2.5D and 3D technologies can give rise to a node equivalent of scaling due to improved connectivity. Aggressive exploitation scenarios include functional partitioning, circuit partitioning, logic on DRAM, design obfuscation and modular chiplets. Design issues that need to be addressed in pursuing such exploitations include thermal management, design for test and computer aided design.