We report the effects of lanthanum-rich layer thickness and forming gas anneal (FGA) conditions on mobility and threshold voltage ( ${V} _{{\text {T}}}$ ) instability of high-mobility 4H-SiC MOSFETs using lanthanum silicate (LaSiO x ) interface engineering. MOSFETs with LaSiO x after high-temperature FGA show significantly improved ${V} _{\text {T}}$ reliability under positive gate bias. It is found that both the thickness of the initial lanthanum-rich layer and the FGA temperature profoundly influence MOSFET mobility and ${V} _{\text {T}}$ instability under positive bias. There is a tradeoff between mobility and ${V} _{\text {T}}$ shift under positive bias.