Works (2)
Updated: July 5th, 2023 16:04
2004 article
Chip-package co-implementation of a triple DES processor
Schaffer, T., Glaser, A., & Franzon, P. D. (2004, February). IEEE TRANSACTIONS ON ADVANCED PACKAGING, Vol. 27, pp. 194–202.
author keywords: CMOS; DES processor; IC; I/O; MCM package
TL;DR:
Measurements show 3DES operation at 110 MHz, which translates to a throughput of over 7 Gb/s, the highest reported 3DES throughput to date.
(via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy
(OpenAlex)
Sources: Web Of Science, ORCID
Added: August 6, 2018
1997 journal article
The delay vernier pattern generation technique
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 32(4), 551–562.
author keywords: delay circuits; delay-locked loops; delay verniers; signal generators; wave pipelining
TL;DR:
A new technique for generating an arbitrary digital data stream with very fine timing resolution, called the delay vernier generator, which can achieve unprecedented timing resolution in a particular circuit technology.
(via Semantic Scholar)
Source: Web Of Science
Added: August 6, 2018
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