Jimmie J. Wortman

Yang, N., & Wortman, J. J. (2001). A study of the effects of tunneling currents and reliability of sub-2 nm gate oxides on scaled n-MOSFETs. MICROELECTRONICS RELIABILITY, 41(1), 37–46. https://doi.org/10.1016/S0026-2714(00)00099-8

Weintraub, C. E., Vogel, E., Hauser, JR, Yang, N., Misra, V., Wortman, J. J., … Masson, P. (2001). Study of low-frequency charge pumping on thin stacked dielectrics. IEEE TRANSACTIONS ON ELECTRON DEVICES, 48(12), 2754–2762. https://doi.org/10.1109/16.974700

Yang, N., Henson, W. K., & Wortman, J. J. (2000). A comparative study of gate direct tunneling and drain leakage currents in N-MOSFET's with sub-2-nm gate oxides. IEEE TRANSACTIONS ON ELECTRON DEVICES, 47(8), 1636–1644. https://doi.org/10.1109/16.853042

Ahmed, K., Wortman, J. J., & Hauser, JR. (2000). A two-dimensional numerical simulation of pulsed drain current transients in weak inversion and application to interface trap characterization on small geometry MOSFETs with ultrathin oxides. IEEE TRANSACTIONS ON ELECTRON DEVICES, 47(11), 2236–2237. https://doi.org/10.1109/16.877189

Henson, W. K., Yang, N., Kubicek, S., Vogel, E. M., Wortman, J. J., De Meyer, K., & Naem, A. (2000). Analysis of leakage currents and impact on off-state power consumption for CMOS technology in the 100-nm regime. IEEE TRANSACTIONS ON ELECTRON DEVICES, 47(7), 1393–1400. https://doi.org/10.1109/16.848282

Ahmed, K., Ibok, E., Bains, G., Chi, D., Ogle, B., Wortman, J. J., & Hauser, JR. (2000). Comparative physical and electrical metrology of ultrathin oxides in the 6 to 1.5 nm regime. IEEE TRANSACTIONS ON ELECTRON DEVICES, 47(7), 1349–1354. https://doi.org/10.1109/16.848276

Yang, N., Henson, W. K., Hauser, JR, & Wortman, J. J. (2000). Estimation of the effects of remote charge scattering on electron mobility of n-MOSFET's with ultrathin gate oxides. IEEE TRANSACTIONS ON ELECTRON DEVICES, 47(2), 440–447. https://doi.org/10.1109/16.822292

Ahmed, K., De, I., Osburn, C., Wortman, J., & Hauser, J. (2000). Limitations of the modified shift-and-ratio technique for extraction of the bias dependence of L-eff and R-sd of LDD MOSFET's. IEEE TRANSACTIONS ON ELECTRON DEVICES, 47(4), 891–895. https://doi.org/10.1109/16.831010

Ban, I., Ozturk, M. C., Misra, V., Wortman, J. J., Venables, D., & Maher, D. M. (1999). A low-thermal-budget in situ doped multilayer silicon epitaxy process for MOSFET channel engineering. JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 146(3), 1189–1196. https://doi.org/10.1149/1.1391744

Masson, P., Morfouli, P., Autran, J. L., & Wortman, J. J. (1999). Electrical characterization of n-channel MOSFETs with oxynitride gate dielectric formed by low-pressure Rapid Thermal Chemical Vapor Deposition. Microelectronic Engineering, 48(1-4), 211–214.

Masson, P., Morfouli, P., Autran, J. L., Brini, J., Balland, B., Vogel, E. M., & Wortman, J. J. (1999, April 1). Electrical properties of oxynitride thin films using noise and charge pumping measurements. JOURNAL OF NON-CRYSTALLINE SOLIDS, Vol. 245, pp. 54–58. https://doi.org/10.1016/S0022-3093(98)00870-9

Henson, W. K., Ahmed, K. Z., Vogel, E. M., Hauser, JR, Wortman, J. J., Venables, R. D., … Venables, D. (1999). Estimating oxide thickness of tunnel oxides down to 1.4 nm using conventional capacitance-voltage measurements on MOS capacitors. IEEE ELECTRON DEVICE LETTERS, 20(4), 179–181. https://doi.org/10.1109/55.753759

Ahmed, K., Ibok, E., Yeap, G. C. F., Xiang, Q., Ogle, B., Wortman, J. J., & Hauser, JR. (1999). Impact of tunnel currents and channel resistance on the characterization of channel inversion layer charge and polysilicon-gate depletion of sub-20-angstrom gate oxide MOSFET's. IEEE TRANSACTIONS ON ELECTRON DEVICES, 46(8), 1650–1655. https://doi.org/10.1109/16.777153

Misra, V., Lazar, H., Wang, Z., Wu, Y., Niimi, H., Lucovsky, G., … Hauser, J. R. (1999). Interfacial properties of ultrathin pure silicon nitride formed by remote plasma enhanced chemical vapor deposition. Journal of Vacuum Science & Technology. B, Microelectronics and Nanometer Structures, 17(4), 1836–1839.

Yang, N., Henson, W. K., Hauser, JR, & Wortman, J. J. (1999). Modeling study of ultrathin gate oxides using direct tunneling current and capacitance-voltage measurements in MOS devices. IEEE TRANSACTIONS ON ELECTRON DEVICES, 46(7), 1464–1471. https://doi.org/10.1109/16.772492

Shanware, A., Massoud, H. Z., Vogel, E., Henson, K., Hauser, JR, & Wortman, J. J. (1999, September). Modeling the trends in valence-band electron tunneling in NMOSFETs with ultrathin SiO2 and SiO2/Ta2O5 dielectrics with oxide scaling. MICROELECTRONIC ENGINEERING, Vol. 48, pp. 295–298. https://doi.org/10.1016/s0167-9317(99)00392-5

Henson, W. K., Yang, N., & Wortman, J. J. (1999). Observation of oxide breakdown and its effects on the characteristics of ultra-thin-oxide nMOSFET's. IEEE ELECTRON DEVICE LETTERS, 20(12), 605–607. https://doi.org/10.1109/55.806099

Shanware, A., Massoud, H. Z., Acker, A., Li, V. Z. Q., Mirabedini, M. R., Henson, K., … Wortman, J. J. (1999, September). The effects of Ge content in poly-Si1-xGex gate material on the tunneling barrier in PMOS devices. MICROELECTRONIC ENGINEERING, Vol. 48, pp. 39–42. https://doi.org/10.1016/s0167-9317(99)00333-0

Li, V. Z. Q., Mirabedini, M. R., Vogel, E., Henson, K., Batchelor, A. D., Wortman, J. J., & Kuehn, R. T. (1998). Effects of Si source gases (SiH4 and Si2H6) on polycrystalline- Si1-xGex deposited on oxide by RTCVD. Electrochemical and Solid State Letters, 1(3), 153–155.

Srivastava, A., Heinisch, H. H., Vogel, E., Parker, C., Osburn, C. M., Masnari, N. A., … Hauser, JR. (1998). Evaluation of 2.0 nm grown and deposited dielectrics in 0.1 mu m PMOSFETs. RAPID THERMAL AND INTEGRATED PROCESSING VII, Vol. 525, pp. 163–170. https://doi.org/10.1557/proc-525-163

Heinisch, H. H., Hornung, B. E., Linkous, R. B., Craig, S. A., Mirabedini, M. R., & Wortman, J. J. (1998). Impact of floating gate dopant concentration and interpoly dielectric processing on tunnel dielectric reliability. JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 145(4), 1351–1355. https://doi.org/10.1149/1.1838464

Vogel, E. M., Ahmed, K. Z., Hornung, B., Henson, W. K., McLarty, P. K., Lucovsky, G., … Wortman, J. J. (1998). Modeled tunnel currents for high dielectric constant dielectrics. IEEE TRANSACTIONS ON ELECTRON DEVICES, 45(6), 1350–1355. https://doi.org/10.1109/16.678572

Li, V. Z. Q., Mirabedini, M. R., Hornung, B. E., Heinisch, H. H., Xu, M., Batchelor, D., … Kuehn, R. T. (1998). Structure and properties of rapid thermal chemical vapor deposited polycrystalline silicon-germanium films on SiO2 using Si2H6, GeH4, and B2H6 gases. JOURNAL OF APPLIED PHYSICS, 83(10), 5469–5476. https://doi.org/10.1063/1.367404

Morfouli, P., Ghibaudo, G., Vogel, E. M., Hill, W. L., Misra, V., McLarty, P. K., & Wortman, J. J. (1997). Electrical and reliability properties of thin silicon oxinitride dielectrics formed by low pressure rapid thermal chemical vapor deposition. SOLID-STATE ELECTRONICS, 41(7), 1051–1055. https://doi.org/10.1016/S0038-1101(97)00019-1

Li, V. Z. Q., Mirabedini, M. R., Kuehn, R. T., Wortman, J. J., Ozturk, M. C., Batchelor, D., … Maher, D. M. (1997). Rapid thermal chemical vapor deposition of in situ boron doped polycrystalline silicon germanium films on silicon dioxide for complimentary metal oxide semiconductor applications. Applied Physics Letters, 71(23), 3388–3390. https://doi.org/10.1063/1.120344

Hauser, J., Sorrell, F., & Wortman, J. (1995). Three-zone rapid thermal processing system utilizing wafer edge heating means. Washington, DC: U.S. Patent and Trademark Office.

Ozturk, M., Grider, D., Sanganeria, M., Ashburn, S., & Wortman, J. (1994). Selective deposition of doped silicon-germanium alloy on semiconductor substrate, and resulting structures. Washington, DC: U.S. Patent and Trademark Office.

MASNARI, N. A., HAUSER, JR, LUCOVSKY, G., MAHER, D. M., MARKUNAS, R. J., OZTURK, M. C., & WORTMAN, J. J. (1993). CENTER FOR ADVANCED ELECTRONIC MATERIALS PROCESSING. PROCEEDINGS OF THE IEEE, 81(1), 42–59. https://doi.org/10.1109/JPROC.1993.752025

Wortman, J., Sorrell, F., Hauser, J., & Fordham, M. (1993). Conical rapid thermal processing apparatus. Washington, DC: U.S. Patent and Trademark Office.

Ozturk, M., & Wortman, J. (1993). Deposition of germanium thin films on silicon dioxide employing interposed polysilicon laye. Washington, DC: U.S. Patent and Trademark Office.

Ozturk, M., & Wortman, J. (1992). Germanium silicon dioxide gate MOSFET. Washington, DC: U.S. Patent and Trademark Office.

Ozturk, M., Wortman, J., & Grider, D. (1992). Selective germanium deposition on silicon and resulting structures. Washington, DC: U.S. Patent and Trademark Office.