@article{yang_el-shafei_schilling_tonelli_2007, title={Why is stereoregular polyacrylonitrile obtained by polymerization in urea canals isotactic?}, volume={16}, ISSN={["1521-3919"]}, url={http://www.scopus.com/inward/record.url?eid=2-s2.0-36849034629&partnerID=MN8TOARS}, DOI={10.1002/mats.200700043}, abstractNote={Abstract}, number={9}, journal={MACROMOLECULAR THEORY AND SIMULATIONS}, author={Yang, Hyungchol and El-Shafei, Ahmed and Schilling, Frederic C. and Tonelli, Alan E.}, year={2007}, month={Nov}, pages={797–809} }
 @article{lucovsky_yang_niimi_thorpe_phillips_2000, title={Intrinsic limitations on ultimate device performance and reliability at (i) semiconductor-dielectric interfaces and (ii) internal interfaces in stacked dielectrics}, volume={18}, number={4}, journal={Journal of Vacuum Science & Technology. B, Microelectronics and Nanometer Structures}, author={Lucovsky, G. and Yang, H. and Niimi, H. and Thorpe, M. F. and Phillips, J. C.}, year={2000}, pages={2179–2186} }
 @article{lucovsky_yang_wu_niimi_2000, title={Plasma processed ultra-thin SiO2 interfaces far advanced silicon NMOS and PMOS devices: applications to Si-oxide Si oxynitride, Si-oxide Si nitride and Si-oxide transition metal oxide stacked gate dielectrics}, volume={374}, ISSN={["1879-2731"]}, DOI={10.1016/S0040-6090(00)01153-6}, abstractNote={Abstract The substitution of alternative gate dielectrics for thermally-grown SiO 2 and nitrided SiO 2 in aggressively scaled devices requires a significant processing change in going from thermally-grown to deposited dielectrics. This requires separate and independent steps for (i) the formation of Si-dielectric interface and (ii) the deposition of the dielectric thin film, which can be (a) Si nitride, or a Si oxynitride alloy, or (b) a high- k oxide. It is demonstrated that ultra-thin, nitrided Si–SiO 2 interface layers prepared by 300°C remote plasma processing can be effective in insulating device performance and reliability from deleterious effects associated direct deposition of alternative dielectric materials directly on to hydrogen-terminated Si surfaces. These interfaces perform equally well with Si nitride, Si oxynitride and high- k oxides, and contribute approximately 0.3–0.4 nm to the overall electrical oxide thickness (EOT), limiting aggressive scaling of EOT to approximately 0.6 nm.}, number={2}, journal={THIN SOLID FILMS}, author={Lucovsky, G and Yang, HY and Wu, Y and Niimi, H}, year={2000}, month={Oct}, pages={217–227} }
 @article{lucovsky_wu_niimi_yang_keister_rowe_2000, title={Separate and independent reductions in direct tunneling in oxide/nitride stacks with monolayer interface nitridation associated with the (i) interface nitridation and (ii) increased physical thickness}, volume={18}, ISSN={["0734-2101"]}, DOI={10.1116/1.582318}, abstractNote={Direct tunneling limits aggressive scaling of thermally grown oxides to about 1.6 nm, a thickness at which the tunneling current density Jg at 1 V is ∼1 A/cm2. This article demonstrates that stacked gate dielectrics prepared by remote plasma processing and including (i) ultrathin nitrided SiO2 interfacial layers and (ii) either silicon nitride or oxynitride bulk dielectrics can extend the equivalent oxide thickness to 1.1–1.0 nm before Jg exceeds 1 A/cm2. Significant reductions in direct tunneling are derived from (i) interface nitridation at the monolayer level and (ii) the increased physical thickness of the nitride or oxynitride alloy layers. The “portability” of the interface contribution is demonstrated by combining the nitrided SiO2 interface layers with transition-metal oxides, e.g., Ta2O5, in stacked gate dielectric structures and obtaining essentially the same reductions in tunneling current on n- and p-type substrates with respect to non-nitrided plasma-grown interface layers.}, number={4}, journal={JOURNAL OF VACUUM SCIENCE & TECHNOLOGY A}, author={Lucovsky, G and Wu, Y and Niimi, H and Yang, H and Keister, J and Rowe, JE}, year={2000}, pages={1163–1168} }
 @article{conrad_guo_fahmy_yang_1999, title={Influence of microstructure size on the plastic deformation kinetics, fatigue crack growth rate, and low-cycle fatigue of solder joints}, volume={28}, ISSN={["0361-5235"]}, DOI={10.1007/s11664-999-0184-x}, number={9}, journal={JOURNAL OF ELECTRONIC MATERIALS}, author={Conrad, H and Guo, Z and Fahmy, Y and Yang, D}, year={1999}, month={Sep}, pages={1062–1070} }
 @article{yang_niimi_lucovsky_1998, title={Tunneling currents through ultrathin oxide/nitride dual layer gate dielectrics for advanced microelectronic devices}, volume={83}, ISSN={["0021-8979"]}, DOI={10.1063/1.366976}, abstractNote={Direct and Fowler–Nordheim tunneling currents through oxide and dual layer silicon oxide–silicon nitride dielectrics are investigated for substrate and gate injection. The calculations include depletion effects in the heavily doped (n+) polysilicon gate electrodes as well as quantization effects in the less heavily doped n-type substrates. The Wentzel–Kramers–Brillouin (WKB) effective mass approximation has been compared with exact calculations for the tunneling probability, and based on these comparisons it has been found that the WKB approximation is adequate for single layer dielectrics, but is not for the dual layer dielectrics that are the focus of this article. Using exact tunneling transmission calculations, current-voltage (I–V) characteristics for ultrathin single layer oxides with different thicknesses (1.4, 2.0, and 2.3 nm) have been shown to agree well with recently reported experiments. Extensions of this approach demonstrate that direct tunneling currents in oxide/nitride structures with oxide equivalent thickness of 1.5 and 2.0 nm can be significantly lower than through single layer oxides of the same respective thickness.}, number={4}, journal={JOURNAL OF APPLIED PHYSICS}, author={Yang, HY and Niimi, H and Lucovsky, G}, year={1998}, month={Feb}, pages={2327–2337} }