@inproceedings{lim_huang_2010, title={Low-dropout (LDO) regulator output impedance analysis and transient performance enhancement circuit}, DOI={10.1109/apec.2010.5433489}, abstractNote={This paper presents a low-dropout regulator with a transient performance enhancement circuit. The transient performance enhancement circuit improves the transient response time by sinking a remaining current in a power delivery path. Due to the limited control bandwidth, traditional LDO could not respond rapidly to the load transients. As a result, a large output voltage spike can be occurred and the output voltage settling time is long during the load transients. In this paper, the stability conditions and the output impedance of LDO are discussed, and the output voltage spike and current distributions in the power delivery path are analyzed. The theoretical analysis will be confirmed by the cadence simulation results.}, booktitle={Annual ieee conference on applied power electronics conference and}, author={Lim, S. and Huang, A. Q.}, year={2010}, pages={1875–1878} }
 @article{lim_fan_huang_2010, title={Transient-voltage-clamp circuit design based on constant load line impedance for voltage regulator module}, volume={57}, DOI={10.1109/tie.2010.2042419}, abstractNote={A transient-voltage-clamp (TVC) circuit acts as a replacement of bulk capacitors, which is required for voltage regulator (VR) module (VRM) to clamp output voltage spikes. With the TVC circuit, VRM size is greatly reduced with similar transient performance. This paper presents a new TVC circuit. This TVC circuit is designed based on the constant load line impedance which is recently given by Intel's VRM11.0. The TVC circuit works in parallel with VR decoupling capacitors to achieve faster voltage regulation. The impedances of the VR, output capacitors, and the proposed TVC circuit are analyzed. The TVC circuit design procedure is described, and the transient performance and power consumption are discussed. The theoretical analysis is verified by simulation results. Moreover, the proposed TVC circuit is fabricated with a 0.6-μm CMOS process, and experimental results verify the simulation results and theoretical analysis.}, number={12}, journal={IEEE Transactions on Industrial Electronics}, author={Lim, S. and Fan, J. W. and Huang, A. Q.}, year={2010}, pages={4085–4094} }
 @article{fan_li_lim_huang_2009, title={Design and characterization of differentially enhanced duty ripple control (DE-DRC) for step-down converter}, volume={24}, DOI={10.1109/TPEL.2009.2028889}, abstractNote={A new control method, differentially enhanced duty ripple control (DE-DRC), is proposed for step-down converters. The control method uses a differentially enhanced loop to amplify the output error with positive and negative differential difference amplifiers (DDAs), and a duty ripple loop to include the input voltage and the duty cycle information into the control scheme. The duty ripple loop generates a very large control ripple voltage, and the control ripple is compared with a negative control voltage to trigger an on-pulse generator to get the duty cycle. Because of the large duty ripple voltage with a big noise margin and the low pass filter effect of DDAs, the proposed DE-DRC can achieve good noise immunity. The easily configured positive and negative DDA gains can separately adjust the high and low frequency portion of the loop transfer function, and push the control bandwidth to high frequency to achieve fast transient response. Because of a unique first-order character of the inner duty ripple loop, this control can also completely eliminate the double pole peaking from the output impedance and achieve ideal closed loop output impedance in the control bandwidth, which is preferred for adaptive voltage position designs.}, number={12}, journal={IEEE Transactions on Power Electronics}, author={Fan, J. W. and Li, X. N. and Lim, S. and Huang, A. Q.}, year={2009}, pages={2714–2725} }
 @inproceedings{lim_huang_2009, title={Design of a transient voltage clamp (TVC) for 4 switch buck boost (4SBB) converter}, DOI={10.1109/ecce.2009.5316503}, abstractNote={This paper presents a new design methodology of the transient voltage clamp (TVC), which operates by controlling inductor current slew rate in 4 Switch Buck Boost Converter (4SBB). When 4SBB operates in boost mode, the TVC circuit changes inductor current slew rate during load current step-down to achieve a faster voltage regulation. Due to the slow inductor current slew rate, traditional 4SBB could not respond rapidly to the load current transient. As a result, a large output voltage spike can be occurred during load transient. The specific function of the TVC is to control unused switches when 4SBB operates in boost mode. The main challenge in applying the TVC is how to control unused switches during load current transient. In this paper, how to control the inductor current slew rate and transient response are discussed. The theoretical analysis will be confirmed by the cadence simulation results.}, booktitle={2009 IEEE Energy Conversion Congress and Exposition, Vols 1-6}, author={Lim, S. and Huang, A. Q.}, year={2009}, pages={180–182} }