@article{schinke_di spigna_shiveshwarkar_franzon_2011, title={Computing with Novel Floating-Gate Devices}, volume={44}, ISSN={["1558-0814"]}, DOI={10.1109/mc.2010.366}, abstractNote={The authors report on the design, operation, and architectural implications of single and double floating-gate devices for nontraditional applications enabling low-power FPGAs and analog-to-digital converters, and propose a unified nonvolatile/volatile memory device.}, number={2}, journal={COMPUTER}, author={Schinke, Daniel and Di Spigna, Neil and Shiveshwarkar, Mihir and Franzon, Paul}, year={2011}, month={Feb}, pages={29–36} }
 @article{schinke_priyadarshi_pitts_di spigna_franzon_2011, title={SPICE-compatible physical model of nanocrystal floating gate devices for circuit simulation}, volume={5}, ISSN={["1751-858X"]}, DOI={10.1049/iet-cds.2010.0410}, abstractNote={The majority of nanocrystal floating gate research has been done at the device level. Circuit-level research is still in its early stages because of the lack of a physical device model appropriate for circuit simulations. In this study, a comprehensive and accurate SPICE-compatible physical equation-based model of nanocrystal floating gate devices is developed based on uniform direct tunnelling and Fowler-Nordheim tunnelling. The main contribution is a Verilog-A module that captures the physical behaviours of programming and erasing the device. A predictive NMOS model is then used for modelling the conduction channel to determine the behavioural I - V characteristics. The proposed model uses only explicit formulae resulting in fast computation appropriate for circuit simulation and can be used in any SPICE simulator supporting Verilog-A. It interacts dynamically with the rest of the circuit and includes charge leakage which enables power consumption analysis. The simulation results of the proposed model fit well to experimental results of various fabricated devices. Additionally, it is verified in HSPICE, demonstrating a significant speedup and good agreement with a numerical device simulator. This study is important in bridging the gap between device- and circuit-level research.}, number={6}, journal={IET CIRCUITS DEVICES & SYSTEMS}, author={Schinke, D. and Priyadarshi, S. and Pitts, W. Shepherd and Di Spigna, N. and Franzon, P.}, year={2011}, month={Nov}, pages={477–483} }