Cem Basceri

Atomic layer deposition methods

Washington, DC: U.S. Patent and Trademark Office.

Constructions comprising hafnium oxide

Washington, DC: U.S. Patent and Trademark Office.

DRAM constructions and electronic systems

Washington, DC: U.S. Patent and Trademark Office.

Gallium nitride based high-electron mobility devices

Washington, DC: U.S. Patent and Trademark Office.

MIS capacitor and method of formation

Washington, DC: U.S. Patent and Trademark Office.

Method of forming conductive metal silicides by reaction of metal with silicon

Washington, DC: U.S. Patent and Trademark Office.

Method of manufacturing gallium nitride based high-electron mobility devices

Washington, DC: U.S. Patent and Trademark Office.

Methods and apparatus for processing microfeature workpieces; methods for conditioning ALD reaction chambers

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming capacitor

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming materials

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming pluralities of capacitors

Washington, DC: U.S. Patent and Trademark Office.

Semiconductor manufacturing apparatus for modifying-in-film stress of thin films, and product formed thereby

Washington, DC: U.S. Patent and Trademark Office.

Supercritical fluid technology for cleaning processing chambers and systems

Washington, DC: U.S. Patent and Trademark Office.

Vertical junction field effect transistor having an epitaxial gate

Washington, DC: U.S. Patent and Trademark Office.

Atomic layer deposition methods

Washington, DC: U.S. Patent and Trademark Office.

Capacitor constructions

Washington, DC: U.S. Patent and Trademark Office.

Capacitor with high dielectric constant materials and method of making

Washington, DC: U.S. Patent and Trademark Office.

Chemical vapor deposition methods of forming barium strontium titanate comprising dielectric layers, including such layers having a varied concentration of barium and strontium within the layer

Washington, DC: U.S. Patent and Trademark Office.

Circuit constructions

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Constructions comprising perovskite-type dielectric

Washington, DC: U.S. Patent and Trademark Office.

Deposition methods

Washington, DC: U.S. Patent and Trademark Office.

Deposition methods with time spaced and time abutting precursor pulses

Washington, DC: U.S. Patent and Trademark Office.

Gated field effect device comprising gate dielectric having different K regions

Washington, DC: U.S. Patent and Trademark Office.

MIS capacitor

Washington, DC: U.S. Patent and Trademark Office.

Method for binding halide-based contaminants during formation of a titanium-based film

Washington, DC: U.S. Patent and Trademark Office.

Method of forming a vertical transistor

Washington, DC: U.S. Patent and Trademark Office.

Method of forming semi-insulating silicon carbide single crystal

Washington, DC: U.S. Patent and Trademark Office.

Method of manufacturing a vertical junction field effect transistor having an epitaxial gate

Washington, DC: U.S. Patent and Trademark Office.

Method of removing residual contaminants from an environment

Washington, DC: U.S. Patent and Trademark Office.

Methods and systems for controlling temperature during microfeature workpiece processing, e.g., CVD deposition

Washington, DC: U.S. Patent and Trademark Office.

Methods for forming a conductive structure using oxygen diffusion through one metal layer to oxidize a second metal layer

Washington, DC: U.S. Patent and Trademark Office.

Methods for forming and integrated circuit structures containing enhanced-surface-area conductive layers

Washington, DC: U.S. Patent and Trademark Office.

Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming a capacitor

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming field effect transistors

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming hafnium oxide

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming pluralities of capacitors, and integrated circuitry

Washington, DC: U.S. Patent and Trademark Office.

Microfeature workpiece processing apparatus and methods for batch deposition of materials on microfeature workpieces

Washington, DC: U.S. Patent and Trademark Office.

Microfeature workpiece processing apparatus and methods for controlling deposition of materials on microfeature workpieces

Washington, DC: U.S. Patent and Trademark Office.

Mixed composition interface layer and method of forming

Washington, DC: U.S. Patent and Trademark Office.

One-transistor composite-gate memory

Washington, DC: U.S. Patent and Trademark Office.

Structures and methods for enhancing capacitors in integrated circuits

Washington, DC: U.S. Patent and Trademark Office.

Atomic layer deposition method

Washington, DC: U.S. Patent and Trademark Office.

Atomic layer deposition methods

Washington, DC: U.S. Patent and Trademark Office.

Capacitor constructions

Washington, DC: U.S. Patent and Trademark Office.

Capacitor constructions, semiconductor constructions, and methods of forming electrical contacts and semiconductor constructions

Washington, DC: U.S. Patent and Trademark Office.

Capacitor with high dielectric constant materials and method of making

Washington, DC: U.S. Patent and Trademark Office.

Chemical vapor deposition methods of forming barium strontium titanate comprising dielectric layers, including such layers having a varied concentration of barium and strontium within the layer

Washington, DC: U.S. Patent and Trademark Office.

DRAM cells and electronic systems

Washington, DC: U.S. Patent and Trademark Office.

Method of forming MIS capacitor

Washington, DC: U.S. Patent and Trademark Office.

Method of forming a capacitor

Washington, DC: U.S. Patent and Trademark Office.

Method of forming a capacitor

Washington, DC: U.S. Patent and Trademark Office.

Method of forming a layer comprising epitaxial silicon and a field effect transistor

Washington, DC: U.S. Patent and Trademark Office.

Method of forming epitaxial silicon-comprising material

Washington, DC: U.S. Patent and Trademark Office.

Method of providing a structure using self-aligned features

Washington, DC: U.S. Patent and Trademark Office.

Methods of depositing materials over substrates, and methods of forming layers over substrates

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming capacitor constructions

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming capacitor constructions comprising perovskite-type dielectric materials with different amount of crystallinity regions

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming capacitors

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming conductive material silicides by reaction of metal with silicon

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming layers over substrates

Washington, DC: U.S. Patent and Trademark Office.

Methods of growing epitaxial silicon

Washington, DC: U.S. Patent and Trademark Office.

Microfeature workpiece processing apparatus and methods for controlling deposition of materials on microfeature workpieces

Washington, DC: U.S. Patent and Trademark Office.

Plasma enhanced chemical vapor deposition method of forming a titanium silicide comprising layer

Washington, DC: U.S. Patent and Trademark Office.

Structures and methods for enhancing capacitors in integrated circuits

Washington, DC: U.S. Patent and Trademark Office.

Top electrode in a strongly oxidizing environment

Washington, DC: U.S. Patent and Trademark Office.

Atomic layer deposition apparatus and methods

Washington, DC: U.S. Patent and Trademark Office.

Capacitor constructions comprising perovskite-type dielectric materials and having different degrees of crystallinity within the perovskite-type dielectric materials

Washington, DC: U.S. Patent and Trademark Office.

Chemical vapor deposition method for depositing a high k dielectric film

Washington, DC: U.S. Patent and Trademark Office.

Chemical vapor deposition methods of forming barium strontium titanate comprising dielectric layers

Washington, DC: U.S. Patent and Trademark Office.

Conductive semiconductor structures containing metal oxide regions

Washington, DC: U.S. Patent and Trademark Office.

Deposition methods

Washington, DC: U.S. Patent and Trademark Office.

Dielectric cure for reducing oxygen vacancies

Washington, DC: U.S. Patent and Trademark Office.

Gas delivery system for pulsed-type deposition processes used in the manufacturing of micro-devices

Washington, DC: U.S. Patent and Trademark Office.

Haze-free BST films

Washington, DC: U.S. Patent and Trademark Office.

Integrated capacitors fabricated with conductive metal oxides

Washington, DC: U.S. Patent and Trademark Office.

Method for controlling deposition of dielectric films

Washington, DC: U.S. Patent and Trademark Office.

Method of forming a MIM capacitor with metal nitride electrode

Washington, DC: U.S. Patent and Trademark Office.

Method of forming haze-free BST films

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming capacitor constructions

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming conductive connections, and methods of forming nanofeatures

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming conductive metal silicides by reaction of metal with silicon

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming perovskite-type dielectric materials with chemical vapor deposition

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming rugged electrically conductive surfaces and layers

Washington, DC: U.S. Patent and Trademark Office.

Mixed composition interface layer and method of forming

Washington, DC: U.S. Patent and Trademark Office.

Reactors having gas distributors and methods for depositing materials onto micro-device workpieces

Washington, DC: U.S. Patent and Trademark Office.

Semiconductor manufacturing process and apparatus for modifying in-film stress of thin films, and product formed thereby

Washington, DC: U.S. Patent and Trademark Office.

Structures and methods for enhancing capacitors in integrated circuits

Washington, DC: U.S. Patent and Trademark Office.

Thin film capacitor with substantially homogenous stoichiometry

Washington, DC: U.S. Patent and Trademark Office.

Atomic layer deposition methods

Washington, DC: U.S. Patent and Trademark Office.

Atomic layer deposition methods

Washington, DC: U.S. Patent and Trademark Office.

Capacitor with high dielectric constant materials and method of making

Washington, DC: U.S. Patent and Trademark Office.

Chemical vapor deposition method of forming a material over at least two substrates

Washington, DC: U.S. Patent and Trademark Office.

MIM capacitor with metal nitride electrode materials and method of formation

Washington, DC: U.S. Patent and Trademark Office.

Method for improving the resistance degradation of thin film capacitors

Washington, DC: U.S. Patent and Trademark Office.

Method for reducing physisorption during atomic layer deposition

Washington, DC: U.S. Patent and Trademark Office.

Method of forming a patterned substantially crystalline TA2O5 comprising material, and method of forming a capacitor having a capacitor dilelectric region comprising substantially crystalline TA2O5 comprising material

Washington, DC: U.S. Patent and Trademark Office.

Method of providing a structure using self-aligned features

Washington, DC: U.S. Patent and Trademark Office.

Method of reducing oxygen vacancies and DRAM processing method

Washington, DC: U.S. Patent and Trademark Office.

Methods for forming and integrated circuit structures containing enhanced-surface-area conductive layers

Washington, DC: U.S. Patent and Trademark Office.

Methods for forming and integrated circuit structures containing enhanced-surface-area conductive layers

Washington, DC: U.S. Patent and Trademark Office.

Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming capacitor constructions, and methods of forming constructions comprising dielectric materials

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming hafnium-containing materials, methods of forming hafnium oxide, and capacitor constructions comprising hafnium oxide

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming regions of differing composition over a substrate

Washington, DC: U.S. Patent and Trademark Office.

Methods of forming trenched isolation regions

Washington, DC: U.S. Patent and Trademark Office.

Plasma enhanced chemical vapor deposition method of forming titanium silicide comprising layers

Washington, DC: U.S. Patent and Trademark Office.

Plasma enhanced chemical vapor deposition methods of forming titanium silicide comprising layers over a plurality of semiconductor substrates

Washington, DC: U.S. Patent and Trademark Office.

Structures and methods for enhancing capacitors in integrated ciruits

Washington, DC: U.S. Patent and Trademark Office.

System and method for inhibiting imprinting of capacitor structures of a memory

Washington, DC: U.S. Patent and Trademark Office.

Top electrode in a strongly oxidizing environment

Washington, DC: U.S. Patent and Trademark Office.

Capacitor with high dielectric constant materials

Washington, DC: U.S. Patent and Trademark Office.

DRAM processing methods

Washington, DC: U.S. Patent and Trademark Office.

Dielectric cure for reducing oxygen vacancies

Washington, DC: U.S. Patent and Trademark Office.

Dielectric films and capacitor structures including same

Washington, DC: U.S. Patent and Trademark Office.

Method for controlling deposition of dielectric films

Washington, DC: U.S. Patent and Trademark Office.

Method of etching a substantially amorphous TA2O5 comprising layer

Washington, DC: U.S. Patent and Trademark Office.

Method of forming DRAM circuitry

Washington, DC: U.S. Patent and Trademark Office.

Method of forming a non-conformal layer over and exposing a trench

Washington, DC: U.S. Patent and Trademark Office.

Method of forming haze- free BST films

Washington, DC: U.S. Patent and Trademark Office.

Methods for forming and integrated circuit structures containing ruthenium and tungsten containing layers

Washington, DC: U.S. Patent and Trademark Office.

Methods for forming conductive structures and structures regarding same

Washington, DC: U.S. Patent and Trademark Office.

Methods of depositing a layer comprising tungsten and methods of forming a transistor gate line

Washington, DC: U.S. Patent and Trademark Office.

Physical vapor deposition methods

Washington, DC: U.S. Patent and Trademark Office.

Plasma enhanced chemical vapor deposition method of forming titanium silicide comprising layers

Washington, DC: U.S. Patent and Trademark Office.

System and method for inhibiting imprinting of capacitor structures of a memory

Washington, DC: U.S. Patent and Trademark Office.

Capacitor processing method and DRAM processing method

Washington, DC: U.S. Patent and Trademark Office.

Chemical vapor deposition methods of forming a high K dielectric layer and methods of forming a capacitor

Washington, DC: U.S. Patent and Trademark Office.

Dielectric films and methods of forming same

Washington, DC: U.S. Patent and Trademark Office.

Integrated capacitors fabricated with conductive metal oxides

Washington, DC: U.S. Patent and Trademark Office.

Method for improving the sidewall stoichiometry of thin film capacitors

Washington, DC: U.S. Patent and Trademark Office.

Methods for forming and integrated circuit structures containing enhanced-surface-area conductive layers

Washington, DC: U.S. Patent and Trademark Office.

Structures and methods for enhancing capacitors in integrated circuits

Washington, DC: U.S. Patent and Trademark Office.

Dielectric cure for reducing oxygen vacancies

Washington, DC: U.S. Patent and Trademark Office.

Method for improving the resistance degradation of thin film capacitors

Washington, DC: U.S. Patent and Trademark Office.

Method for improving the sidewall stoichiometry of thin film capacitors

Washington, DC: U.S. Patent and Trademark Office.

Method of forming haze-free BST films

Washington, DC: U.S. Patent and Trademark Office.

Grain boundaries in barium strontium titanate thin films: Structure, chemistry and influence on electronic properties

INTERFACE SCIENCE, 8(2-3), 209–221.

Ferroelectricity in thin films: The dielectric response of fiber-textured (BaxSr1-x)Ti1+yO3+z thin films grown by chemical vapor deposition

JOURNAL OF APPLIED PHYSICS, 86(8), 4565–4575.

Ir and Ru bottom electrodes for (Ba, Sr) TiO3 thin films deposited by liquid delivery source chemical vapor deposition

THIN SOLID FILMS, 323(1-2), 285–290.

Resistance degradation behavior of Ba0.7Sr0.3TiO3 thin films compared to mechanisms found in titanate ceramics and single crystals

Integrated Ferroelectrics, 22(1-4), 603–614.

The dielectric response as a function of temperature and film thickness of fiber-textured (Ba,Sr)TiO3 thin films grown by chemical vapor deposition

JOURNAL OF APPLIED PHYSICS, 82(5), 2497–2504.