2013 conference paper

Hetero(2) 3d integration: A scheme for optimizing efficiency/cost of chip multiprocessors

Proceedings of the fourteenth international symposium on quality electronic design (ISQED 2013), 1–7.

Source: NC State University Libraries
Added: August 6, 2018

2012 journal article

Fabscalar: Automating superscalar core design

IEEE Micro, 32(3), 48–59.

By: N. Choudhary, S. Wadhavkar, T. Shah, H. Mayukh, J. Gandhi, B. Dwiel, S. Navada, H. Najaf-Abadi, E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2011 journal article

FabScalar: Composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template

ISCA 2011: Proceedings of the 38th Annual International Symposium on Computer Architecture, 11–22.

By: N. Choudhary, S. Wadhavkar, T. Shah, H. Mayukh, J. Gandhi, B. Dwiel, S. Navada, H. Najaf-abadi, E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018