@misc{colombo_chambers_visokay_rotondo_2008, title={Method for controlling defects in gate dielectrics}, volume={7,351,626}, number={2008 Apr. 1}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Colombo, L. and Chambers, J. J. and Visokay, M. R. and Rotondo, A. L.}, year={2008} }
 @misc{colombo_chambers_visokay_2008, title={Refractory metal-based electrodes for work function setting in semiconductor devices}, volume={7,321,154}, number={2008 Jan. 22}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Colombo, L. and Chambers, J. J. and Visokay, M. R.}, year={2008} }
 @misc{quevedo-lopez_chambers_olsen_2007, title={Methods and systems to mitigate etch stop clipping for shallow trench isolation fabrication}, volume={7,199,021}, number={2007 Apr. 3}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Quevedo-Lopez, M. and Chambers, J. J. and Olsen, L. C.}, year={2007} }
 @misc{colombo_chambers_visokay_2007, title={Process for manufacturing dual work function metal gates in a microelectronics device}, volume={7,229,873}, number={2007 Jun. 12}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Colombo, L. and Chambers, J. J. and Visokay, M. R.}, year={2007} }
 @misc{khamankar_grider_niimi_gurba_tran_chambers_2007, title={Reliable high voltage gate dielectric layers using a dual nitridation process}, volume={7,183,165}, number={2007 Feb. 27}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Khamankar, R. and Grider, D. T. and Niimi, H. and Gurba, A. and Tran, T. and Chambers, J. J.}, year={2007} }
 @misc{colombo_chambers_rotondaro_2006, title={High-K gate dielectric defect gettering using dopants}, volume={7,015,088}, number={2006 Mar. 21}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Colombo, L. and Chambers, J. J. and Rotondaro, A. L.}, year={2006} }
 @misc{colombo_chambers_visokay_2006, title={Hydrogen free integration of high-k gate dielectrics}, volume={7,067,434}, number={2006 Jun. 27}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Colombo, L. and Chambers, J. J. and Visokay, M. R.}, year={2006} }
 @misc{visokay_colombo_chambers_rotondaro_bu_2006, title={Method for fabricating transistor gate structures and gate dielectrics thereof}, volume={7,135,361}, number={2006 Nov. 14}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Visokay, M. R. and Colombo, L. and Chambers, J. J. and Rotondaro, A. L. and Bu, H.}, year={2006} }
 @misc{rotondaro_chambers_jain_2006, title={Refractory metal-based electrodes for work function setting in semiconductor devices}, volume={7,098,516}, number={2006 Aug. 29}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Rotondaro, A. L. and Chambers, J. J. and Jain, A.}, year={2006} }
 @misc{chambers_2006, title={Structure and method to fabricate self-aligned transistors with dual work function metal gate electrodes}, volume={7,005,365}, number={2006 Feb. 28}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Chambers, J. J.}, year={2006} }
 @misc{quevedo-lopez_chambers_colombo_visokay_2006, title={Top surface roughness reduction of high-k dielectric materials using plasma based processes}, volume={7,115,530}, number={2006 Oct. 3}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Quevedo-Lopez, M. A. and Chambers, J. J. and Colombo, L. and Visokay, M. R.}, year={2006} }
 @misc{colombo_chambers_rotondaro_2006, title={Use of indium to define work function of p-type doped polysilicon}, volume={7,026,218}, number={2006 Apr. 11}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Colombo, L. and Chambers, J. J. and Rotondaro, A. L.}, year={2006} }
 @misc{visokay_chambers_2006, title={Versatile system for triple-gated transistors with engineered corners}, volume={7,119,386}, number={2006 Oct. 10}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Visokay, M. R. and Chambers, J. J.}, year={2006} }
 @misc{colombo_chambers_rotondaro_visokay_2005, title={High temperature interface layer growth for high-k gate dielectric}, volume={6,852,645}, number={2005 Feb. 8}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Colombo, L. and Chambers, J. J. and Rotondaro, A. L. and Visokay, M. R.}, year={2005} }
 @misc{visokay_colombo_chambers_2005, title={Metal gate MOS transistors and methods for making the same}, volume={6,936,508}, number={2005 Aug. 30}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Visokay, M. R. and Colombo, L. and Chambers, J. J.}, year={2005} }
 @misc{rotondaro_visokay_chambers_colombo_2005, title={Method for fabricating split gate transistor device having high-k dielectrics}, volume={6,979,623}, number={2005 Dec. 27}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Rotondaro, A. L. and Visokay, M. R. and Chambers, J. J. and Colombo, L.}, year={2005} }
 @misc{visokay_chambers_2005, title={Versatile system for triple-gated transistors with engineered corners}, volume={6,969,644}, number={2005 Nov. 29}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Visokay, M. R. and Chambers, J. J.}, year={2005} }
 @misc{colombo_quevedo-lopez_chambers_visokay_rotondaro_2004, title={High-k gate dielectric with uniform nitrogen profile and methods for making the same}, volume={6,809,370}, number={2004 Oct. 26}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Colombo, L. and Quevedo-Lopez, M. and Chambers, J. J. and Visokay, M. R. and Rotondaro, A. L.}, year={2004} }
 @misc{niimi_khamankar_chambers_hattangady_rotondaro_2004, title={Method for annealing ultra-thin, high quality gate oxide layers using oxidizer/hydrogen mixtures}, volume={6,780,719}, number={2004 Aug. 24}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Niimi, H. and Khamankar, R. and Chambers, J. J. and Hattangady, S. and Rotondaro, A. L.}, year={2004} }
 @misc{rotondaro_chambers_jain_2004, title={Use of indium to define work function of p-type doped polysilicon}, volume={6,803,611}, number={2004 Oct. 12}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Rotondaro, A. L. and Chambers, J. J. and Jain, A.}, year={2004} }
 @misc{parsons_chambers_kelly_2003, title={High dielectric constant metal silicates formed by controlled metal-surface reactions}, volume={6,521,911}, number={2003 Feb. 18}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Parsons, G. N. and Chambers, J. J. and Kelly, M. J.}, year={2003} }
 @misc{niimi_chambers_khamankar_grider_2003, title={Temperature spike for uniform nitridization of ultra-thin silicon dioxide layers in transistor gates}, volume={6,503,846}, number={2003 Jan. 7}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Niimi, H. and Chambers, J. J. and Khamankar, R. and Grider, D. T.}, year={2003} }
 @article{chambers_busch_schulte_gustafsson_garfunkel_wang_maher_klein_parsons_2001, title={Effects of surface pretreatments on interface structure during formation of ultra-thin yttrium silicate dielectric films on silicon}, volume={181}, ISSN={["0169-4332"]}, url={http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=ORCID&SrcApp=OrcidOrg&DestLinkType=FullRecord&DestApp=WOS_CPL&KeyUT=WOS:000171063300009&KeyUID=WOS:000171063300009}, DOI={10.1016/S0169-4332(01)00373-7}, abstractNote={X-ray photoelectron spectroscopy (XPS) and medium energy ion scattering (MEIS) are used to determine chemical bonding and composition of ultra-thin films of mixed yttrium, silicon, and oxygen, formed by oxidation of metal on clean and pre-treated silicon. XPS and MEIS analyses indicate that oxidation of yttrium on bare silicon results in a fully oxidized film with a significant fraction of Y–O–Si bonding. The mixed Y–O–Si structure results from the relatively rapid reaction between Y and the Si substrate to form yttrium silicide, followed by oxidation. The effect of various silicon pretreatments, including in situ oxidation and nitridation, on bulk and interface film composition are also examined. Transmission electron microscopy (TEM) of 40 Å thick films indicates that the yttrium silicate films are amorphous with uniform contrast throughout the layer. MEIS shows evidence for a graded metal concentration in the dielectric near the silicon interface, with uniform oxygen concentration (consistent with full oxidation) throughout the film. Angle resolved XPS (ARXPS) shows no significant signal related to Si+4, as would be expected from a substantial SiO2 interface layer. Capacitance–voltage analysis demonstrates that a ∼10 Å equivalent oxide thickness can be achieved. The effects of ultra-thin silicon oxide, nitrided-oxide and nitrided silicon interfaces on silicon consumption during the oxidation of yttrium are investigated. When yttrium is deposited on a thin (∼10 Å) SiO2 film and oxidized, a yttrium silicate film is formed with bonding and composition similar to films formed on bare silicon. However, when the interface is a thin nitride, the silicon consumption rate is significantly reduced, and the resulting film composition is closer to Y2O3. The consumption of the silicon substrate by metal is shown to occur during oxidation and during vacuum annealing of yttrium on silicon. The relatively rapid formation of metal–silicon bonds suggests that metal–silicon structures may also be important reactive intermediates in silicon/dielectric interface formation reactions during chemical vapor deposition. In addition to thermodynamic stability, understanding the relative rates of elementary reaction steps in film formation is critical to control composition and structure at the dielectric/Si interface.}, number={1-2}, journal={APPLIED SURFACE SCIENCE}, author={Chambers, JJ and Busch, BW and Schulte, WH and Gustafsson, T and Garfunkel, E and Wang, S and Maher, DM and Klein, TM and Parsons, GN}, year={2001}, month={Sep}, pages={78–93} }
 @article{chambers_parsons_2001, title={Physical and electrical characterization of ultrathin yttrium silicate insulators on silicon}, volume={90}, ISSN={["0021-8979"]}, url={http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=ORCID&SrcApp=OrcidOrg&DestLinkType=FullRecord&DestApp=WOS_CPL&KeyUT=WOS:000169660000057&KeyUID=WOS:000169660000057}, DOI={10.1063/1.1375018}, abstractNote={This article describes the oxidation of yttrium on silicon to form yttrium silicate films for application as high dielectric constant insulators. The high reactivity of yttrium metal with silicon and oxygen is utilized to form amorphous yttrium silicate films with a minimal interfacial silicon dioxide layer. Yttrium silicate films (∼40 Å) with an equivalent silicon dioxide thickness of ∼11 Å and k∼14 are formed by oxidizing yttrium on silicon. The physical properties of yttrium silicate films on silicon are investigated using x-ray photoelectron spectroscopy and Fourier transform infrared spectroscopy. The oxidation of yttrium silicide results in films nearly identical, although with a higher silicon fraction, to films formed by oxidation of yttrium on silicon. The oxidation of yttrium on silicon results in a competition for yttrium between silicide formation and oxidation. This competition yields yttrium silicate films for thin (<40 Å) initial metal thickness and a Y2O3/silicate bilayer for thick (>80 Å) initial metal thickness. Annealing yttrium films on silicon in vacuum to form yttrium silicide and then oxidizing the silicide is used to eliminate the competition and control the yttrium/silicon reaction. Analysis of the oxidation of yttrium on silicon reveals fast oxidation during silicate formation and a slow rate during oxidation of the silicon substrate to form SiO2. Oxidation of other metals, such as Hf, Zr, and La, on silicon is expected to result in metal silicate films through a similar simultaneous (or controlled sequential) silicide/oxidation reactions.}, number={2}, journal={JOURNAL OF APPLIED PHYSICS}, author={Chambers, JJ and Parsons, GN}, year={2001}, month={Jul}, pages={918–933} }
 @article{chambers_parsons_2000, title={Yttrium silicate formation on silicon: Effect of silicon preoxidation and nitridation on interface reaction kinetics}, volume={77}, ISSN={["0003-6951"]}, url={http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=ORCID&SrcApp=OrcidOrg&DestLinkType=FullRecord&DestApp=WOS_CPL&KeyUT=WOS:000089639000039&KeyUID=WOS:000089639000039}, DOI={10.1063/1.1316073}, abstractNote={The effects of oxygen and nitrogen pretreatments on interface reaction kinetics during yttrium silicate formation on silicon are described. X-ray photoelectron spectroscopy (XPS) and medium energy ion scattering (MEIS) are used to determine chemical bonding and composition of films formed by oxidation of yttrium deposited on silicon. Capacitance–voltage testing is used to determine the quality of the dielectric and the electrical thickness. The effect of ultrathin silicon oxide, nitrided oxide, and nitrided silicon interfaces on metal oxidation kinetics is also described. When yttrium is deposited on clean silicon and oxidized, XPS and MEIS indicate significant mixing of the metal and the silicon, resulting in a film with Y–O–Si bonding and composition close to yttrium orthosilicate (Y2O3⋅SiO2). A thin (∼10 Å) in situ preoxidation step is not sufficient to impede the metal/silicon reaction, whereas a nitrided silicon interface significantly reduces the silicon consumption rate, and the resulting film is close to Y2O3. The mechanisms described for yttrium are expected to occur in a variety of oxide and silicate deposition processes of interest for high-k dielectrics. Therefore, in addition to thermodynamic stability, understanding the relative rates of elementary reaction steps in film formation is critical to control composition and structure at the dielectric/Si interface.}, number={15}, journal={APPLIED PHYSICS LETTERS}, author={Chambers, JJ and Parsons, GN}, year={2000}, month={Oct}, pages={2385–2387} }
 @article{chambers_min_parsons_1998, title={Endpoint uniformity sensing and analysis in silicon dioxide plasma etching using in situ mass spectrometry}, volume={16}, ISSN={["1071-1023"]}, url={http://gateway.webofknowledge.com/gateway/Gateway.cgi?GWVersion=2&SrcAuth=ORCID&SrcApp=OrcidOrg&DestLinkType=FullRecord&DestApp=WOS_CPL&KeyUT=WOS:000077542300014&KeyUID=WOS:000077542300014}, DOI={10.1116/1.590332}, abstractNote={Mass spectroscopy is used to characterize the endpoint uniformity of silicon dioxide etching in an electron cyclotron resonance (ECR) plasma etch process. Etch products are observed using a two stage differentially pumped mass spectrometry system attached to the ECR process chamber. Specifically, using CF4 and D2 etch gases, the partial pressure of CO-containing etch products decays near the endpoint, and the rate of signal decay is directly correlated with the uniformity determined from optical interferometry thickness measurements. To correlate the mass spectrometer signal with the etch rate variation across the wafer, etch uniformity is altered by changing the ECR electromagnet geometry and by modifying the initial oxide uniformity. A COF2 etch product material balance is developed to model the observed concentration versus time data, resulting in a quantitative correlation between change in endpoint slope and uniformity. The ability to utilize a process-state sensor, such as a mass spectrometer, for wafer-state information will result in new approaches for sensing, optimizing, and controlling integrated circuit fabrication processes.}, number={6}, journal={JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B}, author={Chambers, JJ and Min, K and Parsons, GN}, year={1998}, pages={2996–3002} }