2005 journal article

High-performance and low-cost dual-thread VLIW processor using weld architecture paradigm


By: E. Ozer* & T. Conte n

author keywords: multithreaded processors; VLIW architectures; modeling of computer architecture
TL;DR: This paper analyzes the performance impact of the dual-thread VLIW processor, which includes analysis of migrating disambiguation hardware for speculative load operations to the compiler and of the sensitivity of the model to the variation of branch misprediction, second-level cache miss penalties, and register file copy time. (via Semantic Scholar)
Source: Web Of Science
Added: August 6, 2018

1998 conference paper

Unified assign and schedule: A new approach to scheduling for clustered register file microarchitectures

Proceedings, 31st annual ACM/IEEE International Symposium on Microarchitecture: November 30-December 2, 1998, Dallas, Texas / co-sponsored by ACM SIGMICRO, IEEE Computer Society Technical Committee on Microprogramming and Microarchitecture., 308–315. Los Alamitos, Calif.: IEEE Computer Society Press.

By: E. Ozer, S. Banerjia & T. Conte

Source: NC State University Libraries
Added: August 6, 2018

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