2005 journal article

High-performance and low-cost dual-thread VLIW processor using weld architecture paradigm

IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 16(12), 1132–1142.

By: E. Ozer* & T. Conte n

author keywords: multithreaded processors; VLIW architectures; modeling of computer architecture
TL;DR: This paper analyzes the performance impact of the dual-thread VLIW processor, which includes analysis of migrating disambiguation hardware for speculative load operations to the compiler and of the sensitivity of the model to the variation of branch misprediction, second-level cache miss penalties, and register file copy time. (via Semantic Scholar)
Source: Web Of Science
Added: August 6, 2018

1998 conference paper

Unified assign and schedule: A new approach to scheduling for clustered register file microarchitectures

Proceedings, 31st annual ACM/IEEE International Symposium on Microarchitecture: November 30-December 2, 1998, Dallas, Texas / co-sponsored by ACM SIGMICRO, IEEE Computer Society Technical Committee on Microprogramming and Microarchitecture., 308–315. Los Alamitos, Calif.: IEEE Computer Society Press.

By: E. Ozer, S. Banerjia & T. Conte

Source: NC State University Libraries
Added: August 6, 2018

Citation Index includes data from a number of different sources. If you have questions about the sources of data in the Citation Index or need a set of data which is free to re-distribute, please contact us.

Certain data included herein are derived from the Web of Science© and InCites© (2024) of Clarivate Analytics. All rights reserved. You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.