@article{shi_kleinstreuer_zhang_2008, title={Dilute suspension flow with nanoparticle deposition in a representative nasal airway model}, volume={20}, ISSN={["1089-7666"]}, DOI={10.1063/1.2833468}, abstractNote={The human nasal cavities with an effective length of only 10cm feature a wide array of basic flow phenomena because of their complex geometrics. Employing a realistic nasal airway model and demonstrating that laminar, quasisteady airflow can be assumed, dilute nanoparticle suspension flow and nanoparticle deposition are simulated and analyzed for 7.5⩽Q⩽20L∕min and 1⩽dp⩽150nm. The understanding and quantitative assessment of mixture flow fields and local nanoparticle wall concentrations in nasal airways with a thin mucus layer are very important for estimating the health risks of inhaled toxic aerosols, determining proper drug-aerosol delivery to target sites such as the olfactory regions and developing algebraic transfer functions for overall nasal dose-response analyses. Employing a commercial software package with user-supplied programs, the validated computer modeling results can be summarized as follows: (i) Most of the air flows through the middle-to-low main passageways. Higher airflow rates result in stronger airflow in the olfactory region and relatively lower flow rates in the meatuses. (ii) Nanoparticle deposition in human nasal airways is significant for tiny nanoparticles, i.e., 1⩽dp⩽2nm, which also represent some vapors. The smaller the nanoparticle size and the lower the flow rate, the higher are the total deposition efficiencies because of stronger diffusion and longer residence times. (iii) Nanoparticles with dp<5nm flow preferentially through the middle-to-low main passageway along with the major portion of the airflow. For relatively large nanoparticles (dp⩾5nm), due to the low diffusivities, fewer particles will deposit onto the wall leaving a much thinner nanoparticle gradient layer near the wall, i.e., such nanoparticles pass through the nasal cavities more uniformly with minor wall deposition. (iv) Secondary flows may enhance nanoparticle transport and deposition, especially in the meatuses by convecting nanoparticles into these particular regions. (v) For the olfactory region, an optimal particle size may exist due to the combined effects of nanoparticle transport and local deposition mechanisms. However, because of the low deposition flux and small surface area, the olfactory channels account for only very small total deposition values. (vi) A compact correlation for predicting nanoparticle deposition in human nasal airways has been developed.}, number={1}, journal={PHYSICS OF FLUIDS}, author={Shi, H. and Kleinstreuer, C. and Zhang, Z.}, year={2008}, month={Jan} }
 @misc{zhang_misra_bedair_ozturk_2007, title={Optoelectonic devices having arrays of quantum-dot compound semiconductor superlattices therein}, volume={7,265,375}, number={2007 Sept. 4}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Zhang, Z.-B. and Misra, V. and Bedair, S. M. A. and Ozturk, M.}, year={2007} }
 @misc{zhang_misra_bedair_ozturk_2005, title={Optoelectronic devices having arrays of quantum-dot compound semiconductor superlattices therein}, volume={6,914,256}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Zhang, Z. and Misra, V. and Bedair, S. M. A. and Ozturk, M.}, year={2005} }
 @misc{zhang_misra_bedair_ozturk_2004, title={Methods of forming nano-scale electronic and optoelectronic devices using non-photolithographically defined nano-channel templates}, volume={6,709,929}, number={2004 Mar. 23}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Zhang, Z. and Misra, V. and Bedair, S. M. A. and Ozturk, M.}, year={2004} }
 @misc{zhang_2004, title={Vertical field effect transistors including conformal monocrystalline silicon layer on trench sidewall}, volume={6,828,580}, number={2004 Dec. 7}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Zhang, Z.}, year={2004} }
 @misc{zhang_2003, title={Methods of fabricating vertical field effect transistors by conformal channel layer deposition on sidewalls}, volume={6,664,143}, number={2003 Dec. 16}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Zhang, Z.}, year={2003} }
 @article{huang_yeh_zhang_tu_2003, title={The effect of contact resistance on current crowding and electromigration in ULSI multi-level interconnects}, volume={77}, ISSN={["0254-0584"]}, DOI={10.1016/S0254-0584(02)00018-4}, abstractNote={Electromigration (EM) has been the most persistent interconnect reliability issue over the decades. In general, EM damages tend to occur at atomic flux divergence sites. The EM failure rate can be further accelerated by current crowding, which occurs when current flows between inter-level wires. In this work, we used two different via etch schemes to study the effect of contact resistance on current crowding and EM. We found that the etch stop structures show longer EM lifetimes than the over etch. The contact resistance of the etch stop is higher than that of the over etch. Two-dimensional simulation results show that the higher contact resistance in the etch stop can suppress current crowding and improve EM lifetimes. Differences in void morphology between the over etch and etch stop as a result of current crowding are discussed.}, number={2}, journal={MATERIALS CHEMISTRY AND PHYSICS}, author={Huang, JS and Yeh, ECC and Zhang, ZB and Tu, KN}, year={2003}, month={Jan}, pages={377–383} }
 @article{zhang_huang_twiford_martin_layadi_salah_bhowmik_vitkavage_lytle_yeh_et al._2002, title={A robust multilevel interconnect module for subquartermicrometer complementary metal oxide semiconductor technology integration}, volume={149}, ISSN={["1945-7111"]}, DOI={10.1149/1.1467949}, abstractNote={In this work, we present detailed studies of two integration schemes for an aluminum-wire/tungsten -plug-based multilevel ultralarge scale integration (ULSI) interconnect module for subquartermicrometer complementary metal oxide semiconductor (CMOS) technologies, and discuss the benefits and drawbacks of each of them primarily from a process integration point of view. We demonstrate that an etch stop (ES) integration scheme in which the via etch stops on the TiN cladding layer could result in significantly improved via electromigration performance compared to an over etch (OE) integration scheme in which the via is overetched into the underlying Al(Cu). We also identified several highly detrimental early failure modes associated with the OE structure, including contamination-induced stress void formation underneath the via, the metal extrusion inside the via, and the metal corrosion at the bottom of the via, and showed that such early failure modes could he prevented in the ES integration scheme. Even though there were some small penalties in the device performance in the ES integration scheme, the benefits in the reliability and the hetter tolerance to manufacturing process variation clearly justify the adoption of this robust multilevel ULSI interconnect module for subquartermicrometer CMOS technologies.}, number={5}, journal={JOURNAL OF THE ELECTROCHEMICAL SOCIETY}, author={Zhang, ZB and Huang, JS and Twiford, M and Martin, E and Layadi, N and Salah, A and Bhowmik, B and Vitkavage, D and Lytle, S and Yeh, ECC and et al.}, year={2002}, month={May}, pages={G324–G329} }
 @article{cai_zhang_hua_zhang_2002, title={Direct formation of self-assembled nanoporous aluminium oxide on SiO2 and Si substrates}, volume={13}, ISSN={["1361-6528"]}, DOI={10.1088/0957-4484/13/5/317}, abstractNote={An unconventional self-assembly process was integrated with traditional silicon microfabrication technologies to directly form hexagonally ordered nanoporous patterns on both SiO2 and Si surfaces. Starting with an aluminium thin film deposited on a SiO2 or Si substrate, an Al anodization process was employed to generate highly uniform nanoporous anodic aluminium oxide thin films with average pore diameters of 30–70 nm directly on SiO2 and Si surfaces. The long-range order of the anodic aluminium oxide nanoporous structures was improved by thermally annealing the starting Al films to promote the grain size growth and by utilizing a multiple anodization process to enhance their uniformity. The formation of the hexagonally ordered nanoporous array may be attributed to the interplay between the topological requirement for space filling of pores and the kinetics of domain growth with time under a constant anodization voltage. These results demonstrate the feasibility of integrating self-assembled anodic aluminium oxide nanostructures with Si microfabrication technologies in the pursuit of future-generation Si nanoelectronic devices.}, number={5}, journal={NANOTECHNOLOGY}, author={Cai, AL and Zhang, HY and Hua, H and Zhang, ZB}, year={2002}, month={Oct}, pages={627–630} }
 @misc{ying_zhang_zhang_dresselhaus_2002, title={Nanowire arrays}, volume={6,359,288}, number={2002 Mar. 19}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Ying, J. Y. and Zhang, Z. and Zhang, L. and Dresselhaus, M. S.}, year={2002} }
 @misc{ying_zhang_zhang_dresselhaus_2001, title={Process for fabricating an array of nanowires}, volume={6,231,744}, number={2001 May 15}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Ying, J. Y. and Zhang, Z. and Zhang, L. and Dresselhaus, M. S.}, year={2001} }