@article{freeh_lowenthal_pan_kappiah_springer_rountree_femal_2007, title={Analyzing the energy-time trade-off in high-performance computing applications}, volume={18}, ISSN={["1558-2183"]}, DOI={10.1109/TPDS.2007.1026}, abstractNote={Although users of high-performance computing are most interested in raw performance both energy and power consumption has become critical concerns. One approach to lowering energy and power is to use high-performance cluster nodes that have several power-performance states so that the energy-time trade-off can be dynamically adjusted. This paper analyzes the energy-time trade-off of a wide range of applications-serial and parallel-on a power-scalable cluster. We use a cluster of frequency and voltage-scalable AMD-64 nodes, each equipped with a power meter. We study the effects of memory and communication bottlenecks via direct measurement of time and energy. We also investigate metrics that can, at runtime, predict when each type of bottleneck occurs. Our results show that, for programs that have a memory or communication bottleneck, a power-scalable cluster can save significant energy with only a small time penalty. Furthermore, we find that, for some programs, it is possible to both consume less energy and execute in less time by increasing the number of nodes while reducing the frequency-voltage setting of each node}, number={6}, journal={IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS}, author={Freeh, Vincent W. and Lowenthal, David K. and Pan, Feng and Kappiah, Nandini and Springer, Rob and Rountree, Barry L. and Femal, Mark E.}, year={2007}, month={Jun}, pages={835–848} } @inbook{femal_freeh_2005, title={Safe overprovisioning: Using power limits to increase aggregate throughput}, volume={3471}, DOI={10.1007/11574859_11}, abstractNote={Management of power in data centers is driven by the need to not exceed circuit capacity. The methods employed in the oversight of these power circuits are typically static and ad-hoc. New power-scalable system components allow for dynamically controlling power consumption with an accompanying effect on performance. Because the incremental performance gain from operating in a higher performance state is less than the increase in power, it is possible to overprovision the hardware infrastructure to increase throughput and yet still remain below an aggregate power limit. In overprovisioning, if each component operates at maximum power the limit would be exceeded with disastrous results. However, safe overprovisioning regulates power consumption locally to meet the global power budget. Host-based and network-centric models are proposed to monitor and coordinate the distribution of power with the fundamental goal of increasing throughput. This research work presents the advantages of overprovisioning and describes a general framework and an initial prototype. Initial results with a synthetic benchmark indicate throughput increases of nearly 6% from a staticly assigned, power managed environment and over 30% from an unmanaged environment.}, booktitle={Power-aware computer systems: 4th International Workshop, PACS 2004, Portland, OR, USA, December 5, 2004 (Lecture notes in computer science; 3471)}, publisher={Berlin: Springer}, author={Femal, M. E. and Freeh, V. W.}, editor={B. Falsafi, T.N. VijaykumarEditor}, year={2005}, pages={150–164} }