@inproceedings{narwal_rawat_kanale_cheng_agarwal_bhattacharya_baliga_hopkins_2023, title={Analysis and Characterization of Four-quadrant Switches based Commutation Cell}, volume={2023-March}, ISSN={["1048-2334"]}, url={http://dx.doi.org/10.1109/apec43580.2023.10131312}, DOI={10.1109/APEC43580.2023.10131312}, abstractNote={A four-quadrant switch (FQS) blocks either polarity voltage and controls current flow in both directions. Unlike voltage-source converters, in which two-quadrant switches operate over a narrow voltage range, four-quadrant switches are required to operate over a wide range of both voltage and current in applications such as matrix converters and current-source converters. Furthermore, matrix converters require multi-step commutation schemes compared to two-step schemes for current-bidirectional switch based voltage-source converters and voltage-bidirectional switch based current-source converters. This paper provides a generalized overview of commutation schemes used for two and four quadrant switches based two-level commutation cells, identifies comparison indices for FQS commutation schemes, and discusses the need for adaptive commutation-step times for wide voltage and current variation applications. Also, the static and dynamic characteristics of 1.2 kV rated FQS implementations utilizing commercial SiC MOSFETs from four different manufacturers and novel monolithic SiC BiDirectional Field Effect Transistor (BiDFET) have been reported.}, booktitle={2023 IEEE Applied Power Electronics Conference and Exposition (APEC)}, publisher={IEEE}, author={Narwal, Ramandeep and Rawat, Shubham and Kanale, Ajit and Cheng, Tzu-Hsuan and Agarwal, Aditi and Bhattacharya, Subhashish and Baliga, B. Jayant and Hopkins, Douglas C.}, year={2023}, month={Mar}, pages={209–216} }
 @article{narasimhan_kanale_bhattacharya_baliga_2023, title={Performance Evaluation of 3.3 kV SiC MOSFET and Schottky Diode Based Reverse Voltage Blocking Switch for Medium Voltage Current Source Inverter Application}, volume={11}, ISSN={["2169-3536"]}, url={https://doi.org/10.1109/ACCESS.2023.3302916}, DOI={10.1109/ACCESS.2023.3302916}, abstractNote={SiC power devices are used for medium-voltage (MV) motor drive and traction applications due to their higher temperature operation, switching frequencies, and higher efficiencies than Si-based devices. This article investigates three 3.3 kV reverse blocking or current switch configurations for their suitability in MV current-source inverter (CSI) applications. The three configurations are 1) Type I - SiC MOSFET and series Schottky diode; 2) Type II - SiC MOSFETs connected in common-source (CS); and 3) Type III - SiC MOSFETs connected in common-drain (CD) configuration. The switch configurations are characterized by comparing their on-state and switching performance at different junction temperatures varying from 25°C to 125°C. The results are used to evaluate three-phase CSI losses with three different switch configurations and choose the preferred switch configuration for MV-based CSI applications based on inverter efficiency while considering a wide range of operating points. The permissible limits of a 3.3 kV Type I switch-based CSI are presented, thus providing a safe operating area (SOA) of the switch configuration for a CSI application. Finally, the CSI is built using Type I switch configuration and is experimentally validated with an R-L load.}, journal={IEEE ACCESS}, author={Narasimhan, Sneha and Kanale, Ajit and Bhattacharya, Subhashish and Baliga, Jayant B.}, year={2023}, pages={89277–89289} }
 @article{bhattacharya_narwal_shah_baliga_agarwal_kanale_han_hopkins_cheng_2023, title={Power Conversion Systems Enabled by SiC BiDFET Device}, volume={10}, ISSN={["2329-9215"]}, url={https://doi.org/10.1109/MPEL.2023.3237060}, DOI={10.1109/MPEL.2023.3237060}, abstractNote={The BiDirectional Field-Effect Transistor (BiDFET) can enable circuit topologies requiring four-quadrant switches, that were earlier designed using discrete combinations of MOSFETs, IGBTs, GaN HEMTs, and PiN diodes. The monolithic nature of the BiDFET allows lower device count, smaller switch volume, lower inductance, and simpler packaging, and hence more reliable and commercially viable implementation in power electronics converters. The matrix converter topologies, now feasible using BiDFETs, can eliminate the bulky and unreliable dc link capacitors or inductors required for conventional voltage-source or current-source converters in ac–ac and ac–dc applications. The 1.2 kV BiDFET has the potential to disrupt all the applications utilizing 1.2 kV switches, including electric vehicle (EV) drivetrain, bidirectional EV chargers, industrial motor drives, solid-state transformers, datacenter power supplies, elevator drives, dc microgrids, energy storage grid integration, solid-state breakers, etc.}, number={1}, journal={IEEE POWER ELECTRONICS MAGAZINE}, author={Bhattacharya, Subhashish and Narwal, Ramandeep and Shah, Suyash Sushilkumar and Baliga, B. Jayant and Agarwal, Aditi and Kanale, Ajit and Han, Kijeong and Hopkins, Douglas C. and Cheng, Tzu-Hsuan}, year={2023}, month={Mar}, pages={39–43} }
 @article{baliga_hopkins_bhattacharya_agarwal_cheng_narwal_kanale_shah_han_2023, title={The BiDFET Device and Its Impact on Converters}, volume={10}, ISSN={["2329-9215"]}, url={https://doi.org/10.1109/MPEL.2023.3237059}, DOI={10.1109/MPEL.2023.3237059}, abstractNote={The matrix converter topology for direct ac-to-ac conversion offers elimination of the bulky and unreliable d.c. link capacitors used in the popular voltage-source inverter (VSI) with a front-end rectifier. The resulting more compact and higher efficiency implementation is a desirable solution for a wide variety of applications, such as photovoltaic energy generation, motor drives, and energy storage systems.}, number={1}, journal={IEEE POWER ELECTRONICS MAGAZINE}, author={Baliga, B. Jayant and Hopkins, Douglas and Bhattacharya, Subhashish and Agarwal, Aditi and Cheng, Tzu-Hsuan and Narwal, Ramandeep and Kanale, Ajit and Shah, Suyash Sushilkumar and Han, Kijeong}, year={2023}, month={Mar}, pages={20–27} }
 @misc{kanale_cheng_narwal_agarwal_baliga_bhattacharya_hopkins_2022, title={Design Considerations for Developing 1.2 kV 4H-SiC BiDFET-enabled Power Conversion Systems}, ISSN={["2329-3721"]}, url={http://dx.doi.org/10.1109/ECCE50734.2022.9947715}, DOI={10.1109/ECCE50734.2022.9947715}, abstractNote={Bidirectional switches are essential for cycloconverter and matrix converter applications to facilitate single-stage AC-AC conversion without intermediate energy storage elements. The 1.2 kV 4H-SiC BiDFET was developed as the first monolithic bidirectional SiC power transistor. This paper describes the design considerations taken into account while creating the BiDFET device and developing custom packages for housing the switch in discrete form for low power applications and in module form for high-power applications. The realized switches are characterized for their on-state and switching performance. The versatility of the BiDFET device is demonstrated by operating a single BiDFET H-bridge in voltage-source-inverter and current-source-inverter topologies only by varying the gate bias on the individual BiDFETs and reversing the input-output connections.}, journal={2022 IEEE Energy Conversion Congress and Exposition (ECCE)}, publisher={IEEE}, author={Kanale, Ajit and Cheng, Tzu-Hsuan and Narwal, Ramandeep and Agarwal, Aditi and Baliga, B. Jayant and Bhattacharya, Subhashish and Hopkins, Douglas C.}, year={2022}, month={Oct} }
 @article{kanale_agarwal_baliga_bhattacharya_2022, title={Monolithic Reverse Blocking 1.2 kV 4H-SiC Power Transistor: A Novel, Single-Chip, Three-Terminal Device for Current Source Inverter Applications}, volume={37}, ISSN={["1941-0107"]}, url={https://doi.org/10.1109/TPEL.2022.3166933}, DOI={10.1109/TPEL.2022.3166933}, abstractNote={Current sourceinverters (CSIs) require power switches with first quadrant current conduction and gate-controlled output characteristics as well as reverse blocking capability. Experimental demonstration of a SiC monolithic reverse blocking transistor (MRBT) suitable for CSI applications is described in this letter. The proposed device is based on the integration of a SiC JBS diode with a SiC power mosfet on the same chip. The cathode of the SiC JBS diode is connected to the drain of the SiC power mosfet by their common N+ substrate. The proposed device structure creates a novel SiC-based unipolar single-chip three-terminal transistor with reverse blocking capability. The measured characteristics of a 1.2 kV 4H-SiC MRBT, fabricated in a commercial six-inch wafer foundry, are reported in this letter. The devices show a diode-like on-state characteristic with a low knee voltage of 1.3 V and an on-state voltage drop of 2.8 V at 5 A. The measured reverse transfer capacitance and output capacitance for the MRBT at a drain bias of 2 and 1000 V are a factor of ∼3x and ∼1.6x smaller than the measured values for the internal mosfet device. Switching measurements show a 12% reduction in the gate-drain charge for the MRBT compared with the internal mosfet which is favorable for reducing switching losses.}, number={9}, journal={IEEE TRANSACTIONS ON POWER ELECTRONICS}, author={Kanale, Ajit and Agarwal, Aditi and Baliga, B. Jayant and Bhattacharya, Subhashish}, year={2022}, month={Sep}, pages={10112–10116} }
 @article{kanale_baliga_2021, title={A New User-Configurable Method to Improve Short-Circuit Ruggedness of 1.2-kV SiC Power MOSFETs}, volume={36}, ISSN={["1941-0107"]}, DOI={10.1109/TPEL.2020.3010154}, abstractNote={Silicon carbide (SiC) power MOSFETs have been commercialized to replace silicon insulated gate bipolar transistors (IGBTs) in power conversion applications. However, the short-circuit ruggedness of SiC power MOSFETs must be enhanced to match that of Si IGBTs for application in motor drives for electric vehicles. A new, user-configurable method with a series-connected, Si enhancement mode MOSFET (EMM) is demonstrated to improve the short-circuit withstand time of commercially available 1.2-kV SiC power MOSFETs by 86% with a 4.2% increase in on-resistance and a 13% increase in switching loss. In contrast, operating the 1.2-kV SiC power MOSFET with a reduced gate bias of 15 V produces an 80% improvement in short-circuit withstand time with 31% increase in on-resistance and a 31% increase in switching loss. It is demonstrated that the drain of the EMM can be used as a sensing node to monitor on-state current and to detect short-circuit events.}, number={2}, journal={IEEE TRANSACTIONS ON POWER ELECTRONICS}, author={Kanale, Ajit and Baliga, B. Jayant}, year={2021}, month={Feb}, pages={2059–2067} }
 @article{agarwal_kanale_baliga_2021, title={Advanced 650 V SiC Power MOSFETs With 10 V Gate Drive Compatible With Si Superjunction Devices}, volume={36}, ISSN={["1941-0107"]}, DOI={10.1109/TPEL.2020.3017215}, abstractNote={Advanced SiC planar-gate power MOSFETs have been successfully manufactured in a 6-inch commercial foundry with device structures optimized for operation with gate drive voltage of 10 V, compatible with gated drive voltage for Si superjunction products. The electrical characteristics of three advanced SiC MOSFET options are described in this article and compared with those of a state-of-the art Si superjunction MOSFET. The new advanced SiC power MOSFETs are demonstrated to exhibit superior on-state and switching losses with significantly better body-diode reverse recovery performance. Their short-circuit withstand time is also found to be significantly longer than typical commercially available planar-gate SiC power MOSFETs. These improved characteristics make the advanced SiC power MOSFETs suitable replacements for Si superjunction transistors to enhance high frequency circuit performance.}, number={3}, journal={IEEE TRANSACTIONS ON POWER ELECTRONICS}, author={Agarwal, Aditi and Kanale, Ajit and Baliga, B. Jayant}, year={2021}, month={Mar}, pages={3335–3345} }
 @article{kanale_baliga_2021, title={Comparison of BaSIC(DMM) and BaSIC(EMM) Topologies to Enhance Short-Circuit Capability in SiC Power MOSFETs}, ISSN={["1048-2334"]}, DOI={10.1109/APEC42165.2021.9487334}, abstractNote={SiC power MOSFETs have poor short-circuit (SC) withstand capability compared to Si IGBTs. A new method, called BaSIC, with a low voltage silicon MOSFET in series with the source of the SiC power MOSFET, has been recently demonstrated for improvement of the SC capability with minimal impact on normal circuit operation. In this paper, the two BaSIC implementations using either a depletion-mode MOSFET (DMM) or an enhancement-mode MOSFET (EMM) are compared for the first time. The user-configurable BaSIC(EMM) topology was found to result in a superior overall performance. A 1.86x improvement in SC capability was achieved with the BaSIC(EMM) topology with 4% increase in on-resistance and 13 % increase in switching loss versus the BaSIC(DMM) topology which achieved a 2.4x improvement in SC capability with a 19% increase in on-resistance and a 40% increase in switching loss. The BaSIC(DMM) topology offers simplicity of implementation, while the BaSIC(EMM) topology offers a unique user-programmable capability for power electronics engineers.}, journal={2021 THIRTY-SIXTH ANNUAL IEEE APPLIED POWER ELECTRONICS CONFERENCE AND EXPOSITION (APEC 2021)}, author={Kanale, Ajit and Baliga, B. Jayant}, year={2021}, pages={1275–1281} }
 @inproceedings{kanale_narasimhan_cheng_agarwal_shah_baliga_bhattacharya_hopkins_2021, title={Comparison of the Capacitances and Switching Losses of 1.2 kV Common-Source and Common- Drain Bidirectional Switch Topologies}, ISBN={9781665401821}, url={http://dx.doi.org/10.1109/WiPDA49284.2021.9645130}, DOI={10.1109/WiPDA49284.2021.9645130}, abstractNote={Bidirectional, or four-quadrant switches (FQS) can be designed as back-to-back MOSFETs connected in common-drain (CD) or common-source (CS) topologies. CDFQS and CS-FQS assembled from discrete 1.2 kV commercially available SiC power MOSFETs were characterized to obtain capacitance and switching loss values. The CD-FQS exhibited a 1. 17x larger turn-on loss compared to the CS-FQS, while the CS-FQS exhibited a 1. 52x larger turn-off loss compared to the CD-FQS. The CS-FQS exhibited a lower input capacitance, while the CD-FQS exhibited a lower output and reverse transfer capacitance.}, booktitle={2021 IEEE 8th Workshop on Wide Bandgap Power Devices and Applications (WiPDA)}, publisher={IEEE}, author={Kanale, Ajit and Narasimhan, Sneha and Cheng, Tzu-Hsuan and Agarwal, Aditi and Shah, Suyash Sushilkumar and Baliga, B. Jayant and Bhattacharya, Subhashish and Hopkins, Douglas C.}, year={2021}, pages={112–117} }
 @article{kanale_baliga_2021, title={Eliminating Repetitive Short-Circuit Degradation and Failure of 1.2-kV SiC Power MOSFETs}, volume={9}, ISSN={["2168-6785"]}, DOI={10.1109/JESTPE.2020.3045117}, abstractNote={Silicon carbide (SiC) power MOSFETs are known to degrade and eventually fail under repetitive short-circuit (SC) stress. In this article, a new approach, named Baliga Short-Circuit Improvement Concept (BaSIC) depletion-mode MOSFET (DMM), is demonstrated to prevent the degradation and failure of 1.2-kV SiC power MOSFETs under repetitive SC stress. The new concept utilizes a low-voltage, gate–source-shorted Si DMM connected to the source of the SiC MOSFET. It was experimentally verified that no degradation or failure of the SiC power MOSFET occurs after over 3000 SC events with the BaSIC(DMM) topology while the SiC power MOSFETs degraded and failed after 200 SC events without it.}, number={6}, journal={IEEE JOURNAL OF EMERGING AND SELECTED TOPICS IN POWER ELECTRONICS}, author={Kanale, Ajit and Baliga, B. Jayant}, year={2021}, month={Dec}, pages={6773–6779} }
 @article{kanale_baliga_2021, title={Excellent Static and Dynamic Scaling of Power Handling Capability of the BaSIC(DMM) Topology with 1.2 kV SiC Power MOSFETs}, DOI={10.1109/WiPDA49284.2021.9645145}, abstractNote={Enhanced short-circuit (SC) withstand capability for SiC Power MOSFETs has been recently achieved using the BaSIC(DMM) topology which employs a Gate-Source-Shorted Si Depletion Mode MOSFET (GSS Si DMM) in series with the source of the SiC Power MOSFET. This approach increases SC withstand capability with minimal impact on on-resistance and switching losses. In this paper, it is demonstrated for the first time that the Composite MOSFETs created within the BaSIC(DMM) Topology can be paralleled to increase current and power handling capability while maintaining good SC withstand capability. Experimental results on scaling the power were obtained using Composite MOSFET made with 1.2 kV 280 mΩ SiC Power MOSFETs and 100 V 64 mΩ Si DMM devices. Excellent linearity of current scaling and SC capability was experimentally achieved with 2, 3 and 4 paralleled composite MOSFETs.}, journal={2021 IEEE 8TH WORKSHOP ON WIDE BANDGAP POWER DEVICES AND APPLICATIONS (WIPDA)}, author={Kanale, Ajit and Baliga, B. Jayant}, year={2021}, pages={14–17} }
 @article{shah_narwal_bhattacharya_kanale_cheng_mehrotra_agarwal_baliga_hopkins_2021, title={Optimized AC/DC Dual Active Bridge Converter using Monolithic SiC Bidirectional FET (BiDFET) for Solar PV Applications}, ISSN={["2329-3721"]}, url={http://www.scopus.com/inward/record.url?eid=2-s2.0-85123361428&partnerID=MN8TOARS}, DOI={10.1109/ECCE47101.2021.9595533}, abstractNote={Grid interface power conversion systems for commercial, industrial and residential solar power generation are becoming ubiquitous due to the competitive cost of solar energy. The AC/DC dual active bridge (DAB) converter is an upcoming topology in industrial PV energy and energy storage applications, providing bidirectional power transfer and galvanic isolation. In this paper, the properties of a DAB-type converter are leveraged to propose a design optimization process. It can optimize the high-frequency RMS current, size of magnetic elements and zero-voltage-switching (ZVS) region of the converter. The resulting design is compared against that derived from a conventional approach. In addition, an algorithm to compute the harmonic currents at the DC and line frequency AC ports of the system is proposed, and the respective filter designs are presented. The optimized design of the AC/DC DAB converter is implemented using the newly developed, 1200 V, $46 \mathrm{m}\Omega$, four quadrant, SiC-based monolithic bidirectional FETs (BiDFET). Experimental results from the 2.3 kW, $400\mathrm{V}/277\mathrm{V}_{{\mathrm {RMS}}}$ hardware prototype are finally presented to verify the design process.}, journal={2021 IEEE ENERGY CONVERSION CONGRESS AND EXPOSITION (ECCE)}, author={Shah, Suyash Sushilkumar and Narwal, Ramandeep and Bhattacharya, Subhashish and Kanale, Ajit and Cheng, Tzu-Hsuan and Mehrotra, Utkarsh and Agarwal, Aditi and Baliga, B. Jayant and Hopkins, Douglas C.}, year={2021}, pages={568–575} }
 @article{narasimhan_kanale_bhattacharya_baliga_2021, title={Performance Evaluation of 3.3 kV SiC MOSFET and Schottky Diode for Medium Voltage Current Source Inverter Application}, DOI={10.1109/WiPDA49284.2021.9645089}, abstractNote={This paper for the first time discusses the dynamic characterization of 3.3 kV SiC-based reverse-voltage blocking current switch for three different switch configurations - SiC MOSFET with a series diode, SiC MOSFETs connected in the common-source or common-drain configuration. The dynamic characterization of the current switch is performed using the conventional double-pulse test at different junction temperatures and different gate resistances. This paper also discusses the static characterization of the latest generation 3.3 kV SiC MOSFET and Schottky diode TO-247 packages. The static characterization of the MOS-FET includes output characteristics, transfer characteristics, junction capacitance measurement and 3rd quadrant characteristics. The static characteristics of the Schottky diode includes the on-state characteristics, and junction capacitance measurement. With the obtained static and dynamic characterization data, the three-phase current-source inverter losses is evaluated for the three different switch configurations and the preferred current switch configuration is selected for a medium voltage-based high-speed motor drive application.}, journal={2021 IEEE 8TH WORKSHOP ON WIDE BANDGAP POWER DEVICES AND APPLICATIONS (WIPDA)}, author={Narasimhan, Sneha and Kanale, Ajit and Bhattacharya, Subhashish and Baliga, Jayant}, year={2021}, pages={366–371} }
 @article{kanale_baliga_2021, title={Selection Methodology for Si Power MOSFETs Used to Enhance SiC Power MOSFET Short-Circuit Capability With the BaSIC(EMM) Topology}, volume={36}, ISSN={["1941-0107"]}, DOI={10.1109/TPEL.2020.3043281}, abstractNote={The BaSIC(EMM) topology has been previously demonstrated to improve the short-circuit (SC) capability of 1.2-kV SiC power MOSFETs from 3.5 to 7.4 μs while producing a 17% increase in the net on-state resistance. However, a SC time of 10 μs could not be achieved. In this article, a systematic procedure for selection of the Si power MOSFET used in the BaSIC(EMM) topology is described based on information published by manufacturers of Si power MOSFETs in their datasheets. A tradeoff curve between the Si EMM drain saturation current at 150 °C versus its on-resistance at 25 °C is proposed in this article for determination of the best Si EMM product. The proposed methodology allowed identification of a superior Si EMM device. It was experimentally validated that a SC with-stand time of 11 μs, under a gate bias of 20 V applied to the 1.2-kV SiC power MOSFET at a drain bias of 800 V, was achievable with an increase in on-resistance of only 3.6%. These experimental results demonstrate a greatly improved tradeoff curve between SC time and increase in on-resistance.}, number={7}, journal={IEEE TRANSACTIONS ON POWER ELECTRONICS}, author={Kanale, Ajit and Baliga, B. Jayant}, year={2021}, month={Jul}, pages={8243–8252} }
 @inproceedings{kanale_cheng_shah_han_agarwal_baliga_hopkins_bhattacharya_2021, title={Switching Characteristics of a 1.2 kV, 50 mΩ SiC Monolithic Bidirectional Field Effect Transistor (BiDFET) with Integrated JBS Diodes}, ISBN={9781728189499}, ISSN={["1048-2334"]}, url={http://dx.doi.org/10.1109/apec42165.2021.9487410}, DOI={10.1109/APEC42165.2021.9487410}, abstractNote={The switching performance of large area (1cm x 1cm) monolithic 1.2 kV 50 mΩ 4H-SiC bidirectional field effect transistor (BiDFET) with integrated JBS diodes is reported for the first time. The devices were fabricated in a 6-inch commercial foundry and then packaged in a custom-designed four-terminal module. The switching performance of the BiDFET has been observed to be 1.4x better than that of its internal JBSFETs. Dynamic characterization was performed at 800 V with different gate resistances, current levels and case temperatures. An increase in switching losses was observed for the BiDFET with increasing gate resistance and current level as observed for SiC power MOSFETs. The BiDFET showed a 9% reduction in total switching loss from 25 °C to 150 °C with a current of 10 A.}, booktitle={2021 IEEE Applied Power Electronics Conference and Exposition (APEC)}, publisher={IEEE}, author={Kanale, Ajit and Cheng, Tzu-Hsuan and Shah, Suyash Sushilkumar and Han, Kijeong and Agarwal, Aditi and Baliga, B. Jayant and Hopkins, Douglas and Bhattacharya, Subhashish}, year={2021}, month={Jun}, pages={1267–1274} }
 @article{kanale_baliga_2021, title={Theoretical Optimization of the Si GSS-DMM Device in the BaSIC Topology for SiC Power MOSFET Short-Circuit Capability Improvement}, volume={9}, ISSN={["2169-3536"]}, DOI={10.1109/ACCESS.2021.3078134}, abstractNote={The BaSIC(DMM) topology has been experimentally demonstrated to improve the short-circuit time for a 1.2 kV SiC power MOSFET product from <inline-formula> <tex-math notation="LaTeX">$4.8~\mu \text{s}$ </tex-math></inline-formula> to <inline-formula> <tex-math notation="LaTeX">$7.9~\mu \text{s}$ </tex-math></inline-formula> with a 17% increase in on-state resistance by utilizing a commercially available 100 V rated Gate-Source-Shorted (GSS) Si Depletion-Mode power MOSFET (DMM). The optimization of the Si GSS-DMM is discussed in this paper to achieve even superior performance, namely larger short-circuit time with less increase in on-resistance. It is theoretically demonstrated for the first time that a highly desirable short-circuit time of <inline-formula> <tex-math notation="LaTeX">$10~\mu \text{s}$ </tex-math></inline-formula>, similar to Si IGBTs, can be achieved for two SiC power MOSFET products with less than 3% increase in on-resistance. This was accomplished by reducing the breakdown voltage rating of the Si GSS-DMM from 100 V to 30 V, altering the cell design parameters, and utilizing the trench-gate design. The theoretical analysis provided in this paper provides valuable design guidelines for manufacturers of Si GSS-DMM devices to achieve optimum performance for use in the BaSIC(DMM) topology.}, journal={IEEE ACCESS}, author={Kanale, Ajit and Baliga, B. Jayant}, year={2021}, pages={70039–70047} }
 @article{kanale_baliga_2020, title={Achieving Short Circuit Capability for 600 V GaN FETs Using a Gate-Source-Shorted Si Depletion-Mode MOSFET in Series with the Source}, DOI={10.1109/WiPDAAsia49671.2020.9360275}, abstractNote={Gallium Nitride FETs have poor short-circuit withstand capability at high DC bus voltages with on-state gate drive voltage. In this paper, the BaSIC(DMM) topology that employs a low voltage Si depletion-mode MOSFET (DMM) in series with source of the GaN FET is demonstrated to suppress the peak short-circuit current and extend the SC withstand time. Experimental results are provided for commercially available 600 V Cascode GaN FETs. The SC withstand time was increased from 0.33 $\mu$ s to 4.35 $\mu$ s at a drain bias of 400 V with gate bias of 8 V, an improvement by a factor of 13x. Under normal power circuit operating conditions, the BaSIC(DMM) topology produces a 29 % increase in on-resistance and almost no change in switching losses.}, journal={2020 IEEE WORKSHOP ON WIDE BANDGAP POWER DEVICES AND APPLICATIONS IN ASIA (WIPDA ASIA)}, author={Kanale, Ajit and Baliga, B. Jayant}, year={2020} }
 @article{kanale_baliga_2020, title={Enhancing Short Circuit Capability of 1.2-kV Si IGBT Using a Gate-Source Shorted Si Depletion Mode MOSFET in Series With the Emitter}, volume={35}, ISSN={["1941-0107"]}, DOI={10.1109/TPEL.2019.2953589}, abstractNote={Short-circuit (SC) capability is a critical requirement for power switches in modern power electronics applications. A tradeoff between on-state voltage drop, switching loss, and SC capability of insulated gate bipolar transistors (IGBTs) is performed by manufacturers. In general, IGBTs optimized with low on-state voltage have poor SC capability compared with those with good SC capability. In this report, a novel method is described to improve the SC capability of IGBTs optimized with low on-state voltage drop by using a gate-source-shorted Si depletion-mode (DM) mosfet connected in series with the emitter. A seven-fold increase in the SC capability of commercially available 1.2-kV IGBTs was achieved at high dc bus voltages with minimal impact on on-state and switching loss performance. The proposed method also provides a sensing voltage signal at the drain of the Si DM-mosfet, which can be used to monitor the on-state current magnitude and to detect SC fault conditions.}, number={6}, journal={IEEE TRANSACTIONS ON POWER ELECTRONICS}, author={Kanale, Ajit and Baliga, B. Jayant}, year={2020}, month={Jun}, pages={6350–6361} }