@article{sarkar_floyd_2017, title={A 28-GHz Harmonic-Tuned Power Amplifier in 130-nm SiGe BiCMOS}, volume={65}, ISSN={["1557-9670"]}, url={http://www.scopus.com/inward/record.url?eid=2-s2.0-85008465269&partnerID=MN8TOARS}, DOI={10.1109/tmtt.2016.2636842}, abstractNote={The design methodology and measurement results of a millimeter-wave harmonic-tuned power amplifier (PA) are presented. The PA uses optimum fundamental and second-harmonic terminations to achieve high peak power-added efficiency (PAE). We present a parasitic-aware design technique for the output network realized as a bandpass filter cascaded with or surrounded by a low-pass matching network. This technique demonstrates a method of manipulating the second-harmonic phase of a Chebyshev bandpass filter, while maintaining a suitable impedance match at the fundamental. The technique is applied to a 28-GHz PA in SiGe BiCMOS, which achieves 15.3-dB gain, 18.6-dBm saturated output power, 15.5-dBm output 1-dB compression point, and 35.3% peak PAE. When backed off 6- from 1-dB compression, the PA achieves 11.5% PAE with a third-order intermodulation product of −33.7 dBc.}, number={2}, journal={IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES}, author={Sarkar, Anirban and Floyd, Brian A.}, year={2017}, month={Feb}, pages={522–535} }
 @article{sarkar_aryanfar_floyd_2017, title={A 28-GHz SiGe BiCMOS PA With 32% Efficiency and 23-dBm Output Power}, volume={52}, ISSN={["1558-173X"]}, url={http://www.scopus.com/inward/record.url?eid=2-s2.0-85018626903&partnerID=MN8TOARS}, DOI={10.1109/jssc.2017.2686585}, abstractNote={In this paper, we present a two-stage, four-way combined power amplifier (PA) operating in the 27–31-GHz frequency range in 180-nm SiGe BiCMOS technology. The output network of the PA employs spiral transformers and a microstrip T-combiner to realize low-loss two-way series, two-way parallel power combining. With the help of a lumped-element transformer model, we present a co-optimization technique for the transformer and the adjoining matching components to minimize the power loss of the full output network. The design methodology is applicable for realizing an arbitrary impedance at the device plane with a K-way series, M-way parallel combiner. The efficacy of this technique is demonstrated by the realization of a PA, which has 27.6-dB gain, 23.2-dBm, 1-dB compressed output power, 32.7% power-added efficiency (PAE) at 1-dB compression, and 15% PAE at 6-dB back off. Linearity measurements show less than 4° amplitude-modulation to phase-modulation distortion below 3-dB back off and less than −32-dBc intermodulation product at 6-dB back off.}, number={6}, journal={IEEE JOURNAL OF SOLID-STATE CIRCUITS}, author={Sarkar, Anirban and Aryanfar, Farshid and Floyd, Brian A.}, year={2017}, month={Jun}, pages={1680–1686} }
 @article{greene_sarkar_floyd_2017, title={A 60-GHz Dual-Vector Doherty Beamformer}, volume={52}, ISSN={["1558-173X"]}, url={http://www.scopus.com/inward/record.url?eid=2-s2.0-85013649014&partnerID=MN8TOARS}, DOI={10.1109/jssc.2017.2661980}, abstractNote={In this paper, we demonstrate a 60-GHz transmit beamformer implemented in 130-nm SiGe BiCMOS technology which includes a Doherty amplifier driven by a dual-vector phase rotator (DVR). In addition, a benchmarking circuit comprising another DVR followed by two class-AB amplifiers, each nearly identical to the carrier amplifier within the Doherty, is included which allows us to measure the Doherty improvement in terms of efficiency and output power over conventional approaches. The dual-vector Doherty element achieves 28-dB gain with an output 1-dB compression point of +16.7 dBm. A power-added efficiency (PAE) of 16.5% is realized at 1-dB compression, with 10.8% and 7% PAE at 3- and 6-dB back-off, respectively. A stand-alone Doherty amplifier achieves a 17.1-dBm output 1-dB compression point at 23.7% PAE and a 6-dB back-off PAE of 13%. The DVR performs the phase shifting for each phased-array element necessary for beamforming, as well as providing tunable amplitude balance and phase separation between input signals to the Doherty amplifier. This allows optimization of both linearity and efficiency profiles across frequency. The Doherty element is capable of generating full 360° phase shifts with 5-b accuracy having root-mean-squared errors less than 0.6 dB in amplitude and 6° in phase from 60 to 66 GHz.}, number={5}, journal={IEEE JOURNAL OF SOLID-STATE CIRCUITS}, author={Greene, Kevin and Sarkar, Anirban and Floyd, Brian}, year={2017}, month={May}, pages={1373–1387} }
 @inproceedings{sarkar_floyd_2014, title={A 28-GHz class-J power amplifier with 18-dBm output power and 35% peak PAE in 120-nm SiGe BiCMOS}, url={http://www.scopus.com/inward/record.url?eid=2-s2.0-84903832374&partnerID=MN8TOARS}, DOI={10.1109/sirf.2014.6828532}, abstractNote={A 28-GHz Power Amplifier (PA) designed in 120-nm SiGe BiCMOS for potential use in mobile millimeter-wave phased arrays is presented in this paper. The core of the PA is a cascode amplifier operated in class-J mode. A multi-harmonic load-pull analysis was used to determine the optimum harmonic output impedances (up to third harmonic) resulting in improved efficiency. The PA has a measured 15.3-dB small signal gain, 18.6-dBm saturated output power and 35.3% peak power added efficiency (PAE) at 28GHz. At 1-dB compression the PA has a 15.5-dBm output power and 31.5% PAE.}, booktitle={2014 IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SIRF)}, author={Sarkar, A. and Floyd, Brian}, year={2014}, pages={71–73} }
 @inproceedings{sarkar_greene_floyd_2014, title={A power-efficient 4-element beamformer in 120-nm SiGe BiCMOS for 28-GHz cellular communications}, url={http://www.scopus.com/inward/record.url?eid=2-s2.0-84919631866&partnerID=MN8TOARS}, DOI={10.1109/bctm.2014.6981287}, abstractNote={A 4-element beamformer designed in 120-nm SiGe BiCMOS technology for 28-GHz mobile millimeter-wave broadband system is presented in this paper. Each element of the beamformer consists of a 4-bit active phase shifter and a two-stage Power Amplifier (PA). A two-stage PA design with a Class-C pre-driver and a 2nd-harmonic-tuned Class-AB driver stage is adopted for high gain and high efficiency at both peak and backed-off power levels. The active phase shifter employs in-phase/ quadrature phase current steering and digital control of transconductance (Gm). Measurement results show a 33-dB gain, 16.5-dBm saturated output power, 15.7-dBm oP1dB, 27.5% peak PAE and 8.2% 7-dB back-off PAE at 27 GHz for a single element. The minimum (maximum) RMS gain and phase errors across the 27-29 GHz band were 0.5 dB (3 dB) and 1.5°(12°). The beamformer also includes a 1:4 power splitter and a serial interface for digital control and occupies a die area of 5.32mm2.}, booktitle={2014 ieee bipolar/bicmos circuits and technology meeting (bctm)}, author={Sarkar, A. and Greene, K. and Floyd, Brian}, year={2014}, pages={68–71} }