Works (23)

2007 chapter

Combining cluster sampling with single pass methods for efficient sampling regimen design

In 2007 IEEE International Conference On Computer Design (pp. 472–479). New York: IEEE.

By: P. Bryan & T. Conte

Source: NC State University Libraries
Added: August 6, 2018

2005 journal article

Enhancing memory-level parallelism via recovery-free value prediction

IEEE Transactions on Computers, 54(7), 897–912.

By: H. Zhou & T. Conte

Source: NC State University Libraries
Added: August 6, 2018

2005 journal article

High-performance and low-cost dual-thread VLIW processor using weld architecture paradigm

IEEE Transactions on Parallel and Distributed Systems, 16(12), 1132–1142.

By: E. Ozer & T. Conte

Source: NC State University Libraries
Added: August 6, 2018

2005 journal article

Optimal chip-package codesign for high-performance DSP

IEEE Transactions on Advanced Packaging, 28(2), 288–297.

By: P. Mehrotra, V. Rao, T. Conte & P. Franzon

Source: NC State University Libraries
Added: August 6, 2018

2004 journal article

Opportunities and challenges in embedded systems

IEEE Micro, 24(4), 38208.

By: A. Bechini, T. Conte & C. Prete

Source: NC State University Libraries
Added: August 6, 2018

2003 journal article

Adaptive mode control: A static-power-efficient cache design

ACM Transactions on Embedded Computing Systems, 2(3), 347–372.

By: H. Zhou, M. Toburen, E. Rotenberg & T. Conte

Source: NC State University Libraries
Added: August 6, 2018

2003 journal article

Modeling value speculation: An optimal edge selection problem

IEEE Transactions on Computers, 52(3), 277–292.

By: C. Fu, J. Bodine & T. Conte

Source: NC State University Libraries
Added: August 6, 2018

2003 chapter

Tree traversal scheduling: A global instruction scheduling technique for VLIW/EPIC processors

In Languages and compilers for parallel computing: 14th International Workshop, LCPC 2001, Cumberland Falls, KY, USA, August 1-3, 2001: Revised papers (Vol. 2624, pp. 223–238).

By: H. Zhou, M. Jennings & T. Conte

Source: NC State University Libraries
Added: August 6, 2018

2002 journal article

Choosing the brain(s) of an embedded system

Computer, 35(7), 106–107.

By: T. Conte

Source: NC State University Libraries
Added: August 6, 2018

2001 conference paper

Adaptive mode control: A static-power-efficient cache design

2001 International Conference on Parallel Architectures and Compilation Techniques: Proceedings: 8-12 September, 2001, Barcelona, Catalunya, Spain, 61–70.

By: H. Zhou, M. Toburen, E. Rotenberg & T. Conte

Source: NC State University Libraries
Added: August 6, 2018

2000 journal article

Properties of rescheduling size invariance for dynamic rescheduling-based VLIW cross-generation compatibility

IEEE Transactions on Computers, 49(8), 814–825.

By: T. Conte & S. Sathaye

Source: NC State University Libraries
Added: August 6, 2018

2000 journal article

System-level power consumption modeling and tradeoff analysis techniques for superscalar processor design

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 8(2), 129–137.

By: T. Conte, K. Menezes, S. Sathaye & M. Toburen

Source: NC State University Libraries
Added: August 6, 2018

1999 journal article

30th Annual ACM/IEEE International Symposium on Microarchitecture, Part II - Editors' Introduction

International Journal of Parallel Programming, 27(6), 425–426.

By: T. Conte, W. Hwu & M. Smotherman

Source: NC State University Libraries
Added: August 6, 2018

1999 journal article

Challenges in processor modeling and validation

IEEE Micro, 19(3), 9–14.

By: P. Bose, T. Conte & T. Austin

Source: NC State University Libraries
Added: August 6, 2018

1999 journal article

Special issue: 30th Annual ACM/IEEE International Symposium on Microarchitecture, Part I

International Journal of Parallel Programming, 27(5), 325–326.

By: T. Conte, W. Hwu & M. Smotherman

Source: NC State University Libraries
Added: August 6, 2018

1998 journal article

Combining trace sampling with single pass methods for efficient cache simulation

IEEE Transactions on Computers, 47(6), 714–720.

By: T. Conte, M. Hirsch & W. Hwu

Source: NC State University Libraries
Added: August 6, 2018

1998 journal article

MPS: Miss-path scheduling for multiple-issue processors

IEEE Transactions on Computers, 47(12), 1382–1397.

By: S. Banerjia, S. Sathaye, K. Menezes & T. Conte

Source: NC State University Libraries
Added: August 6, 2018

1998 journal article

Performance analysis and its impact on design

Computer, 31(5), 41–49.

By: P. Bose & T. Conte

Source: NC State University Libraries
Added: August 6, 2018

1998 journal article

Subword extensions for video processing on mobile systems

IEEE Concurrency, 6(3), 13–16.

By: M. Jennings & T. Conte

Source: NC State University Libraries
Added: August 6, 2018

1998 conference paper

Unified assign and schedule: A new approach to scheduling for clustered register file microarchitectures

Proceedings, 31st annual ACM/IEEE International Symposium on Microarchitecture: November 30-December 2, 1998, Dallas, Texas / co-sponsored by ACM SIGMICRO, IEEE Computer Society Technical Committee on Microprogramming and Microarchitecture., 308–315. Los Alamitos, Calif.: IEEE Computer Society Press.

By: E. Ozer, S. Banerjia & T. Conte

Source: NC State University Libraries
Added: August 6, 2018

1998 journal article

Value speculation scheduling for high performance processors

ACM SIGPLAN Notices, 33(11), 262–271.

By: C. Fu, M. Jennings, S. Larin & T. Conte

Source: NC State University Libraries
Added: August 6, 2018

1997 journal article

Compilers for instruction level parallelism

Computer, 30(12), 63.

By: M. Schlansker, T. Conte, J. Dehnert, K. Ebcioglu, J. Fang & C. Thompson

Source: NC State University Libraries
Added: August 6, 2018

1997 journal article

Optimization of VLIW compatibility systems employing dynamic rescheduling

International Journal of Parallel Programming, 25(2), 83–112.

By: T. Conte & S. Sathaye

Source: NC State University Libraries
Added: August 6, 2018