Devesh Tiwari

Works (2)

Updated: July 5th, 2023 15:45

2012 article

Modeling and Analyzing Key Performance Factors of Shared Memory MapReduce

2012 IEEE 26TH INTERNATIONAL PARALLEL AND DISTRIBUTED PROCESSING SYMPOSIUM (IPDPS), pp. 1306–1317.

By: D. Tiwari n & Y. Solihin n

TL;DR: An analytical model is built to capture key performance factors of shared memory MapReduce and investigates important performance trends and behavior, and proposes an application classification framework that can be used to reason about performance bottlenecks for a given application. (via Semantic Scholar)
Source: Web Of Science
Added: August 6, 2018

2011 conference paper

HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor

International symposium on high-performance computer, 99–110.

By: S. Lee n, D. Tiwari n, S. Yan  n & J. Tuck n 

TL;DR: A hardware-accelerated queue, or HAQu, is proposed that adds hardware to a CMP that accelerates operations on software queues, and ensures that the full state of the queue is stored in the application's address space, thereby ensuring virtualization. (via Semantic Scholar)
Source: NC State University Libraries
Added: August 6, 2018

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