Emre Karabulut

College of Engineering

Works (10)

Updated: August 30th, 2024 05:02

2024 article

A Hardware-Software Co-Design for the Discrete Gaussian Sampling of FALCON Digital Signature

2024 IEEE INTERNATIONAL SYMPOSIUM ON HARDWARE ORIENTED SECURITY AND TRUST, HOST, pp. 90–100.

By: E. Karabulut n & A. Aysu n

author keywords: discrete Gaussian sampling; hardware-software co-design; post-quantum cryptography; digital signatures; FPGA
Source: Web Of Science
Added: July 30, 2024

2024 article

Extended Abstract: Pre-Silicon Vulnerability Assessment for AI/ML Hardware

PROCEEDING OF THE GREAT LAKES SYMPOSIUM ON VLSI 2024, GLSVLSI 2024, pp. 495–495.

By: F. Aydin n, E. Karabulut n & A. Aysu n

author keywords: Pre-silicon; Side-channel analysis; pre-silicon validation; AI/ML hardware
Source: Web Of Science
Added: August 26, 2024

2023 article

SS-AXI: Secure and Safe Access Control Mechanism for Multi-Tenant Cloud FPGAs

2023 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, ISCAS.

By: E. Karabulut n, A. Awad n & A. Aysu n

author keywords: Multi-tenant cloud FPGAs; access control mechanism; memory isolation
TL;DR: This paper proposes an improved access control mechanism for multi-tenant cloud FPGAs that allows dynamic configuration of access control privileges and has three advantages: enabling secure resource sharing of on-chip BRAMs to tenants, enabling safe sharing by resolving deadlocks and faulty access requests, and improvement in latency and throughput. (via Semantic Scholar)
Source: Web Of Science
Added: September 11, 2023

2022 article

High-Fidelity Model Extraction Attacks via Remote Power Monitors

2022 IEEE INTERNATIONAL CONFERENCE ON ARTIFICIAL INTELLIGENCE CIRCUITS AND SYSTEMS (AICAS 2022): INTELLIGENT TECHNOLOGY IN THE POST-PANDEMIC ERA, pp. 328–331.

By: A. Dubey n, E. Karabulut n, A. Awad n & A. Aysu n

author keywords: Neural networks; model stealing; time-to-digital converters; secure virtualization
TL;DR: It is demonstrated that a remote monitor implemented with time-to-digital converters can be exploited to steal the weights from a hardware implementation of NN inference, which expands the attack vector to multi-tenant cloud FPGA platforms. (via Semantic Scholar)
Source: Web Of Science
Added: November 7, 2022

2021 article

An Efficient Non-Profiled Side-Channel Attack on the CRYSTALS-Dilithium Post-Quantum Signature

2021 IEEE 39TH INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD 2021), pp. 583–590.

By: Z. Chen *, E. Karabulut n, A. Aysu n, Y. Ma * & J. Jing *

author keywords: Hardware Security; Post-quantum Cryptography; Correlation Power Analysis; Digital Signature; Number Theoretic Transform
TL;DR: This work proposes an efficient non-profiled Correlation Power Analysis (CPA) strategy on Dilithium to recover the secret key by targeting the underlying polynomial multiplication arithmetic and constructs a hybrid scheme that combines the advantages of both schemes. (via Semantic Scholar)
Source: Web Of Science
Added: March 28, 2022

2021 journal article

Efficient, Flexible, and Constant-Time Gaussian Sampling Hardware for Lattice Cryptography

IEEE TRANSACTIONS ON COMPUTERS, 71(8), 1810–1823.

By: E. Karabulut n, E. Alkim * & A. Aysu n

author keywords: Hardware; Cryptography; Gaussian distribution; Standards; Timing; Optimization; Encryption; Discrete gaussian sampling; lattice cryptography; FPGA
TL;DR: The proposed hardware can support all the discrete Gaussian distributions used in post-quantum digital signatures and key encapsulation algorithms, the homomorphic encryption library of SEAL, and other algorithms such BLISS digital signature and LP public-key encryption. (via Semantic Scholar)
Source: Web Of Science
Added: July 18, 2022

2021 article

FALCON Down: Breaking FALCON Post-Quantum Signature Scheme through Side-Channel Attacks

2021 58TH ACM/IEEE DESIGN AUTOMATION CONFERENCE (DAC), pp. 691–696.

By: E. Karabulut n & A. Aysu n

author keywords: side-channel attacks; post-quantum cryptography; digital signatures
TL;DR: The first side-channel attack on FALCON—a NIST Round-3 finalist for the post-quantum digital signature standard—is proposed and a known-plaintext attack that uses the electromagnetic measurements of the device to extract the secret signing keys, which then can be used to forge signatures on arbitrary messages. (via Semantic Scholar)
Source: Web Of Science
Added: March 28, 2022

2021 article

Single-Trace Side-Channel Attacks on omega-Small Polynomial Sampling

2021 IEEE INTERNATIONAL SYMPOSIUM ON HARDWARE ORIENTED SECURITY AND TRUST (HOST), pp. 35–45.

By: E. Karabulut n, E. Alkim * & A. Aysu n

author keywords: Side-channel attacks; Post-quantum cryptography; NTRU; CRYSTALS-DILITHIUM
TL;DR: A new single-trace side-channel attack on lattice-based post-quantum protocols is proposed, revealing that the sorting implementation in NTRU/NTRU Prime and the shuffling in CRYSTALS-DILITHIUM's ω-small polynomial sampling process leaks information about the ‘-1’’0’, or ’+1' assignments made to the coefficients. (via Semantic Scholar)
Source: Web Of Science
Added: June 13, 2022

2020 journal article

An Extensive Study of Flexible Design Methods for the Number Theoretic Transform

IEEE TRANSACTIONS ON COMPUTERS, 71(11), 2829–2843.

By: A. Mert *, E. Karabulut n, E. Ozturk *, E. Savas * & A. Aysu n

author keywords: NTT; flexible; hardware; HLS; RISC-V
TL;DR: An extensive study of flexible design methods for NTT implementation by evaluating three cases: parametric hardware design, high-level synthesis (HLS) design approach, and design for software implementation compiled on soft-core processors, where all are targeted on reconfigurable hardware devices. (via Semantic Scholar)
Source: Web Of Science
Added: October 24, 2022

2020 article

RANTT: A RISC-V Architecture Extension for the Number Theoretic Transform

2020 30TH INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE LOGIC AND APPLICATIONS (FPL), pp. 26–32.

By: E. Karabulut n & A. Aysu n

author keywords: Lattice-Based Cryptography; RISC-V; NTT
TL;DR: The proposed design is respectively 6x, 40x, and 3x more efficient than the baseline solution, Berkeley Out-of-Order Machine, and a prior HW/SW co-design, while providing the needed flexibility. (via Semantic Scholar)
Source: Web Of Science
Added: August 23, 2021

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