Works (65)

2020 journal article

Post-Silicon Microarchitecture

IEEE COMPUTER ARCHITECTURE LETTERS, 19(1), 26–29.

By: C. Kumar, A. Chaudhary, S. Bhawalkar, U. Mathur, S. Jain, A. Vastrad, E. Rotenberg

Source: Web Of Science
Added: May 8, 2020

2017 conference paper

A case for standard-cell based RAMs in highly-ported superscalar processor structures

Proceedings of the eighteenth international symposium on quality electronic design (isqed), 131–137.

By: S. Ku, E. Forbes, R. Chowdhury & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2016 conference paper

AnyCore-1: A comprehensively adaptive 4-way superscalar processor

2016 ieee hot chips 28 symposium (hcs).

By: R. Chowdhury, A. Kannepalli & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2016 conference paper

AnyCore: A synthesizable RTL model for exploring and fabricating adaptive superscalar cores

Ieee international symposium on performance analysis of systems and, 214–224.

By: R. Chowdhury, A. Kannepalli, S. Ku & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2016 conference paper

Fast register consolidation and migration for heterogeneous multi-core processors

Proceedings of the 34th ieee international conference on computer design (iccd), 1–8.

By: E. Forbes & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2016 conference paper

Physical design of a 3D-stacked heterogeneous multi-core processor

2016 IEEE International 3D Systems Integration Conference (3DIC). Presented at the 2016 IEEE International 3D Systems Integration Conference (3DIC).

By: R. Widialaksono, R. Basu Roy Chowdhury, Z. Zhang, J. Schabel, S. Lipa, E. Rotenberg, W. Rhett Davis, P. Franzon

Event: 2016 IEEE International 3D Systems Integration Conference (3DIC)

Source: Crossref
Added: June 15, 2019

2015 journal article

Control-flow decoupling: An approach for timely, non-speculative branching

IEEE Transactions on Computers, 64(8), 2182–2203.

By: R. Sheikh, J. Tuck & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2014 conference paper

Co-simulation framework for streamlining microprocessor development on standard ASIC design flow

2014 19th asia and south pacific design automation conference (asp-dac), 400–405.

By: T. Nakabayashi, T. Sugiyama, T. Sasaki, E. Rotenberg & T. Kondo

Source: NC State University Libraries
Added: August 6, 2018

2014 conference paper

Design-effort alloy: Boosting a highly tuned primary core with untuned alternate cores

2014 IEEE 32nd International Conference on Computer Design (ICCD). Presented at the 2014 32nd IEEE International Conference on Computer Design (ICCD).

By: E. Forbes, N. Choudhary, B. Dwiel & E. Rotenberg

Event: 2014 32nd IEEE International Conference on Computer Design (ICCD)

Source: Crossref
Added: June 15, 2019

2013 conference paper

A Unified View of Non-monotonic Core Selection and Application Steering in Heterogeneous Chip Multiprocessors

Proceedings of the 22nd IEEE/ACM International Conference on Parallel Architectures and Compilation Techniques (PACT-22), 133–144.

By: S. Navada, N. Choudhary, S. Wadhavkar & E. Rotenberg

Source: NC State University Libraries
Added: July 28, 2019

2013 conference paper

Design of controller for L2 cache mapped in Tezzaron stacked DRAM

2013 ieee international 3d systems integration conference (3dic).

By: N. Tshibangu, P. Franzon, E. Rotenberg & W. Davis

Source: NC State University Libraries
Added: August 6, 2018

2013 conference paper

Hetero(2) 3d integration: A scheme for optimizing efficiency/cost of chip multiprocessors

Proceedings of the fourteenth international symposium on quality electronic design (ISQED 2013), 1–7.

By: S. Priyadarshi, N. Choudhary, B. Dwiel, A. Upreti, E. Rotenberg, R. Davis, P. Franzon

Source: NC State University Libraries
Added: August 6, 2018

2013 conference paper

Rationale for a 3D heterogeneous multi-core processor

2013 IEEE 31st International Conference on Computer Design (ICCD). Presented at the 2013 IEEE 31st International Conference on Computer Design (ICCD).

By: E. Rotenberg, B. Dwiel, E. Forbes, Z. Zhang, R. Widialaksono, R. Basu Roy Chowdhury, N. Tshibangu, S. Lipa, W. Davis, P. Franzon

Event: 2013 IEEE 31st International Conference on Computer Design (ICCD)

Source: Crossref
Added: June 15, 2019

2012 conference paper

A physical design study of fabscalar-generated superscalar cores

2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC). Presented at the 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC).

By: N. Choudhary, B. Dwiel & E. Rotenberg

Event: 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC)

Source: Crossref
Added: June 15, 2019

2012 conference paper

Control-flow decoupling

2012 ieee/acm 45th international symposium on microarchitecture (micro-45), 329–340.

By: R. Sheikh, J. Tuck & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2012 conference paper

FPGA modeling of diverse superscalar processors

2012 IEEE International Symposium on Performance Analysis of Systems & Software. Presented at the 2012 IEEE International Symposium on Performance Analysis of Systems & Software (ISPASS).

By: B. Dwiel, N. Choudhary & E. Rotenberg

Event: 2012 IEEE International Symposium on Performance Analysis of Systems & Software (ISPASS)

Source: Crossref
Added: June 15, 2019

2012 journal article

Fabscalar: Automating superscalar core design

IEEE Micro, 32(3), 48–59.

By: N. Choudhary, S. Wadhavkar, T. Shah, H. Mayukh, J. Gandhi, B. Dwiel, S. Navada, H. Najaf-Abadi, E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2012 conference paper

Research for Transporting Alpha ISA and Adopting Multi-processor to FabScalar

Proceedings of the Symposium on Advanced Computing Systems and Infrastructures 2012 (SACSIS 2012), 374–381.

By: T. Nakabayashi, T. Sasaki, E. Rotenberg, K. Ohno & T. Kondo

Source: NC State University Libraries
Added: July 10, 2019

2011 journal article

FabScalar: Composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template

ISCA 2011: Proceedings of the 38th Annual International Symposium on Computer Architecture, 11–22.

By: N. Choudhary, S. Wadhavkar, T. Shah, H. Mayukh, J. Gandhi, B. Dwiel, S. Navada, H. Najaf-abadi, E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2010 conference paper

Criticality-driven superscalar design space exploration

Pact 2010: Proceedings of the Nineteenth International Conference on Parallel Architectures and Compilation Techniques, 261–272.

By: S. Navada, N. Choudhary & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2010 conference paper

EXACT: Explicit Dynamic-Branch Prediction with Active Updates

Proceedings of the 7th ACM international conference on Computing frontiers - CF '10, 165–176.

By: M. Al-Otoom, E. Forbes & E. Rotenberg

Event: the 7th ACM international conference

Source: Crossref
Added: July 28, 2019

2009 conference paper

Architectural Contesting

2009 IEEE 15th International Symposium on High Performance Computer Architecture. Presented at the 2009 IEEE 15th International Symposium on High Performance Computer Architecture (HPCA).

By: H. Najaf-abadi & E. Rotenberg

Event: 2009 IEEE 15th International Symposium on High Performance Computer Architecture (HPCA)

Source: Crossref
Added: June 21, 2019

2009 conference paper

Core-selectability in chip multiprocessors

International conference on parallel architectures and compilation, 113–122.

By: H. Najaf-Abadi, N. Choudhary & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2009 conference paper

The importance of accurate task arrival characterization in the design of processing cores

Proceedings of the 2009 ieee international symposium on workload characterization, 75–85.

By: H. Najaf-abadi & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2008 conference paper

Configurational Workload Characterization

ISPASS 2008 - IEEE International Symposium on Performance Analysis of Systems and software. Presented at the Software (ISPASS).

By: H. Najaf-abadi & E. Rotenberg

Event: Software (ISPASS)

Source: Crossref
Added: June 21, 2019

2008 conference paper

Coverage of a microarchitecture-level fault check regimen in a superscalar processor

2008 IEEE International Conference on Dependable Systems and Networks With FTCS and DCC (DSN). Presented at the 2008 IEEE International Conference on Dependable Systems and Networks With FTCS and DCC (DSN).

By: V. Reddy & E. Rotenberg

Event: 2008 IEEE International Conference on Dependable Systems and Networks With FTCS and DCC (DSN)

Source: Crossref
Added: June 21, 2019

2007 conference paper

Inherent Time Redundancy (ITR): Using Program Repetition for Low-Overhead Fault Tolerance

37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'07). Presented at the 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'07).

By: V. Reddy & E. Rotenberg

Event: 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'07)

Source: Crossref
Added: June 21, 2019

2007 conference paper

Transparent control independence (TCI)

Proceedings of the 34th annual international symposium on Computer architecture - ISCA '07. Presented at the the 34th annual international symposium.

By: A. Al-Zawawi, V. Reddy, E. Rotenberg & H. Akkary

Event: the 34th annual international symposium

Source: Crossref
Added: June 21, 2019

2007 journal article

ZettaRAM: A power-scalable DRAM alternative through charge-voltage decoupling

IEEE Transactions on Computers, 56(2), 147–160.

By: R. Venkatesan, A. Al-Zawawi, K. Sivasubramanian & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2006 conference paper

Assertion-Based Microarchitecture Design for Improved Fault Tolerance

2006 International Conference on Computer Design. Presented at the 2006 International Conference on Computer Design.

By: V. Reddy, A. Al-Zawawi & E. Rotenberg

Event: 2006 International Conference on Computer Design

Source: Crossref
Added: June 21, 2019

2006 journal article

FAST: Frequency-Aware Static Timing Analysis

ACM Transactions on Programming Languages and Systems, 5(1), 200–224.

By: K. Seth, A. Anantaraman, F. Mueller & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2006 journal article

Non-uniform program analysis & repeatable execution constraints: Exploiting out-of-order processors in real-time systems

Non-uniform program analysis & repeatable execution constraints: Exploiting out-of-order processors in real-time systems. SIGBED Review, 3(1).

By: A. Anantaraman & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2006 conference paper

Retention-aware placement in DRAM (RAPID): Software methods for quasi-non-volatile DRAM

Proceedings of the 12th IEEE International Symposium on High-Performance Computer Architecture (HPCA-12), 157–167.

By: R. Venkatesan, S. Herr & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2006 patent

Systems, methods and devices for providing variable-latency write operations in memory devices

Washington, DC: U.S. Patent and Trademark Office.

By: E. Rotenberg, R. Venkatesan & A. Al-Zawawi

Source: NC State University Libraries
Added: August 6, 2018

2006 conference paper

The State of ZettaRAM

2006 1st International Conference on Nano-Networks and Workshops. Presented at the 2006 1st International Conference on Nano-Networks and Workshops.

By: E. Rotenberg & R. Venkatesan

Event: 2006 1st International Conference on Nano-Networks and Workshops

Source: Crossref
Added: June 21, 2019

2006 conference paper

Understanding prediction-based partial redundant threading for low-overhead, high- coverage fault tolerance

Proceedings of the 12th international conference on Architectural support for programming languages and operating systems - ASPLOS-XII. Presented at the the 12th international conference.

By: V. Reddy, E. Rotenberg & S. Parthasarathy

Event: the 12th international conference

Source: Crossref
Added: June 21, 2019

2005 chapter

Architecture of embedded microprocessors

In Multiprocessor systems on chips (pp. 81–112).

By: E. Rotenberg & A. Anantaraman

Source: NC State University Libraries
Added: August 6, 2018

2005 conference paper

Tapping ZettaRAM for low-power memory systems

HPCA-11 2005: 11th International Symposium on High Performance Computer Architecture : proceedings : 12-16 February, 2005, San Francisco, California, 83–94.

By: R. Venkatesan, A. AL-Zawawi & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2005 chapter

Trace caches

In Speculative execution in high performance computer architectures.

By: E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2005 patent

Variable-persistence molecular memory devices and methods of operation thereof

Washington, DC: U.S. Patent and Trademark Office.

By: E. Rotenberg & J. Lindsey

Source: NC State University Libraries
Added: August 6, 2018

2005 conference paper

Virtual multiprocessor: An analyzable, high-performance microarchitecture for real-time computing

CASES 2005: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, September 24-27, 2005, San Francisco, California, USA, 213–224.

By: A. El-Haj-Mahmoud, A. Al-Zawawi, A. Anantaraman & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2004 journal article

A simple mechanism for detecting ineffectual instructions in slipstream processors

IEEE Transactions on Computers, 53(4), 399–413.

By: J. Koppanalil & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2004 conference paper

Enforcing safety of real-time schedules on contemporary processors using a virtual simple architecture (VISA)

25th IEEE International Real-Time Systems Symposium: Proceedings: 5-8 December, 2004, Lisbon, Portugal, 114–125.

By: A. Anantaraman, K. Seth, E. Rotenberg & F. Mueller

Source: NC State University Libraries
Added: August 6, 2018

2004 conference paper

Safely exploiting multithreaded processors to tolerate memory latency in real-time systems

CASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, September 22-25, 2004, Washington, DC, USA, 2–13.

By: A. El-Haj-Mahmoud & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2003 journal article

Adaptive mode control: A static-power-efficient cache design

ACM Transactions on Embedded Computing Systems, 2(3), 347–372.

By: H. Zhou, M. Toburen, E. Rotenberg & T. Conte

Source: NC State University Libraries
Added: August 6, 2018

2003 conference paper

FAST: Frequency-Aware Static Timing analysis

RTSS 2003: 24th IEEE International Real-Time Systems Symposium: 3-5 December, 2003, Cancun, Mexico, 40–51.

By: K. Seth, A. Anantaraman, F. Mueller & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2003 conference paper

Slipstream execution mode for CMP-based multiprocessors

HPCA-9 2003: the Ninth International Symposium on High-Performance Computer Architecture: Proceedings : February 8-12, 2003, Anaheim, California, 179–190.

By: K. Ibrahim, G. Byrd & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2003 conference paper

Virtual Simple Architecture (VISA): Exceeding the complexity limit in safe real-time systems

Computers and their applications :|bproceedings of the ISCA 16th International Conference, Seattle, Washington, USA, March 28-30, 2001, 350–361. Cary, NC: ISCA.

By: A. Anantaraman, K. Seth, K. Patil, E. Rotenberg & F. F. Mueller

Source: NC State University Libraries
Added: August 6, 2018

2002 conference paper

A case for dynamic pipeline scaling

Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems|h: 2002, Greenoble, France, October 08-11, 2002, 1–8.

By: J. Koppanalil, P. Ramrakhyani, S. Desai, A. Vaidyanathan & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2002 conference paper

A large, fast instruction window for tolerating cache misses

29th Annual International Symposium on Computer Architecture: Proceedings : 25-29 May, 2002, Anchorage, Alaska, 59–70.

By: A. Lebeck, J. Koppanalil, T. Li, J. Patwardhan & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2001 conference paper

Adaptive mode control: A static-power-efficient cache design

2001 International Conference on Parallel Architectures and Compilation Techniques: Proceedings: 8-12 September, 2001, Barcelona, Catalunya, Spain, 61–70.

By: H. Zhou, M. Toburen, E. Rotenberg & T. Conte

Source: NC State University Libraries
Added: August 6, 2018

2001 chapter

Trace caching and trace processors

In Computer engineering handbook (pp. 8–45). Boca Raton, FL: CRC Press.

By: E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2001 conference paper

Using variable-MHz microprocessors to efficiently handle uncertainty in real-time systems

34th ACM/IEEE International Symposium on Microarchitecture: MICRO 34: Proceedings : December 1-5, 2001: Austin, Texas, USA, 28–39.

By: E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2000 conference paper

A study of slipstream processors

Proceedings: 33rd Annual IEEE/ACM International Symposium on Microarchitecture: Monterey, California, USA, 10-13 December 2000, 269–280.

By: Z. Purser, K. Sundaramoorthy & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2000 journal article

Control independence in trace processors

Journal of Instruction-Level Parallelism, 2, 63–85.

By: E. Rotenberg & J. Smith

Source: NC State University Libraries
Added: August 6, 2018

2000 conference paper

Slipstream processors: Improving both performance and fault tolerance

ASPLOS-IX proceedings: Ninth International Conference on Architectural Support for Programming Languages and Operating Systems, Cambridge, Massachusetts, November 12-15, 2000, 257–268.

By: K. Sundaramoorthy, Z. Purser & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

1999 conference paper

A study of control independence in superscalar processors

Proceedings: Fifth International Symposium on High-Performance Computer Architecture, Orlando, Florida, January 9-13, 1999, 115–124.

By: E. Rotenberg, Q. Jacobson & J. Smith

Source: NC State University Libraries
Added: August 6, 2018

1999 journal article

A trace cache microarchitecture and evaluation

IEEE Transactions on Computers, 48(2), 111–120.

By: E. Rotenberg, S. Bennett & J. Smith

Source: NC State University Libraries
Added: August 6, 2018

1999 conference paper

AR-SMT: A microarchitectural approach to fault tolerance in microprocessors

Digest of papers: Twenty-Ninth Annual International Symposium on Fault-Tolerant Computing: June 15-18, 1999, Madison, Wisconsin, USA, 84–91.

By: E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

1999 conference paper

Control independence in trace processors

Proceedings: 32nd Annual International Symposium on Microarchitecture: Haifa, Israel, November 16-18, 1999, 4–15.

By: E. Rotenberg & J. Smith

Source: NC State University Libraries
Added: August 6, 2018

1997 conference paper

Path-based next trace prediction

Proceedings, Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, December 1-3, 1997, Research Triangle Park, North Carolina, 14–23.

By: Q. Jacobson, E. Rotenberg & J. Smith

Source: NC State University Libraries
Added: August 6, 2018

1997 conference paper

Trace processors

Proceedings, Thirtieth Annual IEEE/ACM International Symposium on Microarchitecture, December 1-3, 1997, Research Triangle Park, North Carolina, 138–148.

By: E. Rotenberg, Q. Jacobson, Y. Sazeides & J. Smith

Source: NC State University Libraries
Added: August 6, 2018

1996 conference paper

Assigning confidence to conditional branch predictions

Proceedings of the 29th annual IEEE/ACM International Symposium on Microarchitecture, MICRO-29: December 2-4, 1996, Paris, France, 142–152.

By: E. Jacobsen, E. Rotenberg & J. Smith

Source: NC State University Libraries
Added: August 6, 2018

1996 conference paper

Trace cache: A low latency approach to high bandwidth instruction fetching

Proceedings of the 29th annual IEEE/ACM International Symposium on Microarchitecture, MICRO-29: December 2-4, 1996, Paris, France, 24–34.

By: E. Rotenberg, S. Bennett & J. Smith

Source: NC State University Libraries
Added: August 6, 2018

conference paper

H3 (heterogeneity in 3D): A logic-on-logic 3D-stacked heterogeneous multi-core processor

Srinivasan, V., Chowdhury, R. B. R., Forbes, E., Widialaksono, R., Zhang, Z. Q., Schabel, J., … Franzon, P. D. 2017 ieee 35th international conference on computer design (iccd), 145–152.

By: V. Srinivasan, R. Chowdhury, E. Forbes, R. Widialaksono, Z. Zhang, J. Schabel, S. Ku, S. Lipa ...

Source: NC State University Libraries
Added: August 6, 2018