@article{franzon_davis_rotenberg_stevens_lipa_nigussie_pan_baker_schabel_dey_et al._2021, title={Design for 3D Stacked Circuits}, ISSN={["2380-9248"]}, DOI={10.1109/IEDM19574.2021.9720553}, journal={2021 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)}, author={Franzon, P. and Davis, W. and Rotenberg, E. and Stevens, J. and Lipa, S. and Nigussie, T. and Pan, H. and Baker, L. and Schabel, J. and Dey, S. and et al.}, year={2021} }
 @article{kumar_chaudhary_bhawalkar_mathur_jain_vastrad_rotenberg_2020, title={Post-Silicon Microarchitecture}, volume={19}, ISSN={["1556-6064"]}, DOI={10.1109/LCA.2020.2978841}, number={1}, journal={IEEE COMPUTER ARCHITECTURE LETTERS}, author={Kumar, Chanchal and Chaudhary, Aayush and Bhawalkar, Shubham and Mathur, Utkarsh and Jain, Saransh and Vastrad, Adith and Rotenberg, Eric}, year={2020}, pages={26–29} }
 @article{srinivasan_chowdhury_rotenberg_2020, title={Slipstream Processors Revisited: Exploiting Branch Sets}, ISSN={["0884-7495"]}, DOI={10.1109/ISCA45697.2020.00020}, journal={2020 ACM/IEEE 47TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA 2020)}, author={Srinivasan, Vinesh and Chowdhury, Rangeen Basu Roy and Rotenberg, Eric}, year={2020}, pages={105–117} }
 @inproceedings{ku_forbes_chowdhury_rotenberg_2017, title={A case for standard-cell based RAMs in highly-ported superscalar processor structures}, DOI={10.1109/isqed.2017.7918305}, booktitle={Proceedings of the eighteenth international symposium on quality electronic design (isqed)}, author={Ku, S. and Forbes, E. and Chowdhury, R. B. R. and Rotenberg, E.}, year={2017}, pages={131–137} }
 @inproceedings{srinivasan_chowdhury_forbes_widialaksono_zhang_schabel_ku_lipa_rotenberg_davis_et al._2017, title={H3 (heterogeneity in 3D): A logic-on-logic 3D-stacked heterogeneous multi-core processor}, DOI={10.1109/ICCD.2017.30}, booktitle={2017 IEEE International Conference on Computer Design (ICCD)}, author={Srinivasan, V. and Chowdhury, R. B. R. and Forbes, E. and Widialaksono, R. and Zhang, Z. Q. and Schabel, J. and Ku, S. and Lipa, S. and Rotenberg, E. and Davis, W. R. and et al.}, year={2017}, pages={145–152} }
 @inproceedings{chowdhury_kannepalli_rotenberg_2016, title={AnyCore-1: A comprehensively adaptive 4-way superscalar processor}, DOI={10.1109/hotchips.2016.7936237}, booktitle={2016 ieee hot chips 28 symposium (hcs)}, author={Chowdhury, R. B. R. and Kannepalli, A. K. and Rotenberg, E.}, year={2016} }
 @inproceedings{chowdhury_kannepalli_ku_rotenberg_2016, title={AnyCore: A synthesizable RTL model for exploring and fabricating adaptive superscalar cores}, DOI={10.1109/ispass.2016.7482096}, booktitle={Ieee international symposium on performance analysis of systems and}, author={Chowdhury, R. B. R. and Kannepalli, A. K. and Ku, S. and Rotenberg, E.}, year={2016}, pages={214–224} }
 @inproceedings{forbes_rotenberg_2016, title={Fast register consolidation and migration for heterogeneous multi-core processors}, DOI={10.1109/iccd.2016.7753254}, booktitle={Proceedings of the 34th ieee international conference on computer design (iccd)}, author={Forbes, E. and Rotenberg, E.}, year={2016}, pages={1–8} }
 @inproceedings{widialaksono_basu roy chowdhury_zhang_schabel_lipa_rotenberg_rhett davis_franzon_2016, title={Physical design of a 3D-stacked heterogeneous multi-core processor}, ISBN={9781509013999}, url={http://dx.doi.org/10.1109/3dic.2016.7970036}, DOI={10.1109/3dic.2016.7970036}, booktitle={2016 IEEE International 3D Systems Integration Conference (3DIC)}, publisher={IEEE}, author={Widialaksono, Randy and Basu Roy Chowdhury, Rangeen and Zhang, Zhenqian and Schabel, Joshua and Lipa, Steve and Rotenberg, Eric and Rhett Davis, W. and Franzon, Paul}, year={2016}, month={Nov} }
 @article{sheikh_tuck_rotenberg_2015, title={Control-Flow Decoupling: An Approach for Timely, Non-Speculative Branching}, volume={64}, ISSN={["1557-9956"]}, DOI={10.1109/tc.2014.2361526}, number={8}, journal={IEEE TRANSACTIONS ON COMPUTERS}, author={Sheikh, Rami and Tuck, James and Rotenberg, Eric}, year={2015}, month={Aug}, pages={2182–2203} }
 @inproceedings{nakabayashi_sugiyama_sasaki_rotenberg_kondo_2014, title={Co-simulation framework for streamlining microprocessor development on standard ASIC design flow}, DOI={10.1109/aspdac.2014.6742924}, booktitle={2014 19th asia and south pacific design automation conference (asp-dac)}, author={Nakabayashi, T. and Sugiyama, T. and Sasaki, T. and Rotenberg, E. and Kondo, T.}, year={2014}, pages={400–405} }
 @inproceedings{forbes_choudhary_dwiel_rotenberg_2014, title={Design-effort alloy: Boosting a highly tuned primary core with untuned alternate cores}, ISBN={9781479964925}, url={http://dx.doi.org/10.1109/iccd.2014.6974713}, DOI={10.1109/iccd.2014.6974713}, booktitle={2014 IEEE 32nd International Conference on Computer Design (ICCD)}, publisher={IEEE}, author={Forbes, Elliott and Choudhary, Niket K. and Dwiel, Brandon H. and Rotenberg, Eric}, year={2014}, month={Oct} }
 @inproceedings{navada_choudhary_wadhavkar_rotenberg_2013, title={A Unified View of Non-monotonic Core Selection and Application Steering in Heterogeneous Chip Multiprocessors}, booktitle={Proceedings of the 22nd IEEE/ACM International Conference on Parallel Architectures and Compilation Techniques (PACT-22)}, author={Navada, S. and Choudhary, N.K. and Wadhavkar, S.V. and Rotenberg, E.}, year={2013}, month={Sep}, pages={133–144} }
 @inproceedings{tshibangu_franzon_rotenberg_davis_2013, title={Design of controller for L2 cache mapped in Tezzaron stacked DRAM}, DOI={10.1109/3dic.2013.6702397}, booktitle={2013 IEEE International 3D Systems Integration Conference (3DIC)}, author={Tshibangu, N. M. and Franzon, P. D. and Rotenberg, E. and Davis, W. R.}, year={2013}, month={Oct} }
 @inproceedings{priyadarshi_choudhary_dwiel_upreti_rotenberg_davis_franzon_2013, title={Hetero(2) 3d integration: A scheme for optimizing efficiency/cost of chip multiprocessors}, DOI={10.1109/isqed.2013.6523582}, booktitle={Proceedings of the fourteenth international symposium on quality electronic design (ISQED 2013)}, author={Priyadarshi, S. and Choudhary, N. and Dwiel, B. and Upreti, A. and Rotenberg, E. and Davis, R. and Franzon, P.}, year={2013}, pages={1–7} }
 @inproceedings{rotenberg_dwiel_forbes_zhang_widialaksono_chowdhury_tshibangu_lipa_davis_franzon_et al._2013, title={Rationale for a 3D heterogeneous multi-core processor}, ISBN={9781479929870}, url={http://dx.doi.org/10.1109/iccd.2013.6657038}, DOI={10.1109/iccd.2013.6657038}, booktitle={2013 IEEE 31st International Conference on Computer Design (ICCD)}, publisher={IEEE}, author={Rotenberg, Eric and Dwiel, Brandon H. and Forbes, Elliott and Zhang, Zhenqian and Widialaksono, Randy and Chowdhury, Rangeen Basu Roy and Tshibangu, Nyunyi and Lipa, Steve and Davis, W. Rhett and Franzon, Paul and et al.}, year={2013}, month={Oct}, pages={154–168} }
 @inproceedings{choudhary_dwiel_rotenberg_2012, title={A physical design study of fabscalar-generated superscalar cores}, ISBN={9781467326582}, url={http://dx.doi.org/10.1109/vlsi-soc.2012.7332095}, DOI={10.1109/vlsi-soc.2012.7332095}, booktitle={2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC)}, publisher={IEEE}, author={Choudhary, Niket K. and Dwiel, Brandon H. and Rotenberg, Eric}, year={2012}, month={Oct} }
 @article{sheikh_tuck_rotenberg_2012, title={Control-Flow Decoupling}, ISBN={["978-1-4673-4819-5"]}, ISSN={["1072-4451"]}, DOI={10.1109/micro.2012.38}, journal={2012 IEEE/ACM 45TH INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE (MICRO-45)}, author={Sheikh, Rami and Tuck, James and Rotenberg, Eric}, year={2012}, pages={329–340} }
 @article{choudhary_wadhavkar_shah_mayukh_gandhi_dwiel_navada_najaf-abadi_rotenberg_2012, title={FABSCALAR: AUTOMATING SUPERSCALAR CORE DESIGN}, volume={32}, ISSN={["1937-4143"]}, DOI={10.1109/mm.2012.23}, number={3}, journal={IEEE MICRO}, author={Choudhary, Niket K. and Wadhavkar, Salil V. and Shah, Tanmay A. and Mayukh, Hiran and Gandhi, Jayneel and Dwiel, Brandon H. and Navada, Sandeep and Najaf-Abadi, Hashem H. and Rotenberg, Eric}, year={2012}, pages={48–59} }
 @inproceedings{dwiel_choudhary_rotenberg_2012, title={FPGA modeling of diverse superscalar processors}, ISBN={9781467311465 9781467311434 9781467311458}, url={http://dx.doi.org/10.1109/ispass.2012.6189225}, DOI={10.1109/ispass.2012.6189225}, booktitle={2012 IEEE International Symposium on Performance Analysis of Systems & Software}, publisher={IEEE}, author={Dwiel, Brandon H. and Choudhary, Niket K. and Rotenberg, Eric}, year={2012}, month={Apr} }
 @inproceedings{nakabayashi_sasaki_rotenberg_ohno_kondo_2012, title={Research for Transporting Alpha ISA and Adopting Multi-processor to FabScalar}, booktitle={Proceedings of the Symposium on Advanced Computing Systems and Infrastructures 2012 (SACSIS 2012)}, author={Nakabayashi, T. and Sasaki, T. and Rotenberg, E. and Ohno, K. and Kondo, T.}, year={2012}, month={May}, pages={374–381} }
 @article{choudhary_wadhavkar_shah_mayukh_gandhi_dwiel_navada_najaf-abadi_rotenberg_2011, title={FabScalar: Composing synthesizable RTL designs of arbitrary cores within a canonical superscalar template}, DOI={10.1145/2000064.2000067}, journal={ISCA 2011: Proceedings of the 38th annual international symposium on computer architecture}, author={Choudhary, N. K. and Wadhavkar, S. V. and Shah, T. A. and Mayukh, H. and Gandhi, J. and Dwiel, B. H. and Navada, S. and Najaf-abadi, H. H. and Rotenberg, E.}, year={2011}, pages={11–22} }
 @article{navada_choudhary_rotenberg_2010, title={Criticality-driven Superscalar Design Space Exploration}, ISBN={["978-1-4503-0178-7"]}, DOI={10.1145/1854273.1854308}, journal={PACT 2010: PROCEEDINGS OF THE NINETEENTH INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES}, author={Navada, Sandeep and Choudhary, Niket K. and Rotenberg, Eric}, year={2010}, pages={261–272} }
 @inproceedings{al-otoom_forbes_rotenberg_2010, title={EXACT: Explicit Dynamic-Branch Prediction with Active Updates}, ISBN={9781450300445}, url={http://dx.doi.org/10.1145/1787275.1787321}, DOI={10.1145/1787275.1787321}, booktitle={Proceedings of the 7th ACM international conference on Computing frontiers - CF '10}, publisher={ACM Press}, author={Al-Otoom, Muawya and Forbes, Elliott and Rotenberg, Eric}, year={2010}, pages={165–176} }
 @inproceedings{najaf-abadi_rotenberg_2009, title={Architectural Contesting}, ISBN={9781424429325}, url={http://dx.doi.org/10.1109/hpca.2009.4798254}, DOI={10.1109/hpca.2009.4798254}, booktitle={2009 IEEE 15th International Symposium on High Performance Computer Architecture}, publisher={IEEE}, author={Najaf-abadi, Hashem H. and Rotenberg, Eric}, year={2009}, month={Feb} }
 @article{najaf-abadi_choudhary_rotenberg_2009, title={Core-Selectability in Chip Multiprocessors}, ISBN={["978-0-7695-3771-9"]}, ISSN={["1089-795X"]}, DOI={10.1109/pact.2009.44}, journal={18TH INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES, PROCEEDINGS}, author={Najaf-abadi, Hashem H. and Choudhary, Niket K. and Rotenberg, Eric}, year={2009}, pages={113–122} }
 @article{najaf-abadi_rotenberg_2009, title={The Importance of Accurate Task Arrival Characterization in the Design of Processing Cores}, ISBN={["978-1-4244-5156-2"]}, DOI={10.1109/iiswc.2009.5306795}, journal={PROCEEDINGS OF THE 2009 IEEE INTERNATIONAL SYMPOSIUM ON WORKLOAD CHARACTERIZATION}, author={Najaf-abadi, Hashem H. and Rotenberg, Eric}, year={2009}, pages={75–85} }
 @inproceedings{najaf-abadi_rotenberg_2008, title={Configurational Workload Characterization}, ISBN={9781424422326 9781424422333}, url={http://dx.doi.org/10.1109/ispass.2008.4510747}, DOI={10.1109/ispass.2008.4510747}, booktitle={ISPASS 2008 - IEEE International Symposium on Performance Analysis of Systems and software}, publisher={IEEE}, author={Najaf-abadi, Hashem H. and Rotenberg, Eric}, year={2008}, month={Apr} }
 @inproceedings{reddy_rotenberg_2008, title={Coverage of a microarchitecture-level fault check regimen in a superscalar processor}, ISBN={9781424423972}, url={http://dx.doi.org/10.1109/dsn.2008.4630065}, DOI={10.1109/dsn.2008.4630065}, booktitle={2008 IEEE International Conference on Dependable Systems and Networks With FTCS and DCC (DSN)}, publisher={IEEE}, author={Reddy, Vimal and Rotenberg, Eric}, year={2008} }
 @inproceedings{reddy_rotenberg_2007, title={Inherent Time Redundancy (ITR): Using Program Repetition for Low-Overhead Fault Tolerance}, ISBN={0769528554}, url={http://dx.doi.org/10.1109/dsn.2007.59}, DOI={10.1109/dsn.2007.59}, booktitle={37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'07)}, publisher={IEEE}, author={Reddy, Vimal and Rotenberg, Eric}, year={2007}, month={Jun} }
 @inproceedings{al-zawawi_reddy_rotenberg_akkary_2007, title={Transparent control independence (TCI)}, ISBN={9781595937063}, url={http://dx.doi.org/10.1145/1250662.1250717}, DOI={10.1145/1250662.1250717}, booktitle={Proceedings of the 34th annual international symposium on Computer architecture  - ISCA '07}, publisher={ACM Press}, author={Al-Zawawi, Ahmed S. and Reddy, Vimal K. and Rotenberg, Eric and Akkary, Haitham H.}, year={2007} }
 @article{venkatesan_al-zawawi_sivasubramanian_rotenberg_2007, title={ZettaRAM: A power-scalable DRAM alternative through charge-voltage decoupling}, volume={56}, ISSN={["1557-9956"]}, DOI={10.1109/TC.2007.37}, number={2}, journal={IEEE TRANSACTIONS ON COMPUTERS}, author={Venkatesan, Ravi K. and Al-Zawawi, Ahmed S. and Sivasubramanian, Krishnan and Rotenberg, Eric}, year={2007}, month={Feb}, pages={147–160} }
 @inproceedings{reddy_al-zawawi_rotenberg_2006, title={Assertion-Based Microarchitecture Design for Improved Fault Tolerance}, ISBN={9780780397064 9780780397071}, ISSN={1063-6404}, url={http://dx.doi.org/10.1109/iccd.2006.4380842}, DOI={10.1109/iccd.2006.4380842}, booktitle={2006 International Conference on Computer Design}, publisher={IEEE}, author={Reddy, Vimal K. and Al-Zawawi, Ahmed S. and Rotenberg, Eric}, year={2006}, month={Oct} }
 @article{seth_anantaraman_mueller_rotenberg_2006, title={FAST: Frequency-Aware Static Timing Analysis}, volume={5}, number={1}, journal={ACM Transactions on Programming Languages and Systems}, author={Seth, K. and Anantaraman, A. and Mueller, F. and Rotenberg, E.}, year={2006}, pages={200–224} }
 @article{anantaraman_rotenberg_2006, title={Non-uniform program analysis & repeatable execution constraints: Exploiting out-of-order processors in real-time systems}, volume={3}, DOI={10.1145/1279711.1279716}, number={1}, journal={SIGBED Review}, author={Anantaraman, A. and Rotenberg, E.}, year={2006} }
 @article{venkatesan_herr_rotenberg_2006, title={Retention-aware placement in DRAM (RAPID): Software methods for quasi-non-volatile DRAM}, ISBN={["0-7803-9368-6"]}, ISSN={["1530-0897"]}, DOI={10.1109/hpca.2006.1598122}, journal={TWELFTH INTERNATIONAL SYMPOSIUM ON HIGH-PERFORMANCE COMPUTER ARCHITECTURE, PROCEEDINGS}, author={Venkatesan, Ravi K. and Herr, Stephen and Rotenberg, Eric}, year={2006}, pages={157-+} }
 @misc{rotenberg_venkatesan_al-zawawi_2006, title={Systems, methods and devices for providing variable-latency write operations in memory devices}, volume={7,099,215}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Rotenberg, E. and Venkatesan, R. K. and Al-Zawawi, A. S.}, year={2006} }
 @inproceedings{rotenberg_venkatesan_2006, title={The State of ZettaRAM}, ISBN={1424403901 142440391X}, url={http://dx.doi.org/10.1109/nanonet.2006.346220}, DOI={10.1109/nanonet.2006.346220}, booktitle={2006 1st International Conference on Nano-Networks and Workshops}, publisher={IEEE}, author={Rotenberg, Eric and Venkatesan, Ravi K.}, year={2006}, month={Sep} }
 @inproceedings{reddy_rotenberg_parthasarathy_2006, title={Understanding prediction-based partial redundant threading for low-overhead, high- coverage fault tolerance}, ISBN={1595934510}, url={http://dx.doi.org/10.1145/1168857.1168869}, DOI={10.1145/1168857.1168869}, booktitle={Proceedings of the 12th international conference on Architectural support for programming languages and operating systems  - ASPLOS-XII}, publisher={ACM Press}, author={Reddy, Vimal K. and Rotenberg, Eric and Parthasarathy, Sailashri}, year={2006} }
 @inbook{rotenberg_anantaraman_2005, title={Architecture of embedded microprocessors}, ISBN={012385251X}, DOI={10.1016/b978-012385251-9/50018-9}, booktitle={Multiprocessor systems on chips}, publisher={San Francisco, CA: Morgan Kaufmann; Oxford: Elsevier Science}, author={Rotenberg, E. and Anantaraman, A.}, editor={Wolf, W. and Jerraya, A.Editors}, year={2005}, pages={81–112} }
 @article{venkatesan_al-zawawi_rotenberg_2005, title={Tapping ZettaRAM (TM) for low-power memory systems}, ISBN={["0-7695-2275-0"]}, ISSN={["1530-0897"]}, DOI={10.1109/hpca.2005.35}, journal={11TH INTERNATIONAL SYMPOSIUM ON HIGH-PERFORMANCE COMPUTER ARCHITECTURE, PROCEEDINGS}, author={Venkatesan, RK and Al-Zawawi, AS and Rotenberg, E}, year={2005}, pages={83–94} }
 @inbook{rotenberg_2005, title={Trace caches}, ISBN={1584884479}, DOI={10.1201/9781420035155.ch4}, booktitle={Speculative execution in high performance computer architectures}, publisher={Boca Raton, FL: Chapman & Hall/CRC}, author={Rotenberg, E.}, editor={Kaeli, D. and Yew, P.-C.Editors}, year={2005} }
 @misc{rotenberg_lindsey_2005, title={Variable-persistence molecular memory devices and methods of operation thereof}, volume={6,944,047}, publisher={Washington, DC: U.S. Patent and Trademark Office}, author={Rotenberg, E. and Lindsey, J. S.}, year={2005} }
 @inproceedings{el-haj-mahmoud_al-zawawi_anantaraman_rotenberg_2005, title={Virtual multiprocessor: An analyzable, high-performance microarchitecture for real-time computing}, ISBN={159593149X}, DOI={10.1145/1086297.1086326}, booktitle={CASES 2005: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, September 24-27, 2005, San Francisco, California, USA}, publisher={New York: ACM Press}, author={El-Haj-Mahmoud, A. and Al-Zawawi, A. S. and Anantaraman, A. and Rotenberg, E.}, year={2005}, pages={213–224} }
 @article{koppanalil_rotenberg_2004, title={A simple mechanism for detecting ineffectual instructions in slipstream processors}, volume={53}, ISSN={["1557-9956"]}, DOI={10.1109/TC.2004.1268397}, number={4}, journal={IEEE TRANSACTIONS ON COMPUTERS}, author={Koppanalil, JJ and Rotenberg, E}, year={2004}, month={Apr}, pages={399–413} }
 @article{anantaraman_seth_rotenberg_mueller_2004, title={Enforcing safety of real-time schedules on contemporary processors using a virtual simple architecture (VISA)}, ISBN={["0-7695-2247-5"]}, ISSN={["1052-8725"]}, DOI={10.1109/real.2004.19}, journal={25TH IEEE INTERNATIONAL REAL-TIME SYSTEMS SYMPOSIUM, PROCEEDINGS}, author={Anantaraman, A and Seth, K and Rotenberg, E and Mueller, F}, year={2004}, pages={114–125} }
 @inproceedings{el-haj-mahmoud_rotenberg_2004, title={Safely exploiting multithreaded processors to tolerate memory latency in real-time systems}, ISBN={1581138903}, DOI={10.1145/1023833.1023837}, booktitle={CASES 2004: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, September 22-25,  2004, Washington, DC, USA}, publisher={New York: ACM Press}, author={El-Haj-Mahmoud, A. and Rotenberg, E.}, year={2004}, pages={2–13} }
 @article{huiyang_toburen_rotenberg_conte_2003, title={Adaptive mode control: A static-power-efficient cache design}, volume={2}, DOI={10.1145/860176.860181}, number={3}, journal={ACM Transactions on Embedded Computing Systems}, author={Huiyang and Toburen, M. C. and Rotenberg, E. and Conte, T. M.}, year={2003}, pages={347–372} }
 @article{seth_anantaraman_mueller_rotenberg_2003, title={FAST: Frequency-aware static timing analysis}, ISBN={["0-7695-2044-8"]}, DOI={10.1109/real.2003.1253252}, journal={RTSS 2003: 24TH IEEE INTERNATIONAL REAL-TIME SYSTEMS SYMPOSIUM, PROCEEDINGS}, author={Seth, K and Anantaraman, A and Mueller, F and Rotenberg, E}, year={2003}, pages={40–51} }
 @article{ibrahim_byrd_rotenberg_2003, title={Slipstream execution mode for CMP-based multiprocessors}, volume={12}, ISBN={["0-7695-1871-0"]}, url={http://www.scopus.com/inward/record.url?eid=2-s2.0-84955465003&partnerID=MN8TOARS}, DOI={10.1109/hpca.2003.1183536}, journal={NINTH INTERNATIONAL SYMPOSIUM ON HIGH-PERFORMANCE COMPUTER ARCHITECTURE, PROCEEDINGS}, publisher={IEEE Comput. Soc}, author={Ibrahim, KZ and Byrd, GT and Rotenberg, E}, year={2003}, pages={179–190} }
 @inproceedings{anantaraman_seth_patil_rotenberg_f. mueller_2003, title={Virtual Simple Architecture (VISA): Exceeding the complexity limit in safe real-time systems}, ISBN={1880843374}, booktitle={Computers and their applications :|bproceedings of the ISCA 16th International Conference, Seattle, Washington, USA, March 28-30, 2001}, publisher={Cary, NC: ISCA}, author={Anantaraman, A. and Seth, K. and Patil, K. and Rotenberg, E. and F. Mueller, F.}, year={2003}, pages={350–361} }
 @inproceedings{koppanalil_ramrakhyani_desai_vaidyanathan_rotenberg_2002, title={A case for dynamic pipeline scaling}, ISBN={1581137265}, DOI={10.1145/581630.581632}, booktitle={Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems|h: 2002, Greenoble, France, October 08-11, 2002}, publisher={New York: ACM Press}, author={Koppanalil, J. and Ramrakhyani, P. and Desai, S. and Vaidyanathan, A. and Rotenberg, E.}, year={2002}, pages={1–8} }
 @inproceedings{lebeck_koppanalil_li_patwardhan_rotenberg_2002, title={A large, fast instruction window for tolerating cache misses}, ISBN={076951605X}, DOI={10.1109/isca.2002.1003562}, booktitle={29th Annual International Symposium on Computer Architecture: Proceedings : 25-29 May, 2002, Anchorage, Alaska}, publisher={Los Alamitos, CA: IEEE Computer Society}, author={Lebeck, A. R. and Koppanalil, J. J. and Li, T. and Patwardhan, J. and Rotenberg, E.}, year={2002}, pages={59–70} }
 @inproceedings{huiyang_toburen_rotenberg_conte_2001, title={Adaptive mode control: A static-power-efficient cache design}, ISBN={0769513638}, DOI={10.1109/pact.2001.953288}, booktitle={2001 International Conference on Parallel Architectures and Compilation Techniques: Proceedings: 8-12 September, 2001, Barcelona, Catalunya, Spain}, publisher={Los Alamitos, CA: IEEE Computer Society}, author={Huiyang and Toburen, M. C. and Rotenberg, E. and Conte, T. M.}, year={2001}, pages={61–70} }
 @inbook{rotenberg_2001, title={Trace caching and trace processors}, ISBN={0849308852}, booktitle={Computer engineering handbook}, publisher={Boca Raton, FL: CRC Press}, author={Rotenberg, E.}, year={2001}, pages={8–45} }
 @article{rotenberg_2001, title={Using variable-MHz microprocessors to efficiently handle uncertainty in real-time systems}, ISBN={["0-7695-1369-7"]}, ISSN={["1072-4451"]}, DOI={10.1109/micro.2001.991103}, journal={34TH ACM/IEEE INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE, MICRO-34, PROCEEDINGS}, author={Rotenberg, E}, year={2001}, pages={28–39} }
 @inproceedings{purser_sundaramoorthy_rotenberg_2000, title={A study of slipstream processors}, ISBN={076950924X}, DOI={10.1145/360128.360155}, booktitle={Proceedings: 33rd Annual IEEE/ACM International Symposium on Microarchitecture: Monterey, California, USA, 10-13 December 2000}, publisher={Los Alamitos, CA: IEEE Computer Society}, author={Purser, Z. and Sundaramoorthy, K. and Rotenberg, E.}, year={2000}, pages={269–280} }
 @article{rotenberg_smith_2000, title={Control independence in trace processors}, volume={2}, journal={Journal of Instruction-level Parallelism}, author={Rotenberg, E. and Smith, J. E.}, year={2000}, pages={63–85} }
 @inproceedings{sundaramoorthy_purser_rotenberg_2000, title={Slipstream processors: Improving both performance and fault tolerance}, ISBN={1581133170}, DOI={10.1145/378993.379247}, booktitle={ASPLOS-IX proceedings: Ninth International Conference on Architectural Support for Programming Languages and Operating Systems, Cambridge, Massachusetts, November 12-15, 2000}, publisher={New York: ACM Press}, author={Sundaramoorthy, K. and Purser, Z. and Rotenberg, E.}, year={2000}, pages={257–268} }
 @article{rotenberg_jacobson_smith_1999, title={A study of control independence in superscalar processors}, ISBN={["0-7695-0004-8"]}, DOI={10.1109/hpca.1999.744346}, journal={FIFTH INTERNATIONAL SYMPOSIUM ON HIGH-PERFORMANCE COMPUTER ARCHITECTURE, PROCEEDINGS}, author={Rotenberg, E and Jacobson, Q and Smith, J}, year={1999}, pages={115–124} }
 @article{rotenberg_bennett_smith_1999, title={A trace cache microarchitecture and evaluation}, volume={48}, ISSN={["1557-9956"]}, DOI={10.1109/12.752652}, number={2}, journal={IEEE TRANSACTIONS ON COMPUTERS}, author={Rotenberg, E and Bennett, S and Smith, JE}, year={1999}, month={Feb}, pages={111–120} }
 @inproceedings{rotenberg_1999, title={AR-SMT: A microarchitectural approach to fault tolerance in microprocessors}, ISBN={0780357639}, DOI={10.1109/ftcs.1999.781037}, booktitle={Digest of papers: Twenty-Ninth Annual International Symposium on Fault-Tolerant Computing: June 15-18, 1999, Madison, Wisconsin, USA}, publisher={Los Alamitos, CA: IEEE Computer Society}, author={Rotenberg, E.}, year={1999}, pages={84–91} }
 @article{rotenberg_smith_1999, title={Control independence in trace processors}, ISBN={["0-7695-0437-X"]}, ISSN={["1072-4451"]}, DOI={10.1109/micro.1999.809438}, journal={32ND ANNUAL INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE, (MICRO-32), PROCEEDINGS}, author={Rotenberg, E and Smith, J}, year={1999}, pages={4–15} }
 @article{jacobson_rotenberg_smith_1997, title={Path-based next trace prediction}, ISBN={["0-8186-7977-8"]}, ISSN={["1072-4451"]}, DOI={10.1109/micro.1997.645793}, journal={THIRTIETH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE, PROCEEDINGS}, author={Jacobson, Q and Rotenberg, E and Smith, JE}, year={1997}, pages={14–23} }
 @article{rotenberg_jacobson_sazeides_smith_1997, title={Trace processors}, ISBN={["0-8186-7977-8"]}, ISSN={["1072-4451"]}, DOI={10.1109/micro.1997.645805}, journal={THIRTIETH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE, PROCEEDINGS}, author={Rotenberg, E and Jacobson, Q and Sazeides, Y and Smith, J}, year={1997}, pages={138–148} }
 @article{jacobsen_rotenberg_smith_1996, title={Assigning confidence to conditional branch predictions}, ISBN={["0-8186-7641-8"]}, DOI={10.1109/micro.1996.566457}, journal={PROCEEDINGS OF THE 29TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE - MICRO-29}, author={Jacobsen, E and Rotenberg, E and Smith, JE}, year={1996}, pages={142–152} }
 @article{rotenberg_bennett_smith_1996, title={Trace cache: A low latency approach to high bandwidth instruction fetching}, ISBN={["0-8186-7641-8"]}, DOI={10.1109/micro.1996.566447}, journal={PROCEEDINGS OF THE 29TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE - MICRO-29}, author={Rotenberg, E and Bennett, S and Smith, JE}, year={1996}, pages={24–34} }