John R. Hauser

Effect of GaAs interfacial layer on the performance of high bandgap tunnel junctions for multijunction solar cells

APPLIED PHYSICS LETTERS, 103(10).

Modeling an InGaP/AlGaAs tunnel junction containing an AlAs diffusion barrier

2013 ieee 39th photovoltaic specialists conference (pvsc), 2082–2085.

Modeling of tunnel junctions for high efficiency solar cells

APPLIED PHYSICS LETTERS, 97(4).

A new and improved physics-based model for MOS transistors

IEEE TRANSACTIONS ON ELECTRON DEVICES, 52(12), 2640–2647.

Intrinsic mobility evaluation of high-kappa gate dielectric transistors using pulsed I-d-V-g

IEEE ELECTRON DEVICE LETTERS, 26(8), 586–589.

Substrate voltage and accumulation-mode MOS varactor capacitance

IEEE Transactions on Electron Devices, 52(7), 1563–1567.

Enhancing the durability of linen-like properties of low temperature mercerized cotton

Textile Research Journal, 74(2), 146–154.

The epHEMT gate at microwave frequencies

IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 51(6), 1718–1723.

Vertically scaled MOSFET gate stacks and junctions: How far are we likely to go?

IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 46(2-3), 299–315.

Study of low-frequency charge pumping on thin stacked dielectrics

IEEE TRANSACTIONS ON ELECTRON DEVICES, 48(12), 2754–2762.

Time-dependent Si etch behavior and its effect on oxide/Si selectivity in CF4+D-2 electron cyclotron resonance plasma etching

JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 19(3), 695–700.

A two-dimensional numerical simulation of pulsed drain current transients in weak inversion and application to interface trap characterization on small geometry MOSFETs with ultrathin oxides

IEEE TRANSACTIONS ON ELECTRON DEVICES, 47(11), 2236–2237.

Analytic model of parasitic capacitance attenuation in CMOS devices with hyper-thin oxides

ELECTRONICS LETTERS, 36(20), 1699–1700.

Comparative physical and electrical metrology of ultrathin oxides in the 6 to 1.5 nm regime

IEEE TRANSACTIONS ON ELECTRON DEVICES, 47(7), 1349–1354.

Effect of polysilicon gate type on the flatband voltage shift for ultrathin oxide-nitride gate stacks

IEEE ELECTRON DEVICE LETTERS, 21(4), 170–172.

Estimation of the effects of remote charge scattering on electron mobility of n-MOSFET's with ultrathin gate oxides

IEEE TRANSACTIONS ON ELECTRON DEVICES, 47(2), 440–447.

Limitations of the modified shift-and-ratio technique for extraction of the bias dependence of L-eff and R-sd of LDD MOSFET's

IEEE TRANSACTIONS ON ELECTRON DEVICES, 47(4), 891–895.

Overview of semiconductor devices

In Y. Nishi & R. Doering (Eds.), Handbook of semiconductor manufacturing technology. New York: Marcel Dekker.

Surface residue island nucleation in anhydrous HF/alcohol vapor processing of Si surfaces

JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 147(9), 3512–3518.

Estimating oxide thickness of tunnel oxides down to 1.4 nm using conventional capacitance-voltage measurements on MOS capacitors

IEEE ELECTRON DEVICE LETTERS, 20(4), 179–181.

Gate quality ultrathin (2.5 nm) PECVD deposited oxynitride and nitrided oxide dielectrics

IEEE ELECTRON DEVICE LETTERS, 20(9), 442–444.

Impact of tunnel currents and channel resistance on the characterization of channel inversion layer charge and polysilicon-gate depletion of sub-20-angstrom gate oxide MOSFET's

IEEE TRANSACTIONS ON ELECTRON DEVICES, 46(8), 1650–1655.

Interfacial properties of ultrathin pure silicon nitride formed by remote plasma enhanced chemical vapor deposition

Journal of Vacuum Science & Technology. B, Microelectronics and Nanometer Structures, 17(4), 1836–1839.

Modeling study of ultrathin gate oxides using direct tunneling current and capacitance-voltage measurements in MOS devices

IEEE TRANSACTIONS ON ELECTRON DEVICES, 46(7), 1464–1471.

Modeling the trends in valence-band electron tunneling in NMOSFETs with ultrathin SiO2 and SiO2/Ta2O5 dielectrics with oxide scaling

Shanware, A., Massoud, H. Z., Vogel, E., Henson, K., Hauser, JR, & Wortman, J. J. (1999, September). MICROELECTRONIC ENGINEERING, Vol. 48, pp. 295–298.

The effects of Ge content in poly-Si1-xGex gate material on the tunneling barrier in PMOS devices

Shanware, A., Massoud, H. Z., Acker, A., Li, V. Z. Q., Mirabedini, M. R., Henson, K., … Wortman, J. J. (1999, September). MICROELECTRONIC ENGINEERING, Vol. 48, pp. 39–42.

Evaluation of 2.0 nm grown and deposited dielectrics in 0.1 mu m PMOSFETs

RAPID THERMAL AND INTEGRATED PROCESSING VII, Vol. 525, pp. 163–170.

Modeled tunnel currents for high dielectric constant dielectrics

IEEE TRANSACTIONS ON ELECTRON DEVICES, 45(6), 1350–1355.

Optimization of nitrided gate dielectrics by plasma-assisted and rapid thermal processing

JOURNAL OF VACUUM SCIENCE & TECHNOLOGY A, Vol. 16, pp. 1721–1729.

Ultrathin oxide-nitride gate dielectric MOSFET's

IEEE ELECTRON DEVICE LETTERS, 19(4), 106–108.

Bias sweep rate effects on quasi-static capacitance of MOS capacitors

IEEE TRANSACTIONS ON ELECTRON DEVICES, 44(6), 1009–1012.

Effects of profile doped elevated source/drain structures on deep-submicron MOSFETs

Solid-State Electronics, 38(3), 573–579.

Three-zone rapid thermal processing system utilizing wafer edge heating means

Washington, DC: U.S. Patent and Trademark Office.

An evaluation of super-steep-retrograde channel doping for deep-submicron MOSFET applications

IEEE Transactions on Electron Devices, 41(10), 1880–1882.

CENTER FOR ADVANCED ELECTRONIC MATERIALS PROCESSING

PROCEEDINGS OF THE IEEE, 81(1), 42–59.

Conical rapid thermal processing apparatus

Washington, DC: U.S. Patent and Trademark Office.

Design and marketing of new products

Englewood Cliffs, NJ: Prentice Hall.

Essentials of new product management

Englewood Cliffs, NJ: Prentice-Hall.

ELECTRON AND HOLE MOBILITIES IN SILICON AS A FUNCTION OF CONCENTRATION AND TEMPERATURE

IEEE TRANSACTIONS ON ELECTRON DEVICES, 29(2), 292–295.

Design and marketing of new products

Englewood Cliffs, NJ: Prentice-Hall.

VELOCITY-FIELD CHARACTERISTICS OF GAAS WITH GAMMA-6(C)-L6(C)-X6(C) CONDUCTION-BAND ORDERING

JOURNAL OF APPLIED PHYSICS, 48(11), 4587–4590.