John R. Hauser

Effect of GaAs interfacial layer on the performance of high bandgap tunnel junctions for multijunction solar cells

Samberg, J. P., Carlin, C. Z., Bradshaw, G. K., Colter, P. C., Harmon, J. L., Allen, J. B., … Bedair, S. M. (2013, September 2). Applied Physics Letters.

Modeling an InGaP/AlGaAs tunnel junction containing an AlAs diffusion barrier

Hauser, J., Carlin, Z., Harmon, J., Bradshaw, G., Samberg, J., Colter, P., & Bedair, S. (2013, June 1).

Modeling of tunnel junctions for high efficiency solar cells

Hauser, J. R., Carlin, Z., & Bedair, S. M. (2010, July 26). Applied Physics Letters.

A New and Improved Physics-Based Model for MOS Transistors

Hauser, J. R. (2005, December 1). IEEE Transactions on Electron Devices.

Intrinsic mobility evaluation of high-/spl kappa/ gate dielectric transistors using pulsed I/sub d/-V/sub g/

Young, C. D., Zeitzoff, P., Brown, G. A., Bersuker, G., Lee, N. B. H., & Hauser, J. R. (2005, July 19). IEEE Electron Device Letters.

Substrate Voltage and Accumulation-Mode MOS Varactor Capacitance

Wartenberg, S. A., & Hauser, J. R. (2005, June 28). IEEE Transactions on Electron Devices.

Enhancing the Durability of Linen-Like Properties of Low Temperature Mercerized Cotton

Lee, N. M. H., Park, N. H. S., Yoon, N. K. J., & Hauser, P. J. (2004, February 1). Textile Research Journal.

The epHEMT gate at microwave frequencies

Wartenberg, S. A., & Hauser, J. R. (2003, June 1). IEEE Transactions on Microwave Theory and Techniques.

Vertically scaled MOSFET gate stacks and junctions: How far are we likely to go?

Osburn, C. M., Kim, I., Han, S. K., De, I., Yee, K. F., Gannavaram, S., … Ozturk, M. C. (2002, March 1). IBM Journal of Research and Development.

Study of low-frequency charge pumping on thin stacked dielectrics

Weintraub, C. E., Vogel, E., Hauser, J. R., Yang, N., Misra, V., Wortman, J. J., … Masson, P. (2001, January 1). IEEE Transactions on Electron Devices, Vol. 48, pp. 2754–2762.

Time-dependent Si etch behavior and its effect on oxide/Si selectivity in CF4+D2 electron cyclotron resonance plasma etching

Min, K., Lamb, H. H., & Hauser, J. R. (2001, May 1). Journal of Vacuum Science & Technology B Microelectronics and Nanometer Structures Processing Measurement and Phenomena.

A two-dimensional numerical simulation of pulsed drain current transients in weak inversion and application to interface trap characterization on small geometry MOSFETs with ultrathin oxides

Ahmed, K., Wortman, J. J., & Hauser, J. R. (2000, January 1). IEEE Transactions on Electron Devices.

Analytic model of parasitic capacitance attenuationin CMOS devices with hyper-thin oxides

Ahmed, K., Ibok, E., & Hauser, J. (2000, September 28). Electronics Letters.

Comparative physical and electrical metrology of ultrathin oxides in the 6 to 1.5 nm regime

Ahmed, K., Ibok, E., Bains, G., Chi, D., Ogle, B., Wortman, J. J., & Hauser, J. R. (2000, July 1). IEEE Transactions on Electron Devices.

Effect of polysilicon gate type on the flatband voltage shift for ultrathin oxide-nitride gate stacks

Wang, N. Z., Parker, C. G., Hodge, D. W., Croswell, R. T., Yang, N. N., Misra, V., & Hauser, J. R. (2000, April 1). IEEE Electron Device Letters.

Estimation of the effects of remote charge scattering on electron mobility of n-MOSFETs with ultrathin gate oxides

Yang, N. N., Henson, W. K., Hauser, J. R., & Wortman, J. J. (2000, January 1). IEEE Transactions on Electron Devices.

Limitations of the modified shift-and-ratio technique for extraction of the bias dependence of L/sub eff/ and R/sub sd/ of LDD MOSFETs

Ahmed, K., De, I., Osburn, C., Wortman, J., & Hauser, J. (2000, April 1). IEEE Transactions on Electron Devices.

Overview of semiconductor devices

In Y. Nishi & R. Doering (Eds.), Handbook of semiconductor manufacturing technology. New York: Marcel Dekker.

Surface Residue Island Nucleation in Anhydrous HF/Alcohol Vapor Processing of Si Surfaces

Carter, R. J., Hauser, J. R., & Nemanich, R. J. (2000, January 1). Journal of The Electrochemical Society.

Estimating oxide thickness of tunnel oxides down to 1.4 nm using conventional capacitance-voltage measurements on MOS capacitors

Henson, W. K., Ahmed, K. Z., Vogel, E. M., Hauser, J. R., Wortman, J. J., Venables, R. D., … Venables, D. (1999, April 1). IEEE Electron Device Letters.

Gate quality ultrathin (2.5 nm) PECVD deposited oxynitride and nitrided oxide dielectrics

Ibok, E., Ahmed, K., Hao, N. M.-Y., Ogle, B., Wortman, J. J., & Hauser, J. R. (1999, September 1). IEEE Electron Device Letters.

Impact of tunnel currents and channel resistance on the characterization of channel inversion layer charge and polysilicon-gate depletion of sub-20-Å gate oxide MOSFETs

Ahmed, K., Ibok, E., Yeap, G. C.-F., Xiang, Q., Ogle, B., Wortman, J. J., & Hauser, J. R. (1999, January 1). IEEE Transactions on Electron Devices.

Interfacial properties of ultrathin pure silicon nitride formed by remote plasma enhanced chemical vapor deposition

Journal of Vacuum Science & Technology. B, Microelectronics and Nanometer Structures, 17(4), 1836–1839.

Modeling study of ultrathin gate oxides using direct tunneling current and capacitance-voltage measurements in MOS devices

Yang, N., Henson, W. K., Hauser, J. R., & Wortman, J. J. (1999, July 1). IEEE Transactions on Electron Devices.

Modeling the trends in valence-band electron tunneling in NMOSFETs with ultrathin SiO2 and dielectrics with oxide scaling

Shanware, A., Massoud, H. Z., Vogel, E., Henson, K., Hauser, J. R., & Wortman, J. J. (1999, September 1). Microelectronic Engineering.

The effects of Ge content in poly-Si1−xGex gate material on the tunneling barrier in PMOS devices

Shanware, A., Massoud, H. Z., Acker, A., Li, V. Z.-Q., Mirabedini, M. R., Henson, K., … Wortman, J. J. (1999, September 1). Microelectronic Engineering.

Evaluation Of 2.0 nm Grown and Deposited Dielectrics in 0.1 μm PMOSFETs

Srivastava, A., Heinisch, H. H., Vogel, E., Parker, C., Osburn, C. M., Masnari, N. A., … Hauser, J. R. (1998, January 1). MRS Proceedings.

Modeled tunnel currents for high dielectric constant dielectrics

Vogel, E. M., Ahmed, K. Z., Hornung, B., Henson, W. K., McLarty, P. K., Lucovsky, G., … Wortman, J. J. (1998, June 1). IEEE Transactions on Electron Devices.

Optimization of nitrided gate dielectrics by plasma-assisted and rapid thermal processing

Lucovsky, G., Niimi, H., Wu, Y., Parker, C. R., & Hauser, J. R. (1998, May 1). Journal of Vacuum Science & Technology A Vacuum Surfaces and Films.

Ultrathin oxide-nitride gate dielectric MOSFET's

Parker, C. G., Lucovsky, G., & Hauser, J. R. (1998, April 1). IEEE Electron Device Letters.

Bias sweep rate effects on quasi-static capacitance of MOS capacitors

Hauser, J. R. (1997, June 1). IEEE Transactions on Electron Devices.

Effects of profile doped elevated source/drain structures on deep-submicron MOSFETs

Solid-State Electronics, 38(3), 573–579.

Three-zone rapid thermal processing system utilizing wafer edge heating means

Washington, DC: U.S. Patent and Trademark Office.

An evaluation of super-steep-retrograde channel doping for deep-submicron MOSFET applications

IEEE Transactions on Electron Devices, 41(10), 1880–1882.

Cener for advanced electronic materials processing

Masnari, N. A., Hauser, J. R., Lucovsky, G., Maher, D. M., Markunas, R. J., Ozturk, M. C., & Wortman, J. J. (1993, January 1). Proceedings of the IEEE.

Conical rapid thermal processing apparatus

Washington, DC: U.S. Patent and Trademark Office.

Design and marketing of new products

Englewood Cliffs, NJ: Prentice Hall.

Essentials of new product management

Englewood Cliffs, NJ: Prentice-Hall.

Electron and hole mobilities in silicon as a function of concentration and temperature

Arora, N. D., Hauser, J. R., & Roulston, D. J. (1982, February 1). IEEE Transactions on Electron Devices.

Design and marketing of new products

Englewood Cliffs, NJ: Prentice-Hall.

Velocity-field characteristics of GaAs with Γc6-L c6-X c6 conduction-band ordering

Littlejohn, M. A., Hauser, J. R., & Glisson, T. H. (1977, November 1). Journal of Applied Physics.