Hussein Mohamed Elnawawy

College of Engineering

Works (2)

Updated: March 29th, 2024 05:01

2023 article

PreFlush: Lightweight Hardware Prediction Mechanism for Cache Line Flush and Writeback

Elnawawy, H., Tuck, J., & Byrd, G. T. (2023, October 21). (J. Tuck & G. Byrd, Eds.). 2023 32ND INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES, PACT, pp. 74–85.

By: H. Elnawawy n, J. Tuck n  & G. Byrd n 

Contributors: H. Elnawawy n

Ed(s): J. Tuck n  & G. Byrd n 

author keywords: Non-Volatile Memory; Cache Architecture
topics (OpenAlex): Parallel Computing and Optimization Techniques; Advanced Data Storage Technologies; Distributed systems and fault tolerance
TL;DR: This work proposes PreFlush, a lightweight and transparent hardware mechanism that predicts when a cache line flush or write back is needed and speculatively performs the operation early and can improve performance by up to 25% for the WHISPER NVM benchmark suite and loop-based matrix microbenchmarks. (via Semantic Scholar)
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Sources: Web Of Science, ORCID, NC State University Libraries
Added: February 1, 2024

2019 article

Efficient Checkpointing with Recompute Scheme for Non-volatile Main Memory

Alshboul, M., Elnawawy, H., Elkhouly, R., Kimura, K., Tuck, J., & Solihin, Y. (2019, May 29). ACM Transactions on Architecture and Code Optimization.

By: M. Alshboul n, H. Elnawawy n, R. Elkhouly *, K. Kimura*, J. Tuck n  & Y. Solihin*

author keywords: Memory systems; emerging memory technologies; computer architecture
topics (OpenAlex): Distributed systems and fault tolerance; Parallel Computing and Optimization Techniques; Radiation Effects in Electronics
TL;DR: A novel recompute-based failure safety approach that removes the need to keep checkpoints or logs, thus reducing execution time overheads and improving NVMM write endurance at the expense of more complex recovery. (via Semantic Scholar)
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Source: Web Of Science
Added: August 5, 2019

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