Hussein Mohamed Elnawawy

College of Engineering

Works (2)

Updated: March 29th, 2024 05:01

2023 article

PreFlush: Lightweight Hardware Prediction Mechanism for Cache Line Flush and Writeback

(J. Tuck & G. Byrd, Eds.). 2023 32ND INTERNATIONAL CONFERENCE ON PARALLEL ARCHITECTURES AND COMPILATION TECHNIQUES, PACT, pp. 74–85.

By: H. Elnawawy n, J. Tuck n  & G. Byrd n 

Contributors: H. Elnawawy n

Ed(s): J. Tuck n  & G. Byrd n 

author keywords: Non-Volatile Memory; Cache Architecture
TL;DR: This work proposes PreFlush, a lightweight and transparent hardware mechanism that predicts when a cache line flush or write back is needed and speculatively performs the operation early and can improve performance by up to 25% for the WHISPER NVM benchmark suite and loop-based matrix microbenchmarks. (via Semantic Scholar)
Sources: Web Of Science, ORCID, NC State University Libraries
Added: February 1, 2024

2019 journal article

Efficient Checkpointing with Recompute Scheme for Non-volatile Main Memory

ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 16(2).

By: M. Alshboul n, H. Elnawawy n, R. Elkhouly *, K. Kimura*, J. Tuck n  & Y. Solihin*

author keywords: Memory systems; emerging memory technologies; computer architecture
TL;DR: A novel recompute-based failure safety approach that removes the need to keep checkpoints or logs, thus reducing execution time overheads and improving NVMM write endurance at the expense of more complex recovery. (via Semantic Scholar)
UN Sustainable Development Goal Categories
Source: Web Of Science
Added: August 5, 2019

Citation Index includes data from a number of different sources. If you have questions about the sources of data in the Citation Index or need a set of data which is free to re-distribute, please contact us.

Certain data included herein are derived from the Web of Science© and InCites© (2024) of Clarivate Analytics. All rights reserved. You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.