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2020 journal article
Dynamic and scalable DNA-based information storage
NATURE COMMUNICATIONS, 11(1).
2020 journal article
The Case for Domain-Specialized Branch Predictors for Graph-Processing
IEEE COMPUTER ARCHITECTURE LETTERS, 19(2), 101–104.
2019 journal article
Driving the Scalability of DNA-Based Information Storage Systems
ACS SYNTHETIC BIOLOGY, 8(6), 1241–1248.
2019 journal article
Efficient Checkpointing with Recompute Scheme for Non-volatile Main Memory
ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 16(2).
2018 conference paper
Hardware Supported Permission Checks On Persistent Objects for Performance and Programmability
2018 ACM/IEEE 45TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA), 466–478.
2018 conference paper
Lazy Persistency: a High-Performing and Write-Efficient Software Persistency Technique
2018 ACM/IEEE 45TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA), 439–451.
2017 conference paper
Characterizing the impact of soft errors across microarchitectural structures and implications for predictability
Proceedings of the 2017 ieee international symposium on workload characterization (iiswc), 250–260.
2017 conference paper
Hiding the long latency of persist barriers using speculative execution
44th Annual International Symposium on Computer Architecture (ISCA 2017), 175–186.
2017 journal article
Redirect: Reconfigurable directories for multicore architectures
ACM Transactions on Architecture and Code Optimization, 14(4).
2016 journal article
An accurate cross-layer approach for online architectural vulnerability estimation
ACM Transactions on Architecture and Code Optimization, 13(3).
2016 journal article
Lightweight runtime checking of C programs with RTC
Computer Languages Systems & Structures, 45, 191–203.
2015 journal article
Clustering and differential alignment algorithm: Identification of early stage regulators in the Arabidopsis thaliana iron deficiency response
PLoS One, 10(8).
2015 journal article
Computational approaches to identify regulators of plant stress response using high-throughput gene expression data
Current Plant Biology, 3-4, 20–29.
2015 journal article
Control-flow decoupling: An approach for timely, non-speculative branching
IEEE Transactions on Computers, 64(8), 2182–2203.
2015 conference paper
Runtime checking C programs
30th Annual ACM Symposium on Applied Computing, Vols I and II, 2107–2114.
2015 conference paper
SourceMark: A source-level approach for identifying architecture and optimization agnostic regions for performance analysis
2015 IEEE International Symposium on Workload Characterization (IISWC), 160–171.
2013 journal article
Automatic parallelization of fine-grained metafunctions on a chip multiprocessor
ACM Transactions on Architecture and Code Optimization, 10(4).
2012 conference paper
Control-flow decoupling
2012 ieee/acm 45th international symposium on microarchitecture (micro-45), 329–340.
2012 journal article
Efficiently exploiting memory level parallelism on asymmetric coupled cores in the dark silicon era
ACM Transactions on Architecture and Code Optimization, 8(4).
2011 conference paper
AutoPipe: A Pipeline Parallelization Framework in GCC
GROW2011: International Workshop on GCC Research Opportunities.
2011 conference paper
Automatic Parallelization of Fine-grained Meta-functions on a Chip Multiprocessor
International Symposium on Code Generation and Optimization, 130–140.
2011 conference paper
HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor
International symposium on high-performance computer, 99–110.
2010 conference paper
Design Tradeoffs for Memory-Level Parallelism on an Asymmetric Multicore System
Workshop on Parallel Execution of Sequential Programs on Multi-core Architectures.
2010 conference paper
MMT: Exploiting Fine Grained Parallelism in Dynamic Memory Management
International Parallel and Distributed Processing Symposium.
2010 conference paper
Speculative parallelization of partial reduction variables
International Symposium on Code Generation and Optimization, 141–150.
2009 conference paper
Memory Management Thread for Heap Allocation Intensive Applications
Workshop on Memory Performance: Dealing with Applications, Systems Architecture.
2009 journal article
SOFTSIG: Software-exposed hardware signatures for code analysis and optimization
IEEE Micro, 29(1), 84–95.
2009 journal article
The Bulk Multicore for Improved Programmability
Communications of the ACM.
2008 report
A Data Dependence Profiler for the GNU Compiler Collection
In Technical Report- Not held in TRLN member libraries.
2008 conference paper
Parallelizing Mudflap Using Thread-Level Speculation on a CMP
Workshop on Parallel Execution of Sequential Programs on Multi-core Architectures.
2008 conference paper
SoftSig: Software Exposed Hardware Signatures for Code Analysis and Optimization
ACM International Symposium on Architectural Support for Programming Languages and Operating Systems, 145–156.
2007 conference paper
BulkSC: Bulk Enforcement of Sequential Consistency
IEEE/ACM Annual International Symposium on Computer Architecture, 278–289.
2007 conference paper
CAP: Criticality Analysis for Power Efficient Speculative Multithreading on a CMP
IEEE International Conference on Computer Design, 409–416.
2006 conference paper
Are We Ready for High Memory-Level Parallelism?
Workshop on Memory Performance Issues.
2006 conference paper
Bulk Disambiguation of Speculative Threads in Multiprocessors
IEEE/ACM Annual International Symposium on Computer Architecture, 227–238.
2006 journal article
CAVA: Using Checkpoint Assisted Value Prediction to Hide L2 Misses
ACM Transactions on Architecture and Code Optimization, 182–208.
2006 journal article
Energy-Efficient Thread-Level Speculation on a CMP
IEEE Micro Special Issue: Micro's Top Picks from Computer Architecture Conferences, 80–91.
2006 conference paper
POSH: A TLS Compiler that Exploits Program Structure
ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP), 158–167.
2006 conference paper
Scalable Miss Handling Architecture for High Memory-Level Parallelism
IEEE Annual International Symposium on Microarchitecture (MICRO), 409–421.
2005 conference paper
POSH: A Pro?ler-Enhanced TLS Compiler that Leverages Program Structure
IBM Watson Conference on Interaction between Architecture, Circuits, and Compilers (P = AC2), 83–92.
2005 conference paper
Tasking with Out-of-Order Spawn in TLS Chip Multiprocessors: Microarchitecture and Compilation
ACM International Conference on Supercomputing, 179–188.
2005 conference paper
Thread- Level Speculation on a CMP Can Be Energy Efficient
ACM International Conference on Supercomputing, 219–228.
2004 journal article
CAVA: Hiding L2 Misses with Checkpoint-Assisted Value Prediction
IEEE Computer Architecture Letters, 7–10.
2001 journal article
Handling Crosscutting Constraints in Domain-Speci?c Modeling
Communications of the ACM, 44(10), 87–93.
0 report
Improving MemoiSE via Function Splitting
In Technical Report- Not held in TRLN member libraries (Vol. 2009).