Works (96)

2021 article

BBB: Simplifying Persistent Programming using Battery-Backed Buffers

2021 27TH IEEE INTERNATIONAL SYMPOSIUM ON HIGH-PERFORMANCE COMPUTER ARCHITECTURE (HPCA 2021).

By: M. Alshboul, P. Ramrakhyani, W. Wang, J. Tuck & Y. Solihin

Sources: Web Of Science, ORCID
Added: July 26, 2021

2021 review

DNA stability: a central design consideration for DNA data storage systems

[Review of ]. NATURE COMMUNICATIONS, 12(1).

By: K. Matange, J. Tuck & A. Keung

Sources: Web Of Science, ORCID
Added: April 19, 2021

2021 journal article

Promiscuous molecules for smarter file operations in DNA-based data storage

NATURE COMMUNICATIONS, 6.

By: K. Tomek, K. Volkel, E. Indermaur, J. Tuck & A. Keung

Sources: Web Of Science, ORCID
Added: July 12, 2021

2020 journal article

Dynamic and scalable DNA-based information storage

NATURE COMMUNICATIONS, 11(1).

By: K. Lin, K. Volkel, J. Tuck & A. Keung

Sources: Web Of Science, ORCID
Added: July 13, 2020

2020 article

Methods of crash recovery for data stored in non-volatile main memory

Solihin, Y., Alshboul, M., & Tuck, J. (2020, March).

By: Y. Solihin, M. Alshboul & J. Tuck

Source: ORCID
Added: August 18, 2021

2020 journal article

Persistent Data Retention Models

ArXiv Preprint ArXiv:2009.14705.

By: T. Wang & J. Tuck

Source: ORCID
Added: August 18, 2021

2020 journal article

The Case for Domain-Specialized Branch Predictors for Graph-Processing

IEEE COMPUTER ARCHITECTURE LETTERS, 19(2), 101–104.

By: A. Samara & J. Tuck

Sources: Web Of Science, ORCID
Added: August 10, 2020

2020 conference paper

WET: write efficient loop tiling for non-volatile main memory

2020 57th ACM/IEEE Design Automation Conference (DAC), 1–6.

By: M. Alshboul, J. Tuck & Y. Solihin

Event: IEEE

Source: ORCID
Added: August 18, 2021

2019 journal article

Driving the Scalability of DNA-Based Information Storage Systems

ACS SYNTHETIC BIOLOGY, 8(6), 1241–1248.

By: K. Tomek, K. Volkel, A. Simpson, A. Hass, E. Indermaur, J. Tuck, A. Keung

Sources: Web Of Science, ORCID
Added: July 15, 2019

2019 journal article

Dynamic DNA-based information storage

BioRxiv, 836429.

By: K. Lin, A. Keung & J. Tuck

Source: ORCID
Added: August 18, 2021

2019 journal article

Dynamic modelling of the iron deficiency modulated transcriptome response in Arabidopsis thaliana roots

In Silico Plants, 1(1), diz005.

By: A. Koryachko, A. Matthiadis, S. Haque, D. Muhammad, J. Ducoste, J. Tuck, T. Long, C. Williams

Source: ORCID
Added: August 18, 2021

2019 journal article

Efficient Checkpointing with Recompute Scheme for Non-volatile Main Memory

ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 16(2), 1–27.

By: M. Alshboul, H. Elnawawy, R. Elkhouly, K. Kimura, J. Tuck & Y. Solihin

Sources: Web Of Science, ORCID
Added: August 5, 2019

2018 conference paper

Hardware supported permission checks on persistent objects for performance and programmability

2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA), 466–478.

By: T. Wang, S. Sambasivam & J. Tuck

Event: IEEE

Sources: NC State University Libraries, ORCID
Added: March 4, 2019

2018 journal article

Inter-disciplinary research challenges in computer systems for the 2020s

National Science Foundation, USA, Tech. Rep.

By: A. Cohen, X. Shen, J. Torrellas, J. Tuck, Y. Zhou, S. Adve, I. Akturk, S. Bagchi ...

Source: ORCID
Added: August 18, 2021

2018 conference paper

Lazy persistency: A high-performing and write-efficient software persistency technique

2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA), 439–451.

By: M. Alshboul, J. Tuck & Y. Solihin

Event: IEEE

Sources: NC State University Libraries, ORCID
Added: March 4, 2019

2017 conference paper

Characterizing the impact of soft errors across microarchitectural structures and implications for predictability

2017 IEEE International Symposium on Workload Characterization (IISWC), 250–260.

By: B. Wibowo, A. Agrawal & J. Tuck

Event: IEEE

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2017 conference paper

Efficient checkpointing of loop-based codes for non-volatile main memory

2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT), 318–329.

By: H. Elnawawy, M. Alshboul, J. Tuck & Y. Solihin

Event: IEEE

Source: ORCID
Added: August 18, 2021

2017 conference paper

Hardware supported persistent object address translation

2017 50th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 800–812.

By: T. Wang, S. Sambasivam, Y. Solihin & J. Tuck

Event: IEEE

Source: ORCID
Added: August 18, 2021

2017 conference paper

Hiding the long latency of persist barriers using speculative execution

Proceedings of the 44th Annual International Symposium on Computer Architecture, 175–186.

By: S. Shin, J. Tuck & Y. Solihin

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2017 conference paper

Improving the effectiveness of searching for isomorphic chains in superword level parallelism

2017 50th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 718–729.

By: J. Huh & J. Tuck

Event: IEEE

Source: ORCID
Added: August 18, 2021

2017 conference paper

Leveraging near data processing for high-performance checkpoint/restart

Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis, 1–12.

By: A. Agrawal, G. Loh & J. Tuck

Source: ORCID
Added: August 18, 2021

2017 conference paper

Proteus: A flexible and fast software supported hardware logging approach for nvm

Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 178–190.

By: S. Shin, S. Tirukkovalluri, J. Tuck & Y. Solihin

Source: ORCID
Added: August 18, 2021

2017 journal article

ReDirect: Reconfigurable Directories for Multicore Architectures

ACM Transactions on Architecture and Code Optimization (TACO), 14(4), 1–23.

By: G. Patsilaras & J. Tuck

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2016 journal article

An accurate cross-layer approach for online architectural vulnerability estimation

ACM Transactions on Architecture and Code Optimization (TACO), 13(3), 1–27.

By: B. Wibowo, A. Agrawal, T. Stanton & J. Tuck

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2016 article

Languages and Compilers for Parallel Computing: 28th International Workshop, LCPC 2015, Raleigh, NC, USA, September 9-11, 2015, Revised Selected Papers

Springer.

By: X. Shen, F. Mueller & J. Tuck

Source: ORCID
Added: August 18, 2021

2016 journal article

Lightweight runtime checking of C programs with RTC

Computer Languages, Systems & Structures, 45, 191–203.

By: R. Milewicz, R. Vanka, J. Tuck, D. Quinlan & P. Pirkelbauer

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2015 journal article

Clustering and Differential Alignment Algorithm: Identification of early stage regulators in the Arabidopsis thaliana iron deficiency response

PloS One, 10(8), e0136591.

By: A. Koryachko, A. Matthiadis, D. Muhammad, J. Foret, S. Brady, J. Ducoste, J. Tuck, T. Long, C. Williams

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2015 journal article

Computational approaches to identify regulators of plant stress response using high-throughput gene expression data

Current Plant Biology, 3-4, 20–29.

By: A. Koryachko, A. Matthiadis, J. Ducoste, J. Tuck, T. Long & C. Williams

Sources: Crossref, ORCID
Added: February 24, 2020

2015 conference paper

Computing in 3D

2015 IEEE Custom Integrated Circuits Conference (CICC), 1–6.

By: P. Franzon, E. Rotenberg, J. Tuck, W. Davis, H. Zhou, J. Schabel, Z. Zhang, J. Dwiel ...

Event: IEEE

Source: ORCID
Added: August 18, 2021

2015 journal article

Control-flow decoupling: An approach for timely, non-speculative branching

IEEE Transactions on Computers, 64(8), 2182–2203.

By: R. Sheikh, J. Tuck & E. Rotenberg

Source: NC State University Libraries
Added: August 6, 2018

2015 conference paper

Runtime checking C programs

Proceedings of the 30th Annual ACM Symposium on Applied Computing, 2107–2114.

By: R. Milewicz, R. Vanka, J. Tuck, D. Quinlan & P. Pirkelbauer

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2015 conference paper

Source Mark: A Source-Level Approach for Identifying Architecture and Optimization Agnostic Regions for Performance Analysis

2015 IEEE International Symposium on Workload Characterization, 160–171.

By: A. Agrawal, B. Wibowo & J. Tuck

Event: IEEE

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2014 conference paper

3D-enabled customizable embedded computer (3DECC)

2014 International 3D Systems Integration Conference (3DIC), 1–3.

By: P. Franzon, E. Rotenberg, J. Tuck, H. Zhou, W. Davis, H. Dai, J. Huh, S. Ku ...

Event: IEEE

Source: ORCID
Added: August 18, 2021

2014 journal article

Control-flow decoupling: An approach for timely, non-speculative branching

IEEE Transactions on Computers, 64(8), 2182–2203.

By: R. Sheikh, J. Tuck & E. Rotenberg

Source: ORCID
Added: August 18, 2021

2013 conference paper

Applications and design styles for 3DIC

2013 IEEE International Electron Devices Meeting, 29–24.

By: P. Franzon, E. Rotenberg, J. Tuck, W. Davis, H. Zhou, J. Schabel, Z. Zhang, J. Park ...

Event: IEEE

Source: ORCID
Added: August 18, 2021

2013 journal article

Automatic parallelization of fine-grained metafunctions on a chip multiprocessor

ACM Transactions on Architecture and Code Optimization (TACO), 10(4), 1–26.

By: S. Lee & J. Tuck

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2012 conference paper

Control-flow decoupling

2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 329–340.

By: R. Sheikh, J. Tuck & E. Rotenberg

Event: IEEE

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2012 conference paper

Efficient and accurate data dependence profiling using software signatures

Proceedings of the Tenth International Symposium on Code Generation and Optimization, 186–195.

By: R. Vanka & J. Tuck

Source: ORCID
Added: August 18, 2021

2012 journal article

Efficiently exploiting memory level parallelism on asymmetric coupled cores in the dark silicon era

ACM Transactions on Architecture and Code Optimization (TACO), 8(4), 1–21.

By: G. Patsilaras, N. Choudhary & J. Tuck

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2012 conference paper

HiRe: using hint & release to improve synchronization of speculative threads

HiRe: using hint & release to improve synchronization of speculative threads. Proceedings of the 26th ACM international conference on Supercomputing, 143–152.

By: L. Han, X. Jiang, W. Liu, Y. Wu & J. Tuck

Source: ORCID
Added: August 18, 2021

2011 journal article

Article 28 (21 pages)-Efficiently Exploiting Memory Level Parallelism on Asymmetric Coupled Cores in the Dark Silicon Era

ACM Transactions on Architecture and Code Optimization-TACO, 8(4).

By: G. Patsilaras, N. Choudhary & J. Tuck

Source: ORCID
Added: August 18, 2021

2011 conference paper

AutoPipe: A Pipeline Parallelization Framework in GCC

GROW2011: International Workshop on GCC Research Opportunities.

By: S. Lee, J. Danis & J. Tuck

Source: NC State University Libraries
Added: August 6, 2018

2011 conference paper

Automatic Parallelization of Fine-grained Meta-functions on a Chip Multiprocessor

International Symposium on Code Generation and Optimization, 130–140.

By: S. Lee & J. Tuck

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2011 conference paper

HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor

International symposium on high-performance computer, 99–110.

By: S. Lee, D. Tiwari, S. Yan & J. Tuck

Source: NC State University Libraries
Added: August 6, 2018

2011 conference paper

HAQu: Hardware-accelerated queueing for fine-grained threading on a chip multiprocessor

2011 IEEE 17th International Symposium on High Performance Computer Architecture, 99–110.

By: S. Lee, D. Tiwari, Y. Solihin & J. Tuck

Event: IEEE

Source: ORCID
Added: August 18, 2021

2011 journal article

SPECIAL ISSUE ON HIGH-PERFORMANCE AND EMBEDDED ARCHITECTURES AND COMPILERS

ACM Transactions On, 8(4).

By: P. Stenström, K. De Bosschere, J. Albericio, R. Gran, P. Ibáñez, V. Viñals, J. LLaberı́a, A. Bayrak ...

Source: ORCID
Added: August 18, 2021

2010 conference paper

Design Trade-offs for Memory Level Parallelism on an Asymmetric Multicore System

Pespma 2010-Workshop on Parallel Execution of Sequential Programs on Multi-core Architecture.

By: G. Patsilaras, N. Choudhary & J. Tuck

Source: ORCID
Added: August 18, 2021

2010 conference paper

Design Tradeoffs for Memory-Level Parallelism on an Asymmetric Multicore System

Workshop on Parallel Execution of Sequential Programs on Multi-core Architectures.

By: G. Patsilaras, N. Choudhary & J. Tuck

Source: NC State University Libraries
Added: August 6, 2018

2010 conference paper

MMT: Exploiting Fine Grained Parallelism in Dynamic Memory Management

International Parallel and Distributed Processing Symposium.

By: D. Tiwari, J. Tuck & Y. Solihin

Source: NC State University Libraries
Added: August 6, 2018

2010 conference paper

Mmt: Exploiting fine-grained parallelism in dynamic memory management

2010 IEEE International Symposium on Parallel & Distributed Processing (IPDPS), 1–12.

By: D. Tiwari, S. Lee, J. Tuck & Y. Solihin

Event: IEEE

Source: ORCID
Added: August 18, 2021

2010 conference paper

Speculative parallelization of partial reduction variables

Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization, 141–150.

By: L. Han, W. Liu & J. Tuck

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2009 conference paper

Memory management thread for heap allocation intensive sequential applications

Proceedings of the 10th workshop on MEmory performance: DEaling with Applications, systems and architecture, 35–42.

By: D. Tiwari, S. Lee, J. Tuck & Y. Solihin

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2009 journal article

Softsig: Software-exposed hardware signatures for code analysis and optimization

IEEE Micro, 29(1), 84–95.

By: J. Tuck, W. Ahn, J. Torrellas & L. Ceze

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2009 journal article

The Bulk Multicore for Improved Programmability

Communications of the ACM.

By: J. Torrellas, L. Ceze, J. Tuck, C. Cascaval, P. Montesinos, W. Ahn, W. Prvulovic

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2009 journal article

The bulk multicore architecture for improved programmability

Communications of the ACM, 52(12), 58–65.

By: J. Torrellas, L. Ceze, J. Tuck, C. Cascaval, P. Montesinos, W. Ahn, M. Prvulovic

Source: ORCID
Added: August 18, 2021

2008 report

A Data Dependence Profiler for the GNU Compiler Collection

In Technical Report- Not held in TRLN member libraries.

By: S. Gopal & J. Tuck

Source: NC State University Libraries
Added: August 6, 2018

2008 conference paper

Parallelizing Mudflap Using Thread-Level Speculation on a CMP

Workshop on Parallel Execution of Sequential Programs on Multi-core Architectures.

By: S. Lee & J. Tuck

Source: NC State University Libraries
Added: August 6, 2018

2008 conference paper

Parallelizing Mudflap using Thread-Level Speculation on a Chip Multiprocessor

Proc. of the 2008 Workshop on Parallel Execution of Sequential Programs on Multicore Architectures, 72–80.

By: S. Lee & J. Tuck

Event: Citeseer

Source: ORCID
Added: August 18, 2021

2008 conference paper

SoftSig: Software Exposed Hardware Signatures for Code Analysis and Optimization

ACM International Symposium on Architectural Support for Programming Languages and Operating Systems, 145–156.

By: J. Tuck, W. Ahn, L. Ceze & J. Torrellas

Source: NC State University Libraries
Added: August 6, 2018

2008 journal article

SoftSig: software-exposed hardware signatures for code analysis and optimization

ACM SIGOPS Operating Systems Review, 42(2), 145–156.

By: J. Tuck, W. Ahn, L. Ceze & J. Torrellas

Source: ORCID
Added: August 18, 2021

2008 article

System and method for cache coherency in a cache with different cache location lengths

(2008, November).

Source: ORCID
Added: August 18, 2021

2007 conference paper

BulkSC: Bulk enforcement of sequential consistency

Proceedings of the 34th annual international symposium on Computer architecture, 278–289.

By: L. Ceze, J. Tuck, P. Montesinos & J. Torrellas

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2007 conference paper

CAP: Criticality analysis for power-efficient speculative multithreading

2007 25th International Conference on Computer Design, 409–416.

By: J. Tuck, W. Liu & J. Torrellas

Event: IEEE

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2007 report

Efficient support for speculative tasking

By: J. Tuck

Source: ORCID
Added: August 18, 2021

2006 conference paper

Are We Ready for High Memory-Level Parallelism?

Workshop on Memory Performance Issues.

By: L. Ceze, J. Tuck & J. Torrellas

Source: NC State University Libraries
Added: August 6, 2018

2006 conference paper

Are we ready for high memorylevel parallelism?

4th Workshop on Memory Performance Issues.

By: L. Ceze, J. Tuck & J. Torrellas

Source: ORCID
Added: August 18, 2021

2006 journal article

Boosting SMT trace processors performance with data cache misssensitive thread scheduling mechanism

Microprocessors and Microsystems, 30(5), 225–233.

By: K. Wang, Z. Ji & M. Hu

Source: ORCID
Added: August 18, 2021

2006 conference paper

Bulk Disambiguation of Speculative Threads in Multiprocessors

IEEE/ACM Annual International Symposium on Computer Architecture, 227–238.

By: L. Ceze, J. Tuck, C. Cascaval & J. Torrellas

Source: NC State University Libraries
Added: August 6, 2018

2006 journal article

Bulk disambiguation of speculative threads in multiprocessors

ACM SIGARCH Computer Architecture News, 34(2), 227–238.

By: L. Ceze, J. Tuck, J. Torrellas & C. Cascaval

Source: ORCID
Added: August 18, 2021

2006 journal article

CAVA: Using checkpoint-assisted value prediction to hide L2 misses

ACM Transactions on Architecture and Code Optimization (TACO), 3(2), 182–208.

By: L. Ceze, K. Strauss, J. Tuck, J. Torrellas & J. Renau

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2006 journal article

Energy-Efficient Thread-Level Speculation on a CMP

IEEE Micro Special Issue: Micro's Top Picks from Computer Architecture Conferences, 80–91.

By: J. Nenau, K. Strauss, L. Ceze, W. Liu, S. Sarangi, J. Tuck, J. Torrellas

Source: NC State University Libraries
Added: August 6, 2018

2006 journal article

Energy-efficient thread-level speculation

IEEE Micro, 26(1), 80–91.

By: J. Renau, K. Strauss, L. Ceze, W. Liu, S. Sarangi, J. Tuck, J. Torrellas

Source: ORCID
Added: August 18, 2021

2006 conference paper

POSH: a TLS compiler that exploits program structure

Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming, 158–167.

By: W. Liu, J. Tuck, L. Ceze, W. Ahn, K. Strauss, J. Renau, J. Torrellas

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2006 conference paper

Scalable cache miss handling for high memory-level parallelism

2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06), 409–422.

By: J. Tuck, L. Ceze & J. Torrellas

Event: IEEE

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2006 article

System and method for non-uniform cache in a multi-core processor

Hughes, C., Tuck, J., Lee, V., & Chen, Y.-kuang. (2006, June).

By: C. Hughes, J. Tuck, V. Lee & Y. Chen

Source: ORCID
Added: August 18, 2021

2005 journal article

Languages and compilers for parallel computing

By: B. Tseng

Source: ORCID
Added: August 18, 2021

2005 conference paper

POSH: A profiler-enhanced TLS compiler that leverages program structure

IBM Watson P= AC2 Conference, 83–92.

By: W. Liu, J. Tuck, L. Ceze, K. Strauss, J. Renau & J. Torrellas

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2005 article

SESC simulator, January 2005

By: J. Renau, B. Fraguela, J. Tuck, W. Liu, M. Prvulovic, L. Ceze, S. Sarangi, P. Sack, K. Strauss, P. Montesinos

Source: ORCID
Added: August 18, 2021

2005 conference paper

Tasking with Out-of-Order Spawn in TLS Chip Multiprocessors: Microarchitecture and Compilation

ACM International Conference on Supercomputing, 179–188.

By: J. Renau, W. J., C. L., S. L., . K. & J. Torrellas

Source: NC State University Libraries
Added: August 6, 2018

2005 conference paper

Tasking with out-of-order spawn in TLS chip multiprocessors: Microarchitecture and compilation

Proceedings of the 19th Annual International conference on Supercomputing, 179–188.

By: J. Renau, J. Tuck, W. Liu, L. Ceze, K. Strauss & J. Torrellas

Source: ORCID
Added: August 18, 2021

2005 conference paper

Thread-level speculation on a CMP can be energy efficient

Proceedings of the 19th annual international conference on Supercomputing, 219–228.

By: J. Renau, K. Strauss, L. Ceze, W. Liu, S. Sarangi, J. Tuck, J. Torrellas

Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2004 journal article

CAVA: Hiding L2 Misses with Checkpoint-Assisted Value Prediction

IEEE Computer Architecture Letters, 7–10.

By: L. Ceze, K. Strauss, J. Tuck & J. Torrellas

Source: NC State University Libraries
Added: August 6, 2018

2004 journal article

CAVA: Hiding L2 misses with checkpoint-assisted value prediction

IEEE Computer Architecture Letters, 3(1), 7–7.

By: L. Ceze, K. Strauss, J. Tuck, J. Renau & J. Torrellas

Source: ORCID
Added: August 18, 2021

2003 thesis

A novel compiler framework for a chip-multiprocessor architecture with thread-level speculation

University of Illinois at Urbana-Champaign.

By: J. Tuck

Source: ORCID
Added: August 18, 2021

2002 journal article

Morphable multithreaded memory tiles (M3T) architecture

University of Illinois UIUC-CS Technical Report.

By: J. Renau, J. Tuck, W. Liu & J. Torrellas

Source: ORCID
Added: August 18, 2021

2002 report

Sphinx Parallelization

By: J. Tuck, L. Baugh, J. Renau & J. Torrellas

Source: ORCID
Added: August 18, 2021

2002 journal article

Sphinx parallelization

Dept. of Computer Science, University of Illinois, Tech. Rep. UIUCDCS.

By: L. Baugh, J. Renau, J. Tuck & J. Torrellas

Source: ORCID
Added: August 18, 2021

2001 journal article

Handling Crosscutting Constraints in Domain-Speci?c Modeling

Communications of the ACM, 44(10), 87–93.

By: J. Gray, T. Bapty, S. Nemma & J. Tuck

Source: NC State University Libraries
Added: August 6, 2018

2001 journal article

Handling crosscutting constraints in domain-specific modeling

Communications of the ACM, 44(10), 87–93.

By: J. Gray, T. Bapty, S. Neema & J. Tuck

Source: ORCID
Added: August 18, 2021

2001 journal article

Institute for Software Integrated Systems Vanderbilt University Nashville Tennessee 37235

ISIS, 1, 200.

By: J. Tuck & T. Bapty

Source: ORCID
Added: August 18, 2021

journal article

Abstract Parallel Operators: Revamping the Hardware/Software Interface for the Multicore Era

Patsilaras, G., Lee, S., & Tuck, J.

By: G. Patsilaras, S. Lee & J. Tuck

Source: ORCID
Added: August 18, 2021

journal article

Improving MemoiSE Using Function Splitting

Vanka, R., & Tuck, J.

By: R. Vanka & J. Tuck

Source: ORCID
Added: August 18, 2021

0 report

Improving MemoiSE via Function Splitting

In Technical Report- Not held in TRLN member libraries (Vol. 2009).

Source: NC State University Libraries
Added: August 6, 2018

journal article

Industry Session Program Committee

Akin, B., Baghsorkhi, S., Bai, Y., Fletcher, C., Healy, M., Huang, M., … others.

By: B. Akin, S. Baghsorkhi, Y. Bai, C. Fletcher, M. Healy, M. Huang, O. Kayiran, S. Khan ...

Source: ORCID
Added: August 18, 2021

journal article

Tasking with out-of-order spawn in TLS chip multiprocessors

Tuck, J., & Torrellas, J.

By: J. Tuck & J. Torrellas

Source: ORCID
Added: August 18, 2021

journal article

Thread-Level Speculation on a CMP Can Be Energy Efficient

Strauss, J. R. K., Ceze, L., Liu, W., Sarangi, S., Tuck, J., & Torrellas, J.

By: J. Strauss, L. Ceze, W. Liu, S. Sarangi, J. Tuck & J. Torrellas

Source: ORCID
Added: August 18, 2021