Works (1)
Updated: April 11th, 2023 10:13
2013 conference paper
Design of controller for L2 cache mapped in Tezzaron stacked DRAM
2013 IEEE International 3D Systems Integration Conference (3DIC). Presented at the 2013 IEEE International 3D Systems Integration Conference (3DIC), San Francisco, CA.
Event: 2013 IEEE International 3D Systems Integration Conference (3DIC) at San Francisco, CA on October 2-4, 2013
TL;DR:
This paper investigates the implementation of such a cache controller using 3-layer 256 MB Tezzaron Octopus stacked DRAM, which provides a fast data access through burst-4 and burst-8 mode and has a low hit latency.
(via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy
(OpenAlex)
Sources: NC State University Libraries, ORCID
Added: August 6, 2018
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