Works (1)
Updated: July 5th, 2023 15:41
2014 journal article
A Generic and Scalable Architecture for a Large Acoustic Model and Large Vocabulary Speech Recognition Accelerator Using Logic on Memory
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 22(12), 2701–2712.
author keywords: Accelerator; beam search; embedded; hardware software co-design; logic on memory; multipass decoding; N-best; speech recognition; sphinx
TL;DR:
A scalable hardware accelerator for speech recognition, which uses a two pass decoding algorithm with word dependent N-best Viterbi Beam Search, which achieves an overall speed up of 4.3X over a 2.4-GHz Intel Core 2 Duo processor running the CMU Sphinx speech recognition software.
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Added: August 6, 2018
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