Works (4)

2020 conference paper

Symbiotic HW Cache and SW DTLB Prefetching for DRAM/NVM Hybrid Memory

2020 28th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS), 1–8.

By: O. Patil, F. Mueller, L. Ionkov*, J. Lee* & M. Lang*

Event: 2020 28th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS) at Nice, France

Source: Crossref
Added: February 1, 2021

2019 article

End-to-End Resilience for HPC Applications

HIGH PERFORMANCE COMPUTING, ISC HIGH PERFORMANCE 2019, pp. 271–290.

By: A. Rezaei n, H. Khetawat, O. Patil, F. Mueller, P. Hargrove* & E. Roman*

Source: Web Of Science
Added: November 18, 2019

2019 conference paper

Performance characterization of a DRAM-NVM hybrid memory architecture for HPC applications using intel optane DC persistent memory modules

Proceedings of the International Symposium on Memory Systems - MEMSYS '19. Presented at the the International Symposium.

By: O. Patil, L. Ionkov*, J. Lee*, F. Mueller & M. Lang*

Event: the International Symposium

Source: Crossref
Added: March 2, 2020

2016 conference paper

Efficient and predictable group communication for manycore NoCs

High performance computing, 9697, 383–403.

By: K. Yagna, O. Patil & F. Mueller

Source: NC State University Libraries
Added: August 6, 2018