Works (393)

Updated: April 4th, 2024 10:02

2023 journal article

A Deep Transfer Learning Design Rule Checker With Synthetic Training

IEEE DESIGN & TEST, 40(1), 77–84.

By: L. Francisco n, W. Davis n & P. Franzon n

author keywords: Layout; Design methodology; Convolutional neural networks; Transfer learning; Generators; Deep learning; Manuals; Training data; Design Rule Checking; Machine Learning; IC Verification; Physical Verification; Convolutional Neural Network; Deep Learning; Synthetic Data Training; Transfer Learning
Sources: ORCID, Web Of Science, NC State University Libraries
Added: January 24, 2023

2023 article

Chiplet Set For Artificial Intelligence

2023 IEEE INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE, 3DIC.

By: J. Stevens n, T. Pan n, P. Ravichandiran n & P. Franzon n

author keywords: ASIP; chiplet; AI accelerator; AIB
TL;DR: This paper presents a chipletized design used for Artificial Intelligence, which details a scalable AI chiplet set, along with Central Processing Units (CPUs), and focuses on phase one, which uses the United Semiconductor Japan Co. (USJC) 55 nm LP process to fabricate the design. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: August 14, 2023

2023 article

Generative Multi-Physics Models for System Power and Thermal Analysis Using Conditional Generative Adversarial Networks

2023 IEEE 32ND CONFERENCE ON ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS, EPEPS.

By: P. Kashyap*, C. Cheng*, Y. Choi* & P. Franzon n

author keywords: Power integrity; thermal analysis; digital twins; GAN; multi-physics; co-simulation
TL;DR: A novel way of using a class of deep learning algorithms called conditional GANs (cGANs) to efficiently model the power/thermal co-simulation task using generative models that can predict unseen simulation conditions is described. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: January 2, 2024

2023 article

System Aware Floorplanning for Chip-Package Co-design

2023 IEEE 32ND CONFERENCE ON ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS, EPEPS.

By: T. Pan n, P. Franzon n, V. Srinivas*, M. Nagarajan* & D. Popovic*

author keywords: Floorplanning; Chip-package co-design
TL;DR: A new floorplanning solution based on a novel floorplan model that more closely depicts the design challenges imposed by modern SoC system constraints is presented. (via Semantic Scholar)
UN Sustainable Development Goal Categories
11. Sustainable Cities and Communities (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: January 2, 2024

2023 conference paper

Thermal Cycling and Fatigue Life Analysis of a Laterally Conducting GaN-based Power Package

2023 IEEE International 3D Systems Integration Conference (3DIC). Presented at the 2023 IEEE International 3D Systems Integration Conference (3DIC).

By: P. Zaghari n, S. Sinha n, J. Ryu n, P. Franzon n & D. Hopkins n

Event: 2023 IEEE International 3D Systems Integration Conference (3DIC)

author keywords: GaN power module; thermal reliability; mechanical stress; fatigue life prediction; finite element analysis
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries, Crossref
Added: July 3, 2023

2023 article

Thermal Estimation for 3D-ICs through Generative Networks

2023 IEEE INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE, 3DIC.

By: P. Kashyap n, P. Ravichandiran n, L. Wang*, D. Baron n, C. Wong n, T. Wu n, P. Franzon n

author keywords: 3DIC; thermal; generative; GAN; hybrid-bonding
TL;DR: This paper presents a generative approach for modeling the power to heat dissipation for a 3DIC and shows that, given the power map, the model can generate the resultant heat for the bulk, opening the door for thermally aware floorplanning. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: August 14, 2023

2022 journal article

Design Obfuscation Through 3-D Split Fabrication With Smart Partitioning

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 30(9), 1230–1243.

author keywords: Split-manufacturing; partitioning; design obfuscation; hybrid bonding; 3-D integrated circuit (3DIC)
TL;DR: The results show that it should take more than 10 years to reconstruct the netlist using a brute-force attack if an adversary obtains either the fabricated wafers or their GDS. (via Semantic Scholar)
Sources: ORCID, Web Of Science, NC State University Libraries
Added: August 15, 2022

2022 article

FAXID: FPGA-Accelerated XGBoost Inference for Data Centers using HLS

2022 IEEE 30TH INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM 2022), pp. 113–121.

By: A. Gajjar n, P. Kashyap n, A. Aysu n, P. Franzon n, S. Dey* & C. Cheng*

TL;DR: An FPGA-based XGBoost accelerator designed with High-Level Synthesis (HLS) tools and design flow accelerating binary classification inference is showcased, showing a latency speedup of the proposed design over state-of-art CPU and GPU implementations, including energy efficiency and cost-effectiveness. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries, ORCID
Added: October 11, 2022

2022 journal article

Hardware Implementation of Hierarchical Temporal Memory Algorithm

ACM JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING SYSTEMS, 18(1).

By: W. Li n, P. Franzon n, S. Dey n & J. Schabel n

author keywords: Hierarchical temporal memory (HTM); ASIC design; distributed memory; KTH benchmark
TL;DR: Hierarchical temporal memory is an un-supervised machine learning algorithm that can learn both spatial and temporal information of input that has been successfully applied to multiple areas. (via Semantic Scholar)
Source: Web Of Science
Added: January 23, 2023

2022 article

High Dimensional Optimization for Electronic Design

MLCAD '22: PROCEEDINGS OF THE 2022 ACM/IEEE 4TH WORKSHOP ON MACHINE LEARNING FOR CAD (MLCAD), pp. 153–157.

By: Y. Wen n, J. Dean n, B. Floyd n & P. Franzon n

author keywords: Electronic Design Automation (EDA); High Dimensions; Bayesian Optimization; Random Embeddings; Local Inspection; Analog Circuits
TL;DR: IC-REMBO improves the effectiveness and efficiency of the Random EMbedding Bayesian Optimization (REMBO) approach, which is a state-of-the-art high dimensional optimization method and is the first time applying REMBO or inspection method to electronic design. (via Semantic Scholar)
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries
Added: October 31, 2022

2022 article

Modeling of Adaptive Receiver Performance Using Generative Adversarial Networks

IEEE 72ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2022), pp. 1958–1963.

By: P. Kashyap n, Y. Choi*, S. Dey*, D. Baron n, C. Wong n, T. Wu n, C. Cheng*, P. Franzon n

author keywords: SerDes; receiver; behavior modeling; adaptive; generative; GAN; DFE; IBIS-AMI
TL;DR: A data-driven approach to modeling a high-speed serializer/deserializer (SerDes) receiver through generative adversarial networks (GANs) through the use of a discriminator structure that improves the training to generate a contour plot that makes it difficult to distinguish the ground truth. (via Semantic Scholar)
UN Sustainable Development Goal Categories
10. Reduced Inequalities (OpenAlex)
Sources: Web Of Science, NC State University Libraries, ORCID
Added: September 19, 2022

2022 article

RxGAN: Modeling High-Speed Receiver through Generative Adversarial Networks

MLCAD '22: PROCEEDINGS OF THE 2022 ACM/IEEE 4TH WORKSHOP ON MACHINE LEARNING FOR CAD (MLCAD), pp. 167–172.

By: P. Kashyap n, A. Gajjar n, Y. Choi*, C. Wong n, D. Baron n, T. Wu n, C. Cheng*, P. Franzon n

Contributors: P. Kashyap n

author keywords: SerDes; receiver; behavior modeling; adaptive; generative; measurement; GAN; DFE; IBIS-AMI
TL;DR: This work proposes a data-driven approach using generative adversarial training to model a real-world receiver with varying DFE and CTLE configurations while handling different channel conditions and bitstreams. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries, ORCID
Added: October 31, 2022

2021 journal article

2Deep: Enhancing Side-Channel Attacks on Lattice-Based Key-Exchange via 2-D Deep Learning

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 40(6), 1217–1229.

By: P. Kashyap n, F. Aydin n, S. Potluri n, P. Franzon n & A. Aysu n

author keywords: Resistance; Performance evaluation; Deep learning; Protocols; Power measurement; Side-channel attacks; NIST; Cross-device; data-augmentation; deep learning (DL); lattice-based key-exchange protocols; power side channels
TL;DR: 2Deep—a deep-learning (DL)-based SCA—targeting parallelized implementations of PQKE protocols, namely, Frodo and NewHope with data augmentation techniques are proposed, exploring approaches that convert 1-D time-series power measurement data into 2-D images to formulate SCA an image recognition task. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries, ORCID
Added: June 10, 2021

2021 journal article

A 125 mu m x 245 mu m Mainly Digital UHF EPC Gen2 Compatible RFID Tag in 55 nm CMOS Process

IEEE JOURNAL OF RADIO FREQUENCY IDENTIFICATION, 5(3), 317–323.

By: K. Bhanushali n, W. Zhao n, W. Pitts n & P. Franzon n

author keywords: UHF Gen2 RFID; passive; chip asset tracking; obscuration; RF-only
TL;DR: This paper presents a compact and largely digital UHF EPC Gen2-compatible RFID implemented using digital IP blocks that are easily portable and suitable for cost-sensitive applications, and as embedded RFIDs for tagging counterfeit Integrated Circuits. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (Web of Science; OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: September 13, 2021

2021 article

A Review of 3D-Dynamic Random-Access Memory based Near-Memory Computation

2021 IEEE INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE (3DIC).

By: P. Ravichandiran n & P. Franzon n

author keywords: near-memory computation; hardware accelerators; neural network; processing-in-memory; survey; 3D-IC; memory accelerator; comparison; hybrid-memory-cube
TL;DR: This paper analyzes a few critical NMC architecture implementations, specifically those with 3D-Stacked DRAM memory, and organized a literature review across structures, configuration, application, performance metrics, and present challenges and opportunities. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: May 2, 2022

2021 journal article

A Scalable Cluster-based Hierarchical Hardware Accelerator for a Cortically Inspired Algorithm

ACM JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING SYSTEMS, 17(4).

By: S. Dey n, L. Baker n, J. Schabel n, W. Li n & P. Franzon n

author keywords: Neuromorphic computing; accelerator; cortical processor; hierarchical temporal memory; sparse distributed memory
TL;DR: A scalable, configurable and cluster-based hierarchical hardware accelerator through custom hardware architecture for Sparsey, a cortical learning algorithm inspired by the operation of the human cortex that uses a Sparse Distributed Representation to enable unsupervised learning and inference in the same algorithm. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: February 28, 2022

2021 article

Design Benefits of Hybrid Bonding for 3D Integration

IEEE 71ST ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2021), pp. 1876–1881.

By: T. Nigussie*, T. Pan n, S. Lipa n, W. Pitts n, J. DeLaCruz* & P. Franzon n

author keywords: 3DIC; Hybrid bonding; DBI; Thermo-Compression Bonding; Partitioning; 3D design flow
TL;DR: Electrical and thermal analyses of 3D digital designs using hybrid bonding, specifically using the design rules, and other properties, for the XPERI DBI® technology at a $\mathrm{1.6}\ \mu \ mathrm{m}$ pad pitch are presented. (via Semantic Scholar)
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries
Added: November 1, 2021

2021 article

Design for 3D Stacked Circuits

2021 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM).

By: P. Franzon n, W. Davis n, E. Rotenberg n, J. Stevens n, S. Lipa n, T. Nigussie n, H. Pan n, L. Baker n ...

TL;DR: 2.5D and 3D technologies can give rise to a node equivalent of scaling due to improved connectivity because of improved connectivity, but design issues that need to be addressed in pursuing such exploitations include thermal management, design for test and computer aided design. (via Semantic Scholar)
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries
Added: July 11, 2022

2021 article

Fast and Accurate PPA Modeling with Transfer Learning

2021 ACM/IEEE 3RD WORKSHOP ON MACHINE LEARNING FOR CAD (MLCAD).

By: L. Francisco n, P. Franzon n & W. Davis n

author keywords: PPA; Machine Learning; Power; Performance; Area; Gradient Boost; Neural Network; Transfer Learning
TL;DR: This work presents a machine learning approach using gradient boost models and neural networks to fast and accurately predict the power, performance, and area of a System-on-Chip (SoC) by reducing the number of samples used to create the models. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: November 15, 2021

2021 conference paper

Fast and Accurate PPA Modeling with Transfer Learning

2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD). Presented at the 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD), Munich, Germany.

By: W. Davis n, P. Franzon n, L. Francisco n, B. Huggins n & R. Jain*

Event: 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD) at Munich, Germany on November 1-4, 2021

author keywords: PPA; Machine Learning; Power; Performance; Area; Gradient Boost; Neural Network; Transfer Learning; Surrogate Modeling
TL;DR: The approach reached the same PPA solution as human designers in the same or fewer runs for a CORTEX-M0 system design, showing potential for automating the recipe optimization without needing more runs than a human designer would need. (via Semantic Scholar)
UN Sustainable Development Goal Categories
9. Industry, Innovation and Infrastructure (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: February 21, 2022

2021 article

High Speed Receiver Modeling Using Generative Adversarial Networks

IEEE 30TH CONFERENCE ON ELECTRICAL PERFORMANCE OF ELECTRONIC PACKAGING AND SYSTEMS (EPEPS 2021).

By: P. Kashyap*, W. Pitts, D. Baron n, C. Wong*, T. Wu* & P. Franzon*

author keywords: eye diagram; IBIS-AMI; generative model; generative adversarial network; GAN; receiver
TL;DR: The model is not built with domain knowledge but learned from a wide range of channel conditions and input bitstreams to generate an eye diagram, and a neural network model is developed to evaluate the generated eye diagram's relevant characteristics, such as eye height and width. (via Semantic Scholar)
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries
Added: March 21, 2022

2021 article

Multi-ANN embedded system based on a custom 3D-DRAM

2021 IEEE INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE (3DIC).

By: L. Baker n, R. Patti & P. Franzon n

author keywords: machine learning; embedded system; Deep Neural Networks (DNNs); CNN; neural network; LSTM; MLP
TL;DR: This work demon-strates how a customized 3D-DRAM with a very wide databus can be combined with application-specific layers to produce a system meeting the requirements of embedded systems employing multiple instances of disparate ANNs. (via Semantic Scholar)
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries
Added: May 2, 2022

2020 article

Application of Quantum Machine Learning to VLSI Placement

PROCEEDINGS OF THE 2020 ACM/IEEE 2ND WORKSHOP ON MACHINE LEARNING FOR CAD (MLCAD '20), pp. 61–66.

By: I. Turtletaub n, G. Li n, M. Ibrahim n & P. Franzon n

author keywords: Quantum Machine Learning; Balanced Min-Cut; Variational Quantum Eigensolver; Recursive Partitioning Placement
TL;DR: The Variational Quantum Eigensolver (VQE) is used to formulate a recursive Balanced Min-Cut (BMC) algorithm, and it is suggested that quantum machine learning techniques can lower error rates and allow for faster convergence to an optimal solution. (via Semantic Scholar)
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries
Added: August 16, 2021

2020 journal article

Asymmetric Transformer Design With Multiband Frequency Response for Simultaneous Power and Data Transfer

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 10(4), 644–653.

By: N. Zannat n & P. Franzon n

author keywords: Frequency response; Passband; Bandwidth; Mathematical model; Connectors; Inductors; Data transfer; Asymmetric transformer design; communication on wireless power transfer (WPT) link; inductive power transfer; inductively coupled channel
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (Web of Science; OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: April 27, 2020

2020 article

CTLE Adaptation Using Deep Learning in High-speed SerDes Link

2020 IEEE 70TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2020), pp. 952–955.

By: B. Li n, B. Jiao*, C. Chou*, R. Mayder* & P. Franzon n

author keywords: receiver; CTLE; adaptation; deep neural networks; high- correlation; fast
TL;DR: This research focuses on building a model for high-speed SerDes receiver CTLE adaptation behavior, which has a fast simulation speed and high-precision prediction. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: March 8, 2021

2020 article

Design Rule Checking with a CNN Based Feature Extractor

PROCEEDINGS OF THE 2020 ACM/IEEE 2ND WORKSHOP ON MACHINE LEARNING FOR CAD (MLCAD '20), pp. 9–14.

By: L. Francisco n, T. Lagare n, A. Jain n, S. Chaudhary n, M. Kulkarni n, D. Sardana n, W. Davis n, P. Franzon n

author keywords: Design Rule Checking; Machine Learning; IC Verification; Design for Manufacturing; Convolutional Neural Network; Deep Learning
TL;DR: The proof of feasibility for a fast interactive DRC engine that could be used during layout is established and the proposed model consists of a convolutional neural network trained to detect DRC violations. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: August 16, 2021

2020 article

Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk

2020 IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED-DESIGN (ICCAD).

By: F. Regazzoni*, S. Bhasin*, A. Pour*, I. Alshaer*, F. Aydin n, A. Aysu n, V. Beroulle*, G. Di Natale* ...

author keywords: machine learning; hardware security
TL;DR: Novel applications of machine learning for hardware security, such as evaluation of post quantum cryptography hardware and extraction of physically unclonable functions from neural networks and practical model extraction attack based on electromagnetic side-channel measurements are demonstrated. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: August 30, 2021

2020 journal article

Multi-Fidelity Surrogate-Based Optimization for Electromagnetic Simulation Acceleration

ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, 25(5).

By: Y. Wang n, P. Franzon n, D. Smart* & B. Swahn*

author keywords: Statistical machine learning; surrogate-based optimization; multi-fidelity; electromagnetic simulation
TL;DR: In this article, MFSBO-CS has been applied to two design cases, and the result shows that the proposed methodology offers a cost-efficient solution for analog/RF design problems involving EM simulation. (via Semantic Scholar)
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries
Added: November 2, 2020

2020 journal article

Self-Evolution Cascade Deep Learning Model for High-Speed Receiver Adaptation

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 10(6), 1043–1053.

By: B. Li n, B. Jiao n, C. Chou n, R. Mayder n & P. Franzon n

author keywords: Adaptation models; Integrated circuit modeling; Logic gates; Receivers; Deep learning; Data models; Training; Adaptation; behavior; cascade; deep learning; high correlation; IBIS algorithmic modeling interface (IBIS-AMI); modeling; receiver; self-evolution cascade deep learning (SCDL)
TL;DR: The self-evolution cascade deep learning (SCDL) model is proposed to show a parallel approach to effectively modeling adaptive SerDes behavior and uses its own failure experiences to optimize its future solution search according to the prediction of the receiver equalization adaptation trend. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: July 6, 2020

2019 journal article

3-D-DATE: A Circuit-Level Three-Dimensional DRAM Area, Timing, and Energy Model

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 66(2), 756–768.

By: J. Park n, W. Davis n & P. Franzon n

author keywords: Dynamic random access memory (DRAM); area and energy and timing model; circuit level model
TL;DR: 3-D-DATE is presented, a circuit-level dynamic random access memory (DRAM) area, timing, and energy model that models both the front and back end of 3-D integrated DRAM designs from 90–16 nm, across a broader range of emerging transistor devices and through-silicon vias. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: February 18, 2019

2019 journal article

Appliance Identification Algorithm for a Non-Intrusive Home Energy Monitor Using Cogent Confabulation

IEEE Transactions on Smart Grid, 10(1), 714–721.

By: S. Park*, L. Baker n & P. Franzon n

author keywords: Appliance identification; cogent confabulation; monitoring; neural network applications; non-intrusive; energy monitor
TL;DR: This paper presents an appliance identification algorithm for use with a non-intrusive home energy monitor based on a cogent confabulation neural network that showed better performance than the combinatorial optimization and artificial neural network approaches. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries, NC State University Libraries
Added: January 28, 2019

2019 book

Handbook of 3D Integration: Design, Test, and Thermal Management

Paul Franzon

Ed(s): P. Franzon, E. Jan Marinissen & M. S. Bakir

UN Sustainable Development Goal Categories
9. Industry, Innovation and Infrastructure (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: February 5, 2022

2018 chapter

3D Design Styles

In P. Franzon, E. Martissen, & M. Bakir (Eds.), 3D Handbook Design and Test. Wiley.

By: P. Franzon

Ed(s): P. Franzon, E. Martissen & M. Bakir

Source: NC State University Libraries
Added: March 20, 2019

2018 chapter

3D Integration: Technology and Design

In K. Sakuma (Ed.), 3D Integration in VLSI Circuits.

By: P. Franzon

Ed(s): K. Sakuma

Source: NC State University Libraries
Added: March 9, 2019

2018 book

3DIC Handbook Design and Test

Wiley.

Paul Franzon

Ed(s): P. Franzon, E. Martissen & M. Bakir

Source: NC State University Libraries
Added: March 9, 2019

2018 chapter

Electronic Design Automaton for 3D

In P. Franzon, E. Martissen, & M. Bakir (Eds.), 3D Handbook Design and Test. Wiley.

By: P. Franzon

Ed(s): P. Franzon, E. Martissen & M. Bakir

Source: NC State University Libraries
Added: March 9, 2019

2018 journal article

Exploring the Tradeoffs of Application-Specific Processing

IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS, 8(3), 531–542.

By: J. Schabel n & P. Franzon n

author keywords: ASIP; SIMD; CGRA; processing-in-memory; processing-near-memory; HTM; sparsey; artificial neural networks
TL;DR: This work proposes an architecture that combines existing processing schemes utilizing CGRAs for dynamic data path configuration as a means to add flexibility and reusability to data-centric acceleration and presents a CGRA architecture for mapping functional accelerators operating at 500 MHz in 32 nm. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: October 16, 2018

2018 journal article

On Using the Volatile Mem-Capacitive Effect of TiO2 Resistive Random Access Memory to Mimic the Synaptic Forgetting Process

JOURNAL OF ELECTRONIC MATERIALS, 47(2), 994–997.

By: B. Sarkar n, S. Mills n, B. Lee n, W. Pitts n, V. Misra n & P. Franzon n

author keywords: RRAM; TiO2; synapse; neuromorphic systems; volatile memory
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2017 journal article

Corrections to “Crosstalk-Canceling Multimode Interconnect Using Transmitter Encoding”[ Aug 13 1562-1567]

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 25(5), 1792–1792.

By: H. Kim n, C. Won n & P. Franzon n

TL;DR: It is difficult to find correct references in the currently published paper due to the reference discords. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 9, 2019

2017 conference paper

H3 (heterogeneity in 3D): A logic-on-logic 3D-stacked heterogeneous multi-core processor

2017 IEEE International Conference on Computer Design (ICCD), 145–152.

By: V. Srinivasan n, R. Chowdhury*, E. Forbes*, R. Widialaksono*, Z. Zhang*, J. Schabel n, S. Ku*, S. Lipa n ...

Event: 2017 IEEE International Conference on Computer Design (ICCD) at Boston, MA on November 5-8, 2017

TL;DR: The H3 chip is presented, that uses 3D die stacking and novel microarchitecture to implement a heterogeneous multi-core processor (HMP) with low-latency fast thread migration capabilities and can reduce power consumption of benchmarks by up to 26%. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2016 journal article

A Generally Applicable Calibration Algorithm for Digitally Reconfigurable Self-Healing RFICs

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 24(3), 1151–1164.

By: E. Wyers n, M. Morton*, T. Sollner*, C. Kelley n & P. Franzon n

author keywords: Calibration; digitally reconfigurable radio frequency integrated circuits (RFICs); Hooke-Jeeves algorithm; Nelder-Mead algorithm; self-healing
TL;DR: It is shown that the proposed hybrid Nelder-Mead and Hooke-Jeeves calibration algorithm is capable of reducing the gain error and phase error of the phase rotator output to less than a maximum of 0.5 dB and 2° relative to the chosen gain and phase targets. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries, Crossref, NC State University Libraries
Added: August 6, 2018

2016 conference paper

Design and ASIC acceleration of cortical algorithm for text recognition

2016 29th IEEE International System-on-Chip Conference (SOCC). Presented at the 2016 29th IEEE International System-on-Chip Conference (SOCC).

By: S. Dey n & P. Franzon n

Event: 2016 29th IEEE International System-on-Chip Conference (SOCC)

TL;DR: The aim of the work reported in this paper was to design and implement an application specific integrated circuit (ASIC) having a massive speedup of a cortical algorithm, as compared with a CPU baseline. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2016 conference paper

Design of a rectifier-free UHF Gen-2 compatible RFID Tag using RF-only logic

2016 IEEE International Conference on RFID (RFID). Presented at the 2016 IEEE International Conference on RFID (RFID).

By: W. Zhao n, K. Bhanushali n & P. Franzon n

Event: 2016 IEEE International Conference on RFID (RFID)

TL;DR: This work shows that AC-DC rectifier and storage capacitors take up 25% or more of chip area for cost-sensitive passive RFID tags and can be eliminated by utilizing a RF-only circuit structure, which would be smaller and cheaper. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2016 conference paper

Hardware implementation of Hierarchical Temporal Memory algorithm

2016 29th IEEE International System-on-Chip Conference (SOCC). Presented at the 2016 29th IEEE International System-on-Chip Conference (SOCC).

By: W. Li n & P. Franzon n

Event: 2016 29th IEEE International System-on-Chip Conference (SOCC)

TL;DR: A hardware ASIC implementation of the Numenta Hierarchical Temporal Memory (HTM) algorithm is presented, and compared to the performance of a software implementation on the 4 threads CPU, the ASIC version provides a 329.6× speedup in learning mode. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2016 conference paper

Machine learning in physical design

2016 IEEE 25th Conference on Electrical Performance Of Electronic Packaging And Systems (EPEPS). Presented at the 2016 IEEE 25th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS).

By: B. Li n & P. Franzon n

Event: 2016 IEEE 25th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)

TL;DR: Surrogate Modeling is implemented to predict results after GR in Physical Design and machine learning models for predicting Detailed Route (DR) results using Global Route (GR) results are discussed. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2016 journal article

Multimode High-Density Link Design Methodology and Implementation

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 6(8), 1251–1260.

By: Z. Yan*, K. Aygun*, H. Braunisch* & P. Franzon n

author keywords: Codesign methodology; crosstalk mitigation; high-density links; modal signaling; multimode signaling; S-parameters
TL;DR: This paper presents a design methodology for designing practical nonuniform high density links using multimode signaling and significantly improves the ability to design high-density low-crosstalk interconnect subsystems in practical scenarios. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2016 conference paper

Novel packaging and thermal measurement for 3D heterogeneous stacks

2016 International Symposium on 3D Power Electronics Integration and Manufacturing (3D-PEIM). Presented at the 2016 International Symposium on 3D Power Electronics Integration and Manufacturing (3D-PEIM), Raleigh, NC.

By: T. Harris*, W. Davis* & P. Franzon*

Event: 2016 International Symposium on 3D Power Electronics Integration and Manufacturing (3D-PEIM) at Raleigh, NC on June 13-15, 2016

Sources: Crossref, NC State University Libraries, NC State University Libraries
Added: March 24, 2019

2016 conference paper

Physical design of a 3D-stacked heterogeneous multi-core processor

2016 IEEE International 3D Systems Integration Conference (3DIC). Presented at the 2016 IEEE International 3D Systems Integration Conference (3DIC), -San Francisco, CA.

By: R. Widialaksono n, R. Basu Roy Chowdhury n, Z. Zhang n, J. Schabel n, S. Lipa n, E. Rotenberg n, W. Rhett Davis, P. Franzon n

Event: 2016 IEEE International 3D Systems Integration Conference (3DIC) at -San Francisco, CA on November 8-11, 2016

TL;DR: This paper presents a 3D-SIC physical design methodology for a multi-core processor using commercial off-the-shelf tools and indicates an order of magnitude decrease in wirelengths for critical inter-core components in the 3D implementation compared to 2D implementations. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries, NC State University Libraries
Added: March 24, 2019

2016 conference paper

Processor-in-memory support for artificial neural networks

2016 IEEE International Conference on Rebooting Computing (ICRC). Presented at the 2016 IEEE International Conference on Rebooting Computing (ICRC).

By: J. Schabel n, L. Baker n, S. Dey n, W. Li n & P. Franzon n

Event: 2016 IEEE International Conference on Rebooting Computing (ICRC)

TL;DR: This work presents a custom processor solution to accelerate two hetero-associative memories capable of unsupervised and one-hot learning and results in up to a 20× speedup and a 2000× reduction in energy per frame compared to a software implementation operating on a dataset for recognition of human actions. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2016 conference paper

RDL and interposer design for DiRAM4 interfaces

2016 IEEE 25th Conference on Electrical Performance Of Electronic Packaging And Systems (EPEPS). Presented at the 2016 IEEE 25th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS).

By: T. Nigussie n & P. Franzon n

Event: 2016 IEEE 25th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)

Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2016 conference paper

Thermal raman and IR measurement of heterogeneous integration stacks

2016 15th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm), 1505–1510.

By: T. Harris n, G. Pavlidis*, E. Wyers*, D. Newberry n, S. Graham*, P. Franzon n, W. Davis n

Event: 2016 15th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm) at Las Vegas, NV on May 31 - June 3, 2016

Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2015 journal article

A Multitier Study on Various Stacking Topologies of TSV-Based PDN Systems Using On-Chip Decoupling Capacitor Models

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 5(4), 541–550.

By: G. Charles n & P. Franzon n

author keywords: Back-to-back (B2B); face-to-back (F2B); face-to-face (F2F); on-chip decoupling capacitors; power distribution network (PDN); segmentation method; through silicon via (TSV)
TL;DR: The PDN impedance noise of F2F chip stacking is found to be relatively lower than F2B and B2B chip stacking topologies, and a metal-insulator-metal capacitor model written as a complex impedance equation is presented. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2015 conference paper

Characterization of the Mechanical Stress Impact on Device Electrical Performance in the CMOS and III-V HEMT/HBT Heterogeneous Integration Environment

Proceedings Gomactech 2015.

By: E. Wyers, T. Harris, J. Massad & P. Franson

Source: NC State University Libraries
Added: April 11, 2019

2015 conference paper

Characterization of the mechanical stress impact on device electrical performance in the CMOS and III–V HEMT/HBT heterogeneous integration environment

2015 International 3D Systems Integration Conference (3DIC). Presented at the 2015 International 3D Systems Integration Conference (3DIC).

By: E. Wyers*, T. Harris n, W. Pitts n, J. Massad* & P. Franzon n

Event: 2015 International 3D Systems Integration Conference (3DIC)

TL;DR: Measurements from a partial heterogeneous integration fabrication run will be presented to provide insight into how the backside source vias, alternatively referred to as through-silicon-carbide vias (TSCVs), used within the heterogeneous Integration environment impacts GaN HEMT device-level DC performance. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2015 chapter

Chip Package Codesign

In L. Scheffer, L. Lavagno, & G. Martin (Eds.), The Handbook for EDA of Electronic Circuits (Second). CRC Press.

By: P. Franzon & M. Swaminathan

Ed(s): L. Scheffer, L. Lavagno & G. Martin

Source: NC State University Libraries
Added: March 9, 2019

2015 conference paper

Computing in 3D

2015 IEEE Custom Integrated Circuits Conference (CICC). Presented at the 2015 IEEE Custom Integrated Circuits Conference - CICC 2015.

By: P. Franzon n, E. Rotenberg n, J. Tuck n, W. Davis n, H. Zhou n, J. Schabel n, Z. Zhang n, J. Dwiel n ...

Event: 2015 IEEE Custom Integrated Circuits Conference - CICC 2015

TL;DR: 3D technologies offer significant potential to improve total performance and performance per unit of power, and the next frontier is to create sophisticated logic on logic solutions that promise further increases in performance/power beyond those attributable to memory interfaces alone. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2015 conference paper

Computing in 3D

2015 International 3D Systems Integration Conference (3DIC). Presented at the 2015 International 3D Systems Integration Conference (3DIC), Sendai, Japan.

By: P. Franzon n, E. Rotenberg n, W. Davis n, J. Tuck n, W. Davis n, H. Zhou n, J. Schabel n, Z. Zhang n ...

Event: 2015 International 3D Systems Integration Conference (3DIC) at Sendai, Japan on August 31 - September 2, 2015

TL;DR: The concept of Fast Thread Migration using 3DIC technologies is introduced and the design of a power optimized SIMD unit in which over half of the power is employed in the FP units is presented. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries, NC State University Libraries
Added: March 24, 2019

2015 conference paper

Defense Applications of 3DIC

Proceedings Gomactech 2015.

By: P. Franzon

Source: NC State University Libraries
Added: April 14, 2019

2015 chapter

Optimization for Self-Calibrating Circuits

In Semiconductor Devices in Harsh Conditions. CRC.

By: E. Wyers, T. Kelley & P. Franzon

Source: NC State University Libraries
Added: March 9, 2019

2015 conference paper

Thermal simulation of heterogeneous GaN/ InP/silicon 3DIC stacks

2015 International 3D Systems Integration Conference (3DIC), 1–3.

By: T. Harris n, E. Wyers*, L. Wang*, S. Graham*, G. Pavlidis*, P. Franzon n, W. Davis n

Event: 2015 International 3D Systems Integration Conference (3DIC) at Sendai, Japan on August 31 - September 2, 2015

TL;DR: Preliminary results are presented which examine the thermal performance of the integration of materials such as GaN, InP, SiGe, and Si and two methods for building up the model of a test chip are compared. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries, NC State University Libraries
Added: March 24, 2019

2014 conference paper

3D-enabled customizable embedded computer (3DECC)

2014 International 3D Systems Integration Conference (3DIC). Presented at the 2014 International 3D Systems Integration Conference (3DIC).

By: P. Franzon*, E. Rotenberg, J. Tuck, H. Zhou, W. Davis, H. Dai, J. Huh, S. Ku ...

Event: 2014 International 3D Systems Integration Conference (3DIC)

TL;DR: This paper describes a 3D computer architecture designed to achieve the lowest possible power consumption for “embedded applications” like radar and signal processing and introduces several unique concepts including a low-power SIMD tile, low- power 3D memories, and 3D and 2.5D interconnect that can be tuned at run-time for a specific application. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2014 conference paper

A 0.65 mW/Gbps 30 Gbps capacitive coupled 10 mm serial link in 2.5D silicon interposer

2014 IEEE 23rd Conference on Electrical Performance of Electronic Packaging and Systems. Presented at the 2014 IEEE 23rd Electrical Performance of Electronic Packaging and Systems (EPEPS).

By: M. Karim n & P. Franzon n

Event: 2014 IEEE 23rd Electrical Performance of Electronic Packaging and Systems (EPEPS)

UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2014 journal article

A Generic and Scalable Architecture for a Large Acoustic Model and Large Vocabulary Speech Recognition Accelerator Using Logic on Memory

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 22(12), 2701–2712.

By: O. Bapat n, P. Franzon n & R. Fastow

author keywords: Accelerator; beam search; embedded; hardware software co-design; logic on memory; multipass decoding; N-best; speech recognition; sphinx
TL;DR: A scalable hardware accelerator for speech recognition, which uses a two pass decoding algorithm with word dependent N-best Viterbi Beam Search, which achieves an overall speed up of 4.3X over a 2.4-GHz Intel Core 2 Duo processor running the CMU Sphinx speech recognition software. (via Semantic Scholar)
UN Sustainable Development Goal Categories
4. Quality Education (OpenAlex)
Sources: Web Of Science, NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2014 journal article

Adaptive and Reliable Clock Distribution Design for 3-D Integrated Circuits

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 4(11), 1862–1870.

By: . Chen n, T. Zhu n, W. Davis n & P. Franzon n

author keywords: 3-D integrated circuit (3-D IC); adaptive; clock distribution; deskew; optimization; process-voltage-temperature (PVT) variation; stacking; thermal profile; through-silicon-via (TSV); tunable-delay-buffer (TDB)
TL;DR: A novel active deskew technique to adaptively mitigate the cross-tier variations and the 3-D wiring asymmetry is proposed and a thermal profile-based optimization flow is developed to further improve the power efficiency and reduce design overhead. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2014 conference paper

Advances in TSVs and 3D interconnects

2014 IEEE 23rd Conference on Electrical Performance of Electronic Packaging and Systems. Presented at the 2014 IEEE 23rd Electrical Performance of Electronic Packaging and Systems (EPEPS).

By: P. Franzon n & S. Grivet-Talocia*

Event: 2014 IEEE 23rd Electrical Performance of Electronic Packaging and Systems (EPEPS)

Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2014 journal article

Dual Floating Gate Unified Memory MOSFET With Simultaneous Dynamic and Non-Volatile Operation

IEEE ELECTRON DEVICE LETTERS, 35(1), 48–50.

By: B. Sarkar n, N. Ramanan n, S. Jayanti n, N. Di Spigna n, B. Lee n, P. Franzon n, V. Misra n

author keywords: Flash memory; floating gate; dynamic memory; MOSFET; FN tunneling; direct tunneling
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2014 conference paper

Leveraging 3D-IC for on-chip timing uncertainty measurements

2014 International 3D Systems Integration Conference (3DIC). Presented at the 2014 International 3D Systems Integration Conference (3DIC).

By: R. Widialaksono n, W. Zhao n, W. Davis n & P. Franzon n

Event: 2014 International 3D Systems Integration Conference (3DIC)

TL;DR: This paper presents a circuit implementation and design flow which realizes high volume on-chip timing measurements for a 2D product die using three-dimensional integration (3D-IC) and focuses on achieving observability at clock sinks which are critical for understanding on- chip timing uncertainty. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2014 journal article

Millimeter-Scale True 3-D Antenna-in-Package Structures for Near-Field Power Transfer

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 4(10), 1574–1581.

By: P. Gadfort n & P. Franzon n

author keywords: Coils; electronics packaging; inductive power transmission; omnidirectional antennas; planar arrays; three-dimensional integrated packaging
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2014 conference paper

Pathfinder3D: A framework for exploring early thermal tradeoffs in 3DIC

2014 IEEE International Conference on IC Design & Technology. Presented at the 2014 IEEE International Conference on IC Design & Technology (ICICDT).

By: S. Priyadarshi n, W. Davis n & P. Franzon n

Event: 2014 IEEE International Conference on IC Design & Technology (ICICDT)

TL;DR: A CAD flow and associated framework called Pathfinder3D is presented, which facilitates physically-aware system-level thermal simulation of 3DICs and facilitates early thermal evaluation of possible 3D design choices and thermal management techniques. (via Semantic Scholar)
Sources: NC State University Libraries, Crossref, NC State University Libraries
Added: August 6, 2018

2014 chapter

Storage Class Memories

In A. Chen, J. Hutchby, V. Zhrinov, & G. Bourianoff (Eds.), Emerging Nanoelectronic Devices. Wiley.

By: G. Burr & P. Franzon

Ed(s): A. Chen, J. Hutchby, V. Zhrinov & G. Bourianoff

Source: NC State University Libraries
Added: March 9, 2019

2014 journal article

Thermal Pathfinding for 3-D ICs

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 4(7), 1159–1168.

By: S. Priyadarshi n, W. Davis n, M. Steer n & P. Franzon n

author keywords: 3-D IC; electronic system-level (ESL); electrothermal simulation; pathfinding; through-silicon via (TSV); transaction-level simulation
TL;DR: A pathfinding flow that integrates SystemC transaction-level electrical and dynamic thermal simulations to pass complex physical constraints to system architects in a convenient form is presented. (via Semantic Scholar)
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2014 conference paper

Thermal effects of heterogeneous interconnects on InP / GaN / Si diverse integrated circuits

2014 International 3D Systems Integration Conference (3DIC). Presented at the 2014 International 3D Systems Integration Conference (3DIC).

By: T. Harris n, P. Franzon n, W. Davis n & L. Wang*

Event: 2014 International 3D Systems Integration Conference (3DIC)

TL;DR: Preliminary results are presented which examine the thermal performance of the DAPRA Diverse Accessible Heterogeneous Integration technology and two methods for building up the model of a test chip are compared. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2013 journal article

A Bounded and Discretized Nelder-Mead Algorithm Suitable for RFIC Calibration

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 60(7), 1787–1799.

By: E. Wyers n, M. Steer n, C. Kelley n & P. Franzon n

author keywords: Calibration; derivative-free optimization; Nelder-Mead direct search algorithm; PLL spurious tone reduction; radio frequency integrated circuit calibration
TL;DR: It is shown that a gradient descent-based algorithm has difficulty in reducing the VCO control line ripple, while the proposed algorithm reduces the relative power of the first harmonic reference spurs by at least 10 dBc and effectively enables design complexity reduction in the supporting analog calibration circuitry. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries, ORCID
Added: August 6, 2018

2013 conference paper

A compact inductively coupled connector for mobile devices

2013 IEEE 63rd Electronic Components and Technology Conference (ECTC), 2385–2390.

By: W. Zhao n, P. Gadfort n, E. Erickson n & P. Franzon n

TL;DR: A nested inductive connector, consisting of a single power channel and one or more data channels, is proposed as replacement for legacy conductive connectors in mobile devices, with advantages include minimized space in the mobile device, waterproofing, orientation independence, and resistance to stress through a breakaway mechanism. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2013 conference paper

Applications and design styles for 3DIC

2013 IEEE International Electron Devices Meeting. Presented at the 2013 IEEE International Electron Devices Meeting (IEDM), Washington, DC.

By: P. Franzon n, E. Rotenberg n, J. Tuck n, W. Davis n, H. Zhou n, J. Schabel n, Z. Zhang n, J. Park n ...

Event: 2013 IEEE International Electron Devices Meeting (IEDM) at Washington, DC on December 9-11, 2013

TL;DR: 3D technologies offer significant potential to improve raw performance and performance per unit power and the next frontier is to create more sophisticated solutions that promise further increases in power/performance beyond those attributable to memory interfaces alone. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries, NC State University Libraries
Added: March 24, 2019

2013 conference paper

Circuit/channel co-design methodology for multimode signaling

2013 IEEE 63rd Electronic Components and Technology Conference (ECTC), 1356–1361.

By: Z. Yan n, P. Franzon n, K. Aygun* & H. Braunisch*

TL;DR: A new circuit/channel co-design methodology for high density links with multimode signaling with over 60% root mean square (RMS) jitter reduction compared with single-ended signaling is presented. (via Semantic Scholar)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2013 journal article

Crosstalk-Canceling Multimode Interconnect Using Transmitter Encoding

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 21(8), 1562–1567.

By: H. Kim n, C. Won n & P. Franzon n

author keywords: Crosstalk cancellation; encoding; modal decomposition; multiconductor transmission; multimode interconnect
TL;DR: A new implementation approach to cancel crosstalk using modal decomposition on a multiconductor transmission bundle is presented, which gives potential for more flexibility, lower power, better scaling, and ease of implementation. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2013 conference paper

Design and test of 2.5D and 3D stacked ICs

2013 IEEE 22nd Conference on Electrical Performance of Electronic Packaging and Systems. Presented at the 2013 IEEE 22nd Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS).

By: P. Franzon n

Event: 2013 IEEE 22nd Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)

TL;DR: This tutorial will discuss the significant opportunities presented by 3DIC in the context of the opportunities and challenges that face the designer. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2013 conference paper

Design of 60 GHz contact less probe system for RDL in passive silicon interposer

2013 ieee international 3d systems integration conference (3dic).

By: E. Suh n & P. Franzon n

TL;DR: A probe design for detecting discontinuities of a redistribution layer (RDL) on TSV silicon interposer using the capacitive coupling effects between two signal traces using a 60 GHz contactless system based on a quarter-wavelength directional coupler. (via Semantic Scholar)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2013 conference paper

Design of controller for L2 cache mapped in Tezzaron stacked DRAM

2013 IEEE International 3D Systems Integration Conference (3DIC). Presented at the 2013 IEEE International 3D Systems Integration Conference (3DIC), San Francisco, CA.

By: N. Tshibangu n, P. Franzon n, E. Rotenberg n & W. Davis n

Event: 2013 IEEE International 3D Systems Integration Conference (3DIC) at San Francisco, CA on October 2-4, 2013

TL;DR: This paper investigates the implementation of such a cache controller using 3-layer 256 MB Tezzaron Octopus stacked DRAM, which provides a fast data access through burst-4 and burst-8 mode and has a low hit latency. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2013 conference paper

Exploring early design tradeoffs in 3DIC

2013 IEEE International Symposium on Circuits and Systems (ISCAS), 545–549.

By: P. Franzon n, S. Priyadarshi n, S. Lipa n, W. Davis n & T. Thorolfsson*

Event: 2013 IEEE International Symposium on Circuits and Systems (ISCAS) at Beijing, China on May 19-23, 2013

TL;DR: This paper explores some of the approaches to creating 3D specific designs and the CAD tools that can help in that exploration, together with early results from a thermal pathfinding tool. (via Semantic Scholar)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2013 conference paper

Face-to-face bus design with built-in self-test in 3D ICS

2013 ieee international 3d systems integration conference (3dic).

By: Z. Zhang n, B. Noia*, K. Chakrabarty* & P. Franzon n

TL;DR: A new teleport-register-file structure and corresponding clock gating and switching techniques to synchronize data across multiple clock domains are proposed and Simultaneous bi-directional transfer is supported and 50% reduction of flip-flops compared with conventional synchronizer design. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2013 conference paper

Hetero(2) 3d integration: A scheme for optimizing efficiency/cost of chip multiprocessors

Proceedings of the fourteenth international symposium on quality electronic design (ISQED 2013), 1–7.

By: S. Priyadarshi n, N. Choudhary n, B. Dwiel n, A. Upreti n, E. Rotenberg n, R. Davis n, P. Franzon n

Event: International Symposium on Quality Electronic Design (ISQED) at Santa Clara, CA on March 4-6, 2013

TL;DR: This work proposes exploiting two complementary forms of heterogeneity to profitably exploit an immature technology for Chip Multiprocessors (CMP): 3D integration facilitates a technology alloy and application and microarchitectural heterogeneity is exploited to compensate for lower efficiency of old-technology cores. (via Semantic Scholar)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2013 conference paper

Investigation of intermediate dielectric for dual floating gate MOSFET

2013 13th Non-Volatile Memory Technology Symposium (NVMTS).

By: B. Sarkar n, S. Jayanti n, N. Spigna n, B. Lee n, V. Misra n & P. Franzon n

UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2013 conference paper

MOOCs, OOCs, flips and hybrids: The new world of higher education

Proceedings ieee international conference on microelectronic systems, 13–13.

By: P. Franzon n

TL;DR: A combination of new teaching methods, tools, and cloud services together with cloud services promises to deliver greater efficiency to higher education with improved teaching outcomes. (via Semantic Scholar)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2013 conference paper

Power comparison of 2D, 3D and 2.5D interconnect solutions and power optimization of interposer interconnects

2013 IEEE 63rd Electronic Components and Technology Conference (ECTC), 860–866.

By: M. Karim n, P. Franzon n & A. Kumar

TL;DR: It was found that power efficiency decreases linearly with the increase of pitch and length of the interposer traces both in one stack and 4 stack die of Wide IO, and optimization of a Back End of the Line (BEOL) 65 nm interposers interface is presented to find maximize power efficiency. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2013 conference paper

Rationale for a 3D heterogeneous multi-core processor

2013 IEEE 31st International Conference on Computer Design (ICCD), 154–168.

By: E. Rotenberg n, B. Dwiel n, E. Forbes n, Z. Zhang n, R. Widialaksono n, R. Chowdhury n, N. Tshibangu n, S. Lipa n ...

Event: 2013 IEEE 31st International Conference on Computer Design (ICCD) at Asheville, NC on October 6-9, 2013

TL;DR: Single-ISA heterogeneous multi-core processors are comprised of multiple core types that are functionally equivalent but microarchitecturally diverse. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries, NC State University Libraries
Added: March 24, 2019

2013 chapter

Simulation and Experimental Characterization of a Unified Memory Device with Two Floating-Gates

In VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design (pp. 217–233).

By: N. Di Spigna n, D. Schinke n, S. Jayanti n, V. Misra n & P. Franzon n

TL;DR: The operation of a novel unified memory device using two floating-gates using dynamic, nonvolatile, and concurrent modes is described through experimental characterization of a fabricated proof-of-concept device and confirmed through simulation. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: September 6, 2020

2013 conference paper

TSV-based, modular and collision detectable face-to-back shared bus design

2013 ieee international 3d systems integration conference (3dic).

By: Z. Zhang n & P. Franzon n

TL;DR: A shared backbone bus solution specially tuned for modular 3DIC post-silicon-stacking that allows multiple parallel TSV-based channels to be placed and shared among various stacked components, which is uniquely supported by the dense connection pitch of the Face-to-back TSV bonding technology. (via Semantic Scholar)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2013 conference paper

Thermal requirements in future 3D processors

2013 IEEE International 3D Systems Integration Conference (3DIC). Presented at the 2013 IEEE International 3D Systems Integration Conference (3DIC).

By: P. Franzon n & A. Bar-Cohen*

Event: 2013 IEEE International 3D Systems Integration Conference (3DIC)

TL;DR: This paper reports on a study in which the projected thermal load of future 3D optimized embedded computers was explored, and the performance, power consumption and area of a reasonably power-efficient 7 nm, 6672 core baseline conventionally packaged design, and 3D alternatives to this design. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, Crossref, NC State University Libraries
Added: August 6, 2018

2013 article

Variation-Aware Circuit Macromodeling and Design Based on Surrogate Models

SIMULATION AND MODELING METHODOLOGIES, TECHNOLOGIES AND APPLICATIONS, Vol. 197, pp. 255–269.

By: T. Zhu n, M. Yelten n, M. Steer n & P. Franzon n

author keywords: Surrogate Modeling; Macromodel; Variation-Aware; Circuit; Device Model; Design Exploration; IO Buffer
TL;DR: A new variation-aware IO buffer macromodel is developed by integrating surrogate modeling and a physically-based model structure that provides both good accuracy and scalability for signal integrity analysis. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2012 conference paper

A 10.35 mW/GFlop Stacked SAR DSP unit using fine-grain partitioned 3D integration

2012 ieee custom integrated circuits conference (cicc).

By: T. Thorolfsson n, S. Lipa n & P. Franzon n

TL;DR: This paper shows how this technique was used to build the first fine-grain partitioned 3D integrated system to be demonstrated with silicon measurements in the literature, which is an ultra efficient floating-point synthetic aperture radar (SAR) DSP processing unit. (via Semantic Scholar)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2012 journal article

A Transient Electrothermal Analysis of Three-Dimensional Integrated Circuits

IEEE Trans CPMT, P(99), 1.

By: T. Harris*, S. Priyadarshi*, S. Melamed*, C. Ortega, R. Manohar, S. Dooley, N. Kriplani*, W. Davis* ...

author keywords: 3DIC; electrothermal effects; thermal management; transient analysis
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2012 journal article

A compact dielectric elastomer tubular actuator for refreshable Braille displays

SENSORS AND ACTUATORS A-PHYSICAL, 179, 151–157.

By: P. Chakraborti n, H. Toprakci n, P. Yang n, N. Di Spigna n, P. Franzon n & T. Ghosh n

author keywords: Electroactive polymers; Dielectric elastomer actuator; Braille display actuators; Refreshable Braille display
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2012 conference paper

A novel double floating-gate unified memory device

2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC). Presented at the 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC).

By: N. Di Spigna n, D. Schinke n, S. Jayanti n, V. Misra n & P. Franzon n

Event: 2012 IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC)

UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2012 conference paper

An analysis of subthreshold SRAM bitcells for operation in low power RF-only technologies

2012 IEEE subthreshold microelectronics conference (SUBVT).

By: J. Ledford n, P. Gadfort n & P. Franzon n

TL;DR: An in-depth study and comparison of subthreshold SRAM bitcells has been conducted to analyze how such memories will function in a subth threshold RF-only regime without the need for RF-DC conversion. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2012 journal article

Analog Negative-Bias-Temperature-Instability Monitoring Circuit

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 12(1), 177–179.

By: M. Yelten n, P. Franzon n & M. Steer n

author keywords: Amplifier; analog circuits; negative-bias temperature instability (NBTI); reliability; sensor
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2012 journal article

Comparing Through-Silicon-Via (TSV) Void/Pinhole Defect Self-Test Methods

JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 28(1), 27–38.

By: Y. Lou n, Z. Yan n, F. Zhang n & P. Franzon n

author keywords: TSV; 3D stacking yield; On-chip capacitor bridge; Test-before-stacking
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2012 conference paper

Comparison of TSV-based PDN-design effects using various stacking topology methods

Ieee conference on electrical performance of electronic packaging and, 83–86.

By: G. Charles n & P. Franzon n

Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2012 journal article

Comparison of modeling techniques in circuit variability analysis

INTERNATIONAL JOURNAL OF NUMERICAL MODELLING-ELECTRONIC NETWORKS DEVICES AND FIELDS, 25(3), 288–302.

By: M. Yelten n, P. Franzon n & M. Steer n

author keywords: artificial neural network; digital circuit; drain current; Kriging; least-squares support vector machine; surrogate modeling; variability Analysis; XOR
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2012 conference paper

Coordinating 3D designs: Interface IP, standards or free form?

2011 IEEE International 3D Systems Integration Conference (3DIC), 2011 IEEE International. Presented at the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan.

By: P. Franzon n, W. Davis n, Z. Zhou n, S. Priyadarshi n, M. Hogan*, T. Karnik*, G. Srinavas*

Event: 2011 IEEE International 3D Systems Integration Conference (3DIC) at Osaka, Japan on January 31 - February 2, 2011

TL;DR: This paper proposes that 3D chip stack management should be managed through an Interface IP approach Design blocks with associated properties that not only supports signaling and power delivery but also constraints that must be managed between chips both during design but also in-situ and as part of physical verification. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries, NC State University Libraries
Added: March 24, 2019

2012 journal article

Demystifying Surrogate Modeling for Circuits and Systems

IEEE Circuits and Systems Magazine, 12(1), 45–63.

By: M. Yelten n, T. Zhu n, S. Koziel*, P. Franzon n & M. Steer n

TL;DR: The important point is that surrogate modeling has a solid mathematical basis leading to what has become a dramatic increase in the ability to develop engineering models and to engineer systems. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 9, 2019

2012 conference paper

Design, modeling, and fabrication of mm(3) three-dimensional integrated antennas

2012 IEEE 62nd Electronic Components and Technology Conference (ECTC), 1794–1799.

By: P. Gadfort n & P. Franzon n

UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2012 journal article

Dynamic electrothermal simulation of three-dimensional integrated circuits using standard cell macromodels

IET Circuits, Devices & Systems, 6(1), 35.

By: S. Priyadarshi n, T. Harris n, S. Melamed n, C. Otero*, N. Kriplani n, C. Christoffersen*, R. Manohar*, S. Dooley* ...

TL;DR: The macromodel-based methodology enables robust and significantly faster dynamic electrothermal simulation over the long times required for thermal transients to subside and results in significant speed-up over transistor-level simulation for large-scale circuits. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries, NC State University Libraries
Added: March 9, 2019

2012 journal article

Junction-level thermal analysis of 3-D integrated circuits using high definition power blurring

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 31(5), 676–689.

TL;DR: This paper presents a resistive mesh-based approach that improves on the fidelity of prior approaches by constructing a thermal model of the full structure of 3DICs, including the interconnect, and introduces a method for dividing the thermal response caused by a heat load into a high fidelity “near response” and a lower fidelity” in order to implement Power Blurring high definition (HD). (via Semantic Scholar)
UN Sustainable Development Goal Categories
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2012 conference paper

Near threshold RF-only analog to digital converter

2012 IEEE subthreshold microelectronics conference (SUBVT).

By: P. Gadfort n & P. Franzon n

TL;DR: This paper describes an analog-to-digital converter capable of operating in a RF-only circuit topology, comprised of a cross-coupled pair of inverters, which act as the comparator for the ADC. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2012 journal article

Parallel Transient Simulation of Multiphysics Circuits Using Delay-Based Partitioning

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 31(10), 1522–1535.

By: S. Priyadarshi n, C. Saunders*, N. Kriplani n, H. Demircioglu n, W. Davis n, P. Franzon n, M. Steer n

author keywords: Delay element; electrothermal simulation; multicore; multiphysics; parallel simulation; parallelization; transient simulation
TL;DR: A parallel delay-based iterative approach for interfacing delay-partitioned subcircuits is applied, which achieves the reasonable accuracy of nonparallel circuit simulation if both incorporate the same interblock delay. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2012 conference paper

Pathfinder 3D: A flow for system-level design space exploration

2011 IEEE International 3D Systems Integration Conference (3DIC), 2011 IEEE International. Presented at the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan.

By: S. Priyadarshi n, J. Hu n, W. Choi n, S. Melamed n, X. Chen n, W. Davis n, P. Franzon n

Event: 2011 IEEE International 3D Systems Integration Conference (3DIC) at Osaka, Japan on January 31 - February 2, 2011

TL;DR: A flow for fast system-level exploration useful for path finding studies and a free open source design kit compiler, FreePDK3D45, and a tool for fast floorplan evaluation of TSV-based digital architectures, Pathfinder3D. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries, NC State University Libraries
Added: March 24, 2019

2012 conference paper

Process mismatch analysis based on reduced-order models

2012 13th international symposium on quality electronic design (isqed), 648–655.

By: M. Yelten n, P. Franzon n & M. Steer n

TL;DR: It is shown that in a cascode current mirror the variability of the reference current can be reduced by ensuring that the same rail transistors experience similar variations, as well as the variations of the effective channel length and intrinsic threshold voltage. (via Semantic Scholar)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2012 conference paper

S-parameter based multimode signaling

Ieee conference on electrical performance of electronic packaging and, 11–14.

By: Z. Yan n, C. Won n, P. Franzon n, K. Aygun* & H. Braunisch*

Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2012 journal article

Surrogate Model-Based Self-Calibrated Design for Process and Temperature Compensation in Analog/RF Circuits

IEEE Design Test of Computers, 29(6), 74–83.

By: T. Zhu n, M. Steer n & P. Franzon n

TL;DR: This article presents a design flow to find appropriate tuning knob settings to compensate for different process variation scenarios in analog circuits designed in submicrometer nodes. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2011 conference paper

3D specific systems design and CAD

2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation. Presented at the 2011 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XI).

By: P. Franzon n, W. Davis n, T. Thorolfsson n & S. Melamed n

Event: 2011 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XI)

TL;DR: This abstract explores application drivers, design and CAD for 3D ICs, including logic on memory, in a specific DSP example, showing a 25% power advantage when implemented in 3D compared with 2D. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2011 conference paper

3D specific systems: Design and CAD

2011 Asian Test Symposium, 470–473.

By: P. Franzon n, W. Davis n, T. Thorolfsson n & S. Melamed n

Event: 2011 Asian Test Symposium at New Delhi, India on November 20-23, 2011

author keywords: 3DIC; 3D IC; three dimensional IC; TSV; stacked memory; memory on logic; FFT
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2011 journal article

Accurate and Scalable IO Buffer Macromodel Based on Surrogate Modeling

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 1(8), 1240–1249.

By: T. Zhu n, M. Steer n & P. Franzon n

author keywords: IBIS; input/output buffer modeling; macromodel; process-voltage-temperature variations; surrogate modeling
TL;DR: Both single-ended and differential output buffer circuit examples demonstrate that the proposed modeling method offers good accuracy and flexible scalability to facilitate signal integrity analysis. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2011 conference paper

Adaptive clock distribution for 3D integrated circuits

2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems, 91–94.

By: X. Chen n, W. Davis n & P. Franzon n

Event: 2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems at San Jose, CA on October 23-26, 2011

TL;DR: A robust tunable-delay-buffer circuit and a novel active de-skew method are developed in order to handle the cross-die variations, thermal gradients, and wiring asymmetry in 3D ICs. (via Semantic Scholar)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2011 conference paper

Analysis and approach of TSV-based hierarchical power distribution networks for estimating 1st-droop and resonant noise in 3DIC

Ieee conference on electrical performance of electronic packaging and, 267–270.

By: G. Charles n, P. Franzon n, J. Kim* & A. Levin*

TL;DR: To better understand how to reduce noise, particularly simultaneous switching noise (SSN) and determine voltage drop impact on power delivery networks for 3DICs, an analytical model is enhanced and applied to estimate the different noise levels of hierarchical TSV-based PDN structures. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2011 journal article

Computing with Novel Floating-Gate Devices

COMPUTER, 44(2), 29–36.

By: D. Schinke n, N. Di Spigna n, M. Shiveshwarkar n & P. Franzon n

TL;DR: The authors report on the design, operation, and architectural implications of single and double floating-gate devices for nontraditional applications enabling low-power FPGAs and analog-to-digital converters, and propose a unified nonvolatile/volatile memory device. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2011 conference paper

Design strategies for processor, chip/package co-design (M-VI)

2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems. Presented at the 2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS).

By: P. Franzon n & E. Liu*

Event: 2011 IEEE 20th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)

Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2011 journal article

Reconfigurable five-layer three-dimensional integrated memory-on-logic synthetic aperture radar processor

IET COMPUTERS AND DIGITAL TECHNIQUES, 5(3), 198–204.

By: T. Thorolfsson n, N. Moezzi-Madani n & P. Franzon n

TL;DR: A floating-point synthetic aperture radar processor that achieves a power efficiency of 18.0 mW/GFlop in simulation through the use of three-dimensional (3D) integration and reconfiguration of the data path is presented. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2011 journal article

SPICE-compatible physical model of nanocrystal floating gate devices for circuit simulation

IET CIRCUITS DEVICES & SYSTEMS, 5(6), 477–483.

By: D. Schinke n, S. Priyadarshi n, W. Pitts n, N. Di Spigna n & P. Franzon n

TL;DR: A comprehensive and accurate SPICE-compatible physical equation-based model of nanocrystal floating gate devices is developed based on uniform direct Tunnelling and Fowler-Nordheim tunnelling based on a Verilog-A module that captures the physical behaviours of programming and erasing the device. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2011 journal article

Surrogate Model-Based Analysis of Analog Circuits – Part I. Variability Analysis

IEEE Transactions on Device and Materials Reliability, PP(99).

By: M. Yelten, P. Franzon & M. Steer

Source: NC State University Libraries
Added: March 9, 2019

2010 conference paper

A zero power consumption Multi-Capacitor structure for voltage summing in high-speed FFE

19th Topical Meeting on Electrical Performance of Electronic Packaging and Systems. Presented at the 2010 IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS).

By: B. Su n, W. Pitts n, P. Franzon n & J. Wilson n

Event: 2010 IEEE 19th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)

UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2010 conference paper

Creating 3D specific systems: Architecture, design and CAD

2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010), 1684–1688.

By: P. Franzon n, W. Davis n & T. Thorolffson n

Event: 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010) at Dresden, Germany on March 8-12, 2010

Sources: Crossref, NC State University Libraries, NC State University Libraries
Added: March 24, 2019

2010 conference paper

Logic-on-logic 3D integration and placement

2010 IEEE International 3D Systems Integration Conference (3DIC). Presented at the 2010 IEEE International 3D Systems Integration Conference (3DIC).

By: T. Thorolfsson n, G. Luo*, J. Cong* & P. Franzon n

Event: 2010 IEEE International 3D Systems Integration Conference (3DIC)

TL;DR: This methodology shows that using 3D face-to-face integration with microbumps in conjunction with the three placement algorithms can improve the maximum clock speed of AES module by 15.3% and the PE by 22.6%, while reducing the power of the AES module and thePE by 2.6%. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2010 article

Multimode Transceiver for High-Density Interconnects: Measurement and Validation

2010 PROCEEDINGS 60TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), pp. 1733–1738.

By: Y. Choi n, H. Braunisch*, K. Ayguen & P. Franzon n

Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2010 conference paper

The NCSU Tezzaron design kit

2010 IEEE International 3D Systems Integration Conference (3DIC), 1–15.

By: S. Lipa, T. Thorolfsson & P. Franzon*

Event: 2010 IEEE International 3D Systems Integration Conference (3DIC)

Sources: Crossref, NC State University Libraries
Added: April 11, 2019

2010 article

The integration of novel EAP-based Braille cells for use in a refreshable tactile display

ELECTROACTIVE POLYMER ACTUATORS AND DEVICES (EAPAD) 2010, Vol. 7642.

By: N. Di Spigna n, P. Chakraborti n, D. Winick n, P. Yang n, T. Ghosh n & P. Franzon n

author keywords: Braille; blind; PVDF; electroactive polymers; dielectric elastomer; visual impairments; bimorph
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2010 conference paper

Thermal Investigatoin of Tier Swapping to Improve the Thermal Profile of Memory-on-Logic 3DICs

IEEE THERMINIC, 1–6.

By: S. Melamed, T. Thorolfsson, A. Srinivasan, E. Cheng, P. Franozn & W. Davis

Source: NC State University Libraries
Added: April 11, 2019

2010 conference paper

Thermal isolation in 3D chip stacks using vacuum gaps and capacitive or inductive communications

2010 IEEE International 3D Systems Integration Conference (3DIC). Presented at the 2010 IEEE International 3D Systems Integration Conference (3DIC).

By: P. Franzon*, J. Wilson* & M. Li*

Event: 2010 IEEE International 3D Systems Integration Conference (3DIC)

TL;DR: Simulation shows that the DRAM can operate at a temperature 47°C cooler than the CPU, and the combination of a vacuum gap, formed using standard semiconductor processing, together with capacitive or inductive signaling across the gap. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2009 journal article

A 32-Gb/s On-Chip Bus With Driver Pre-Emphasis Signaling

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 17(9), 1267–1274.

By: L. Zhang n, J. Wilson n, R. Bashirullah*, L. Luo n, J. Xu n & P. Franzon n

author keywords: Interconnects; low power; on-chip; pre-emphasis
TL;DR: A differential current-mode bus architecture based on driver pre-emphasis for on-chip global interconnects that achieves high-data rates while reducing bus power dissipation and improving signal delay latency is described. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, Crossref, NC State University Libraries
Added: August 6, 2018

2009 conference paper

A low power 3D integrated FFT engine using hypercube memory division

ISLPED 09, 231–236.

By: T. Thorolfsson n, N. Moezzi-Madani n & P. Franzon n

TL;DR: A floating point FFT processor that leverages both 3D integration and a hypercube memory division scheme to reduce the power consumption of a 1024 point F FT down to 4.227 μJ is demonstrated. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2009 conference paper

An enhanced macromodeling approach for differential output drivers

BMAS 2009: Proceedings of the 2009 IEEE International Behavioral Modeling and Simulation Workshop, 54–59.

By: T. Zhu n & P. Franzon n

TL;DR: The approach is demonstrated with two typical digital drivers, low-voltage differential signaling (LVDS) driver and pre-emphasis driver, which achieve excellent accuracy in capturing behaviors at various input patterns, loading conditions and supply voltages. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2009 journal article

Application Exploration for 3-D Integrated Circuits: TCAM, FIFO, and FFT Case Studies

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 17(4), 496–506.

By: W. Davis n, E. Oh n, A. Sule n & P. Franzon n

author keywords: Fast Fourier transform (FFT); first-in first-out (FIFO); ternary content-addressable memory (TCAM); 3-D integrated circuit (IC)
TL;DR: This paper presents physical-design case studies of ternary content-addressable memories, first-in first-out (FIFO) memories, and a 8192-point fast Fourier transform (FFT) processor in order to quantify the benefit of the through-silicon vias in an available 180-nm 3-D process. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2009 conference paper

Application of EAP materials toward a refreshable Braille display

In Y. Bar-Cohen & T. Wallmersperger (Eds.), Electroactive Polymer Actuators and Devices (EAPAD) 2009.

By: N. Di Spigna n, P. Chakraborti n, P. Yang n, T. Ghosh n & P. Franzon n

Ed(s): Y. Bar-Cohen & T. Wallmersperger

Event: SPIE Smart Structures and Materials + Nondestructive Evaluation and Health Monitoring

UN Sustainable Development Goal Categories
10. Reduced Inequalities (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2009 conference paper

Application of surrogate modeling to generate compact and PVT-sensitive IBIS models

Electrical Performance of Electronic Packaging and Systems, 77–80.

By: T. Zhu n & P. Franzon n

TL;DR: A new proposal of applying surrogate-modeling in Input-output Buffer Information Specification (IBIS) saves the IBIS data storage resource, extends the model utility to various process-voltage-temperature (PVT) simulations and eliminates the data interpolation deviations. (via Semantic Scholar)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2009 conference paper

CAD and Design Application Exploration of 3DICs

Proceedings 2008 Gomactech.

By: P. Franzon, W. Davis, M. Steer, T. Thorolfsson, L. McIlrath & K. Obermiller

Source: NC State University Libraries
Added: April 11, 2019

2009 journal article

Controllable Molecular Modulation of Conductivity in Silicon-Based Devices

JOURNAL OF THE AMERICAN CHEMICAL SOCIETY, 131(29), 10023–10030.

By: T. He n, D. Corley n, M. Lu n, N. Di Spigna n, J. He n, D. Nackashi n, P. Franzon n, J. Tour n

MeSH headings : Electric Conductivity; Membranes, Artificial; Semiconductors; Silicon / chemistry
TL;DR: It is reported that a molecular monolayer, covalently grafted atop a silicon channel, can play a role similar to gating and impurity doping, which leads to the observed controllable modulation of conductivity in pseudometal-oxide-semiconductor field-effect transistors (pseudo-MOSFETs). (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2009 conference paper

CryptoFSM – Securing chips against reverse engineering

Proceedings 2008 Gomactech.

By: M. Hamlett, L. McIlrath, F. Kiamilev & V. Ozguz

Source: NC State University Libraries
Added: April 11, 2019

2009 conference paper

Design Automation of a 3DIC FFT Processor, for Synthetic Aperture Radar: A case study

Proceedings ACM/IEEE DAC 2009, 51–56.

By: T. Thorolffson, K. Gonsalves n & P. Franzon n

TL;DR: The work shows how the vertical dimension can be exploited for novel memory architecture tradeoffs that are not feasible in 2D, reducing the energy consumed per memory operation in the FFT by 60.3%. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: April 14, 2019

2009 conference paper

Junction-level thermal extraction and simulation of 3DICs

2009 IEEE International Conference on 3d Systems Integration, 395–401.

By: S. Melamed n, T. Thorolfsson n, A. Srinivasan*, E. Cheng*, P. Franzon n & R. Davis n

Event: 2009 IEEE International Conference on 3D System Integration at San Francisco, CA on September 28-30, 2009

TL;DR: It was found that lowering the simulation resolution and using composite thermal conductivities failed to accurately predict the location of these tentpoles, so large isolated temperature spikes were found near groups of clock buffers at the edge of the SRAMs on the middle tier. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2009 conference paper

Low-power self-equalizing driver for silicon carrier interconnects with low bit error rate

Electrical Performance of Electronic Packaging and Systems, 37–40.

By: P. Gadfort n & P. Franzon n

TL;DR: This paper demonstrates and compares the power efficiency of a standard differential current mode driver operating over an FR-4 channel with an improved driver with pre-emphasis operating over a silicon carrier channel. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2009 conference paper

Multi-bit fractional equalization for multi-Gb/s inductively coupled connectors

Electrical Performance of Electronic Packaging and Systems, 121–124.

By: E. Erickson n, J. Wilson*, K. Chandrasekar* & P. Franzon n

UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2009 review

Overview of RFID Technology and Its Applications in the Food Industry

[Review of ]. JOURNAL OF FOOD SCIENCE, 74(8), R101–R106.

By: P. Kumar n, H. Reinitz n, J. Simunovic n, K. Sandeep n & P. Franzon n

author keywords: applications in food industry; RFID; working principle
MeSH headings : Food Industry / instrumentation; Food Industry / methods; Food Industry / standards; Radio Frequency Identification Device / economics; Radio Frequency Identification Device / methods
TL;DR: Key concepts and terminology related to RFID technology and its applications in the food industry (supply chain management, temperature monitoring of foods, and ensuring food safety) are presented. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2009 chapter

Use of AC Coupled Interconnect in Contactless Packaging

In R. Ho (Ed.), Coupled Data Communications. Springer-Verlag.

By: P. Franzon

Ed(s): R. Ho

Source: NC State University Libraries
Added: March 9, 2019

2008 conference paper

AC coupled backplane communication using embedded capacitor

2008 IEEE-EPEP Electrical Performance of Electronic Packaging. Presented at the 2008 IEEE 17th Conference on Electrical Performance of Electronic Packaging (EPEP).

By: B. Su n, P. Patel, S. Hunter, M. Cases* & P. Franzon n

Event: 2008 IEEE 17th Conference on Electrical Performance of Electronic Packaging (EPEP)

Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2008 conference paper

An 8192-point fast fourier transform 3D-IC case study

2008 51st Midwest Symposium on Circuits and Systems, 438–441.

By: W. Davis n, A. Sule* & P. Franzon n

Event: 2008 51st IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) at Knoxville, TN on August 10-13, 2008

TL;DR: This paper presents a case studies of an 8192-point fast Fourier transform (FFT) processor in order to quantify the benefit of the through-silicon vias in an available 180 nm 3D process. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries, Web Of Science
Added: March 24, 2019

2008 conference paper

Analysis of inter-bundle crosstalk in multimode signaling for high-density interconnects

2008 58th Electronic Components and Technology Conference. Presented at the 2008 58th Electronic Components and Technology Conference (ECTC 2008).

By: Y. Choi n, H. Braunisch*, K. Aygun* & P. Franzon n

Event: 2008 58th Electronic Components and Technology Conference (ECTC 2008)

Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2008 conference paper

Application Specific Integrated Circuit Verification: An Illustration Based Approach

IEEE MSE.

By: M. Yadav, R. Jenkal, P. Franzon, P. Lafucci, B. Potts & I. Burgess

Source: NC State University Libraries
Added: April 14, 2019

2008 conference paper

Application and Design Exploration for 3D Integrated Circuits

VLSI Multi-level Interconnect Conference.

By: P. Franzon, W. Davis, M. Steer, H. Hao, S. Lipa, S. Luniya, C. Mineo, J. Oh, A. Sule, T. Thorolfsson

Source: NC State University Libraries
Added: April 11, 2019

2008 conference paper

Autonomous Vision Processing and 3D Scene Reconstruction

GOMACTECH.

By: W. Pitts, M. Vaidya, M. Kadambi, S. Malkani & P. Franzon

Source: NC State University Libraries
Added: April 14, 2019

2008 conference paper

Computer-Aided Design and Application Exploration for 3D Integrated Circuits

GOMACTECH.

By: P. Franzon

Source: NC State University Libraries
Added: April 15, 2019

2008 conference paper

Design and CAD for 3D integrated circuits

Proceedings of the 45th annual conference on Design automation - DAC '08, 668–673.

By: P. Franzon n, S. Berkeley*, B. Shani*, K. Obermiller*, W. Davis n, M. Steer n, S. Lipa n, E. Oh n ...

Event: the 45th annual conference

TL;DR: This paper presents several case studies that are uniquely enhanced through 3D implementation, including a 3D CAM, an FFT processor, and a SAR processor, which requires higher fidelity thermal modeling than 2DIC design. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries, NC State University Libraries
Added: March 24, 2019

2008 chapter

Design for 3-D Integration

In P. Garrou, P. Ramm, & C. Bower (Eds.), 3-D IC Integration: Technology and Applications. Wiley VCH.

By: P. Franzon

Ed(s): P. Garrou, P. Ramm & C. Bower

Source: NC State University Libraries
Added: March 9, 2019

2008 conference paper

Extreme Temperature Invariant Circuitry Through Adaptive Body Biasing

GOMACTECH.

By: W. Pitts, V. Devasthali, J. Damiano & P. Franzon

Source: NC State University Libraries
Added: April 15, 2019

2008 article

Foreword Special Section on Electrical Performance Analysis and Simulation of Interconnects, Packages and Devices Composing Electronic Systems for High-Performance Applications

Canavero, F., & Franzon, P. D. (2008, November). IEEE TRANSACTIONS ON ADVANCED PACKAGING, Vol. 31, pp. 662–663.

By: F. Canavero* & P. Franzon n

Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2008 article

Improving Behavioral IO Buffer Modeling Based on IBIS

Varma, A. K., Steer, M., & Franzon, P. D. (2008, November). IEEE TRANSACTIONS ON ADVANCED PACKAGING, Vol. 31, pp. 711–721.

By: A. Varma*, M. Steer n & P. Franzon n

author keywords: Behavioral modeling; gate modulation effect; input output buffer information specification (IBIS); input/output (IO) buffer modeling; simultaneous switching noise (SSN)
TL;DR: A method is presented for compensating for the missing information in IBIS by complimenting the IBIS model with a black box that is simulator independent, without compromising with the speed that IBIS enjoys over the transistor models. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2008 conference paper

Inductively coupled connectors and sockets for multi-Gb/s pulse signaling

IEEE Transactions on Advanced Packaging, 31(4), 749–758.

By: K. Chandrasekar n, J. Wilson n, E. Erickson n, Z. Feng n, J. Xu n, S. Mick n, P. Franzon n

UN Sustainable Development Goal Categories
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2008 conference paper

Keeping hot chips cool

Proceedings of the 45th annual conference on Design automation - DAC '08. Presented at the the 45th annual conference.

By: R. Puri*, D. Varma, D. Edwards*, A. Weger*, P. Franzon n, A. Yang, S. Kosonocky*

Event: the 45th annual conference

TL;DR: This is an educational panel with a little bit of controversy that will address the thermal issue in IC design and the severity of power issues coupled with packaging complexity translate into a thermal crisis in future. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2008 conference paper

Memory rich applications for 3D integration

In S. F. Al-Sarawi, V. K. Varadan, N. Weste, & K. Kalantar-Zadeh (Eds.), Smart Structures, Devices, and Systems IV.

By: P. Franzon n, S. Lipa n, J. Oh n, T. Thorolfsson n & R. Davis n

Ed(s): S. Al-Sarawi, V. Varadan, N. Weste & K. Kalantar-Zadeh

Event: Smart Materials, Nano-and Micro-Smart Systems

TL;DR: This paper shows how memory power and memory bandwidth can both be improved by an order of magnitude through 3D integration, and specifically explores a DSP application. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2008 conference paper

Multimode signaling on non-ideal channels

2008 IEEE-EPEP Electrical Performance of Electronic Packaging, 51–54.

By: Y. Choi n, C. Won n, P. Franzon n, H. Braunisch* & K. Aygun*

Sources: NC State University Libraries, NC State University Libraries
Added: April 15, 2019

2008 journal article

Reversible Modulation of Conductance in Silicon Devices via UV/Visible-Light Irradiation

ADVANCED MATERIALS, 20(23), 4541–4546.

Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2008 journal article

Special issue on 3D integrated circuits and microarchitectures

ACM Journal on Emerging Technologies in Computing Systems, 4(4).

By: Y. Xie*, J. Cong & P. Franzon n

TL;DR: This special issue of the ACM Journal of Emerging Technologies in Computing Systems is dedicated to three-dimensional integrated circuits and microarchitectures and five papers on diverse topics related to 3D integration were accepted for the special issue. (via Semantic Scholar)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2007 conference paper

Application and Design Exploration for 3D Integrated Circuits

VLSI Multi-level Interconnect Conference.

By: P. Franzon, W. Davis, M. Steer, H. Hao, S. Lipa, S. Luniya, C. Mineo, J. Oh, A. Sule, T. Thorolfsson

Source: NC State University Libraries
Added: April 14, 2019

2007 conference paper

Design Considerations and Benefits of Three-Dimensional Ternary Content Addressable Memory

2007 IEEE Custom Integrated Circuits Conference. Presented at the 2007 IEEE 29th Custom Integrated Circuits Conference.

By: E. Oh n & P. Franzon n

Event: 2007 IEEE 29th Custom Integrated Circuits Conference

TL;DR: It is demonstrated that a 3D TCAM with three tiers can achieve 40% matchline capacitance reduction and 21% power reduction compared to a TCAM in a conventional single-tier process. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2007 conference paper

Design for 3D Integration and Applications

2007 International Symposium on Signals, Systems and Electronics, 263–266,

By: P. Franzon n, W. Davis n, M. Steer n, H. Hao n, S. Lipa n, S. Luniya n, C. Mineo n, J. Oh n ...

Event: 2007 International Symposium on Signals, Systems and Electronics at Montreal, Quebec, Canada on July 30 - August 2, 2007

TL;DR: This paper explores application drivers and computer aided design (CAD) for 3D ICs in order to provide system advantages equivalent to up to two technology nodes of scaling. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries, NC State University Libraries
Added: March 24, 2019

2007 journal article

Electronic properties of molecular memory circuits on a nanoscale scaffold

IEEE TRANSACTIONS ON NANOBIOSCIENCE, 6(4), 270–274.

By: A. Blum*, C. Soto, C. Wilson, C. Amsinck*, P. Franzon* & B. Ratna

author keywords: biomaterials; molecular electronics; nanotechnology
MeSH headings : Binding Sites; Biocompatible Materials / chemistry; Bionics / methods; Comovirus / chemistry; Crystallization; Electric Conductivity; Gold; Ion Exchange; Macromolecular Substances / chemistry; Materials Testing; Metal Nanoparticles / chemistry; Metal Nanoparticles / virology; Microscopy, Scanning Tunneling; Molecular Conformation; Nanotechnology / methods; Organisms, Genetically Modified; Protein Engineering
TL;DR: Here, genetically engineered cowpea mosaic virus was modified to express cysteine residues on the capsid exterior, gold nanoparticles were attached to the viral scaffold in a specific predetermined pattern to produce specific interparticle distances, resulting in three-dimensional network. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2007 conference paper

Flexible Low Power Probability Density Estimation Unit For Speech Recognition

2007 IEEE International Symposium on Circuits and Systems. Presented at the 2007 IEEE International Symposium on Circuits and Systems.

By: U. Pazhayaveetil n, D. Chandra n & P. Franzon n

Event: 2007 IEEE International Symposium on Circuits and Systems

TL;DR: A flexible probability density estimation unit that is both power efficient and meets real time requirements while being flexible enough to handle emerging speech recognition techniques is designed. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2007 conference paper

FreePDK: An Open-Source Variation-Aware Design Kit

2007 IEEE International Conference on Microelectronic Systems Education (MSE'07). Presented at the 2007 IEEE International Conference on Microelectronic Systems Education, San Diego, CA.

By: J. Stine*, I. Castellanos*, M. Wood*, J. Henson*, F. Love*, W. Davis n, P. Franzon n, M. Bucher n ...

Event: 2007 IEEE International Conference on Microelectronic Systems Education at San Diego, CA on June 3-4, 2007

TL;DR: An open source, variation aware Process Design Kit (PDK), based on Scalable CMOS design rules, down to 45 nm, for use in VLSI research, education and small businesses is discussed. (via Semantic Scholar)
UN Sustainable Development Goal Categories
9. Industry, Innovation and Infrastructure (OpenAlex)
Sources: Crossref, NC State University Libraries, Web Of Science
Added: March 24, 2019

2007 article

Fully integrated AC coupled interconnect using buried bumps

Wilson, J., Mick, S., Xu, J., Luo, L., Bonafede, S., Huffman, A., … Franzon, P. D. (2007, May). IEEE TRANSACTIONS ON ADVANCED PACKAGING, Vol. 30, pp. 191–199.

By: J. Wilson n, S. Mick n, J. Xu n, L. Luo n, S. Bonafede*, A. Huffman*, R. LaBennett*, P. Franzon n

author keywords: AC coupled interconnect (ACCI); buried bumps; capacitive coupling; MCM; pulse signaling; noncontacting I/O; chip and package co-design
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2007 conference paper

Hardware Architecture of a Parallel Pattern Matching Engine

2007 IEEE International Symposium on Circuits and Systems. Presented at the 2007 IEEE International Symposium on Circuits and Systems.

By: M. Yadav n, A. Venkatachaliah n & P. Franzon n

Event: 2007 IEEE International Symposium on Circuits and Systems

TL;DR: The hardware architecture of a parallel, pipelined pattern matching engine that uses trie based pattern matching algorithmic approach is described that outperforms most current implementations in terms of speed and memory requirement and outperforms TCAM based solutions interms of power consumption, area, and cost while remaining competitive in Terms of throughput and update times. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2007 conference paper

Molecular Electronics

2nd IEEE International Workshop on advances in sensors and interfaces.

By: P. Franzon, C. Amsinck, N. DiSPigna, D. Nackashi & S. Sonkusale

Source: NC State University Libraries
Added: April 14, 2019

2007 chapter

Molecular Electronics – Devices and Circuits Technology

In Vlsi-Soc: From Systems To Silicon. Springer Boston.

By: P. Franzon, D. Nackashi, C. Amsinck, N. DiSpigna & S. Sonkulale

Source: NC State University Libraries
Added: March 9, 2019

2007 journal article

SOI CMOS implementation of a multirate PSK demodulator for space communications

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 54(2), 420–431.

By: M. Yuce*, W. Liu*, J. Damiano n, B. Bharath n, P. Franzon n & N. Dogan*

author keywords: differential detection; multirate; phase-shift keying (PSK); sampling; space communications; symbol timing circuit
TL;DR: A low-power phase-shift keying demodulator integrated circuit (IC) has been implemented using silicon-on-insulator CMOS technology for deep space and satellite applications and digital decimation is used after sampling to achieve a low power implementation of multirate transmission. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2007 conference paper

System Design for 3D Multi-FPGA Packaging

2007 IEEE Electrical Performance of Electronic Packaging. Presented at the 2007 IEEE Electrical Performance of Electronic Packaging.

By: T. Thorolfsson n & P. Franzon n

Event: 2007 IEEE Electrical Performance of Electronic Packaging

TL;DR: This paper explores the system-level considerations such as layout, routing and IO in the design of 3D multi-FPGA packaging, along with their architectural implications. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2007 conference paper

System level Validation of Improved IO Buffer Behavioral Modeling Methodology Based on IBIS

2007 IEEE Electrical Performance of Electronic Packaging. Presented at the 2007 IEEE Electrical Performance of Electronic Packaging.

By: A. Varma n, M. Steer n & P. Franzon n

Event: 2007 IEEE Electrical Performance of Electronic Packaging

TL;DR: System level simulation and validation of a new macromodeling methodology based on IBIS (Input/Output Buffer Information Specification) models is presented and enhancements of the black-box techniques discussed in [1] are discussed. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2007 article

Uniformity analysis of wafer scale sub-25 nm wide nanowire array nanoimprint mold fabricated by PEDAL process

MICROELECTRONIC ENGINEERING, Vol. 84, pp. 1523–1527.

By: S. Sonkusale n, N. Di Spigna n & P. Franzon n

author keywords: PEDAL; nanoimprint; mold; nanowires
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2007 journal article

Voltage-mode driver preemphasis technique for on-chip global buses

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 15(2), 231–236.

By: L. Zhang, J. Wilson*, R. Bashirullah*, L. Luo*, J. Xu* & P. Franzon*

author keywords: global buses; low-power; on-chip; preemphasis; repeater insertion
TL;DR: This paper demonstrates that driver preemphasis technique can be used for on-chip global buses to increase signal channel bandwidth and reduces power consumption by 12%-39% for data activity factors above 0.1. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2006 journal article

3 Gb/s AC Coupled Chip-to-Chip Communication Using a Low Swing Pulse Receiver

IEEE Journal of Solid-State Circuits, 41(1), 287–296.

By: L. Luo n, J. Wilson n, S. Mick n, J. Xu n, L. Zhang n & P. Franzon n

author keywords: AC coupled interconnect; bandlimited communications; buried bump technology; capacitive coupling; multichip modules; pulse receiver; pulse signaling
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries, Web Of Science
Added: August 6, 2018

2006 conference paper

A 32Gb/s On-chip Bus with Driver Pre-emphasis Signaling

IEEE Custom Integrated Circuits Conference 2006. Presented at the Proceedings of the IEEE 2006 Custom Integrated Circuits Conference.

By: L. Zhang n, J. Wilson n, R. Bashirullah n, L. Luo n, J. Xu n & P. Franzon n

Event: Proceedings of the IEEE 2006 Custom Integrated Circuits Conference

TL;DR: A 16-bit on-chip bus with driver pre-emphasis fabricated in 0.25mum CMOS technology attains an aggregate signaling data rate of 32Gb/s over 5-10mm long lossy interconnects while reducing delay latency, power, and peak current over a conventional single-ended voltage-mode static bus. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2006 conference paper

A 36Gb/s ACCI Multi-Channel Bus using a Fully Differential Pulse Receiver

IEEE Custom Integrated Circuits Conference 2006. Presented at the IEEE Custom Integrated Circuits Conference 2006.

By: L. Luo n, J. Wilson n, S. Mick n, J. Xu n, L. Zhang n, E. Erickson n, P. Franzon n

Event: IEEE Custom Integrated Circuits Conference 2006

TL;DR: A new differential pulse receiver is demonstrated for AC coupled interconnect (ACCI), which enables the highest data rate, at 6Gb/s/channel (36Gb/S aggregate), for capacitively coupled systems using pulse signaling. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2006 conference paper

AC Coupled Interconnect using Buried Bumps for Laminated Organic Packages

Proceedings Electronic Components and Technology, ECTC.

By: J. Wilson, L. Luo, S. Mick, B. Chan, H. Lin & P. Franzon

Source: NC State University Libraries
Added: April 15, 2019

2006 conference paper

Architecture for Low Power Large Vocabulary Speech Recognition

2006 IEEE International SOC Conference. Presented at the 2006 IEEE International SOC Conference.

By: D. Chandra n, U. Pazhayaveetil n & P. Franzon n

Event: 2006 IEEE International SOC Conference

TL;DR: This paper proposes an architecture for real-time large vocabulary speech recognition on a mobile embedded device that has a low power embedded processor and dedicated ASIC units for complex computations. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2006 conference paper

Considerations for Transmission Line Design on MCMs using AC Coupled Interconnect with Buried Solder Bumps

2006 IEEE Workship on Signal Propagation on Interconnects. Presented at the 2006 IEEE Workshop on Signal Propagation on Interconnects.

By: J. Wilson n, S. Mick n, J. Xu n, L. Luo n, E. Erickson n & P. Franzon n

Event: 2006 IEEE Workshop on Signal Propagation on Interconnects

author keywords: AC Coupled Interconnect; ACCI; buried solder bumps; transmission lines; routing; MCM; stripline
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2006 journal article

Controlled modulation of conductance in silicon devices by molecular monolayers

JOURNAL OF THE AMERICAN CHEMICAL SOCIETY, 128(45), 14537–14541.

By: T. He n, J. He n, M. Lu n, B. Chen n, H. Pang n, W. Reus n, W. Nolte n, D. Nackashi n ...

TL;DR: Controlling the drain current and threshold voltage in pseudo metal-oxide-semiconductor field-effect transistors by grafting a monolayer of molecules atop oxide-free H-passivated silicon surfaces might serve as a useful method for controlling electronic characteristics in small silicon devices at future technology nodes. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2006 conference paper

Controlled nanowire fabrication by PEDAL process

2006 1st International Conference on Nano-Networks and Workshops. Presented at the 2006 1st International Conference on Nano-Networks and Workshops.

By: S. Sonkusale n & P. Franzon n

Event: 2006 1st International Conference on Nano-Networks and Workshops

TL;DR: The experimental results presented in this paper prove the efficacy of PEDAL process in making nanowire template of sub-25 nm wide lines with good routing capability. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2006 journal article

Deterministic nanowire fanout and interconnect without any critical translational alignment

IEEE TRANSACTIONS ON NANOTECHNOLOGY, 5(4), 356–361.

By: N. Di Spigna n, D. Nackashi n, C. Amsinck n, S. Sonkusale n & P. Franzon n

author keywords: alignment; crossbar architectures; fanout; interconnect; nanoscale interfacing; nanotechnology
TL;DR: A design is presented that allows complete and deterministic fanout of regular arrays of wires from the nano- to the microworld without the need for any critical translational alignment steps. (via Semantic Scholar)
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2006 conference paper

Developing Improved IO Buffer Behavioral Modeling Methodology Based on IBIS

2006 IEEE Electrical Performane of Electronic Packaging. Presented at the 2006 IEEE Electrical Performane of Electronic Packaging.

By: A. Varma n, M. Steer n & P. Franzon n

Event: 2006 IEEE Electrical Performane of Electronic Packaging

TL;DR: A new macromodeling methodology based on IBIS (input/output buffer information specification) models is proposed and produces models that can be simulated accurately for simultaneous switching noise (SSN). (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2006 conference paper

Differential current-mode signaling for robust and power efficient on-chip global interconnects

IEEE 14th Topical Meeting on Electrical Performance of Electronic Packaging, 2005. Presented at the IEEE 14th Topical Meeting on Electrical Performance of Electronic Packaging, 2005.

By: L. Zhang n, J. Wilson n, R. Bashirullah n & P. Franzon n

Event: IEEE 14th Topical Meeting on Electrical Performance of Electronic Packaging, 2005.

Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2006 conference paper

Fine Pitch Inductively Coupled Connectors for Multi-Gbps Pulse Signaling

2006 IEEE Electrical Performane of Electronic Packaging. Presented at the 2006 IEEE Electrical Performane of Electronic Packaging.

By: K. Chandrasekar n, J. Wilson n, E. Erickson n, Z. Feng n, J. Xu n, S. Mick n, P. Franzon n

Event: 2006 IEEE Electrical Performane of Electronic Packaging

Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2006 conference paper

High-Frequency Characterization of Printed CPW Lines on Textiles using a Custom Test Fixture

2006 IEEE Workship on Signal Propagation on Interconnects. Presented at the 2006 IEEE Workship on Signal Propagation on Interconnects.

By: J. Wilson n, C. Merritt n, B. Karaguzel n, T. Kang n, H. Nagle n, E. Grant n, B. Pourdeyhemi n, P. Franzon n

Event: 2006 IEEE Workship on Signal Propagation on Interconnects

author keywords: wearable electronics; electronic textiles; RF and microwave testing; printed electronics; polymer thick film
UN Sustainable Development Goal Categories
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2006 journal article

Physically based molecular device model in a transient circuit simulator

CHEMICAL PHYSICS, 326(1), 188–196.

By: N. Kriplani*, D. Nackashi*, C. Amsinck*, N. Di Spigna*, M. Steer*, P. Franzon*, R. Rick, G. Solomon, J. Reimers

author keywords: molecular electronics; circuit simulator; density-functional theory; 1,4-benzenedithiol; single-molecule conductivity
UN Sustainable Development Goal Categories
16. Peace, Justice and Strong Institutions (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2006 conference paper

Pulse Signaling in Inductively Coupled Sockets and Connectors

SRC Student Symposium.

By: J. Xu, J. Wilson, E. Erickson & P. Franzon

Source: NC State University Libraries
Added: April 14, 2019

2006 conference paper

Sensors on textile substrates for home-based healthcare monitoring

Proceedings of the 1st Conference on Distributed Diagnosis and Home Healthcare, 5–7.

By: T. Kang n, C. Merritt n, B. Karaguzel n, J. Wilson n, P. Franzon n, B. Pourdeyhimi n, E. Grant n, T. Nagle n

Event: 1st Transdisciplinary Conference on Distributed Diagnosis and Home Healthcare at Arlington, VA, USA on April 2-4, 2006

TL;DR: Progress in developing textile-based sensors for wearable physiological monitoring systems for ECG and EOG data is described and a capacitive sensor for monitoring breathing is presented. (via Semantic Scholar)
Sources: NC State University Libraries, NC State University Libraries, Crossref
Added: March 24, 2019

2006 conference paper

Signal integrity and robustness of ACCI packaged systems

IEEE 14th Topical Meeting on Electrical Performance of Electronic Packaging, 2005. Presented at the IEEE 14th Topical Meeting on Electrical Performance of Electronic Packaging, 2005.

By: L. Luo n, J. Wilson n, J. Xu n, S. Mick n & P. Franzon n

Event: IEEE 14th Topical Meeting on Electrical Performance of Electronic Packaging, 2005.

TL;DR: The potential for switching noise, crosstalk and ISI control in ACCI system is discussed, which could help improve multi-Giga-b/s/channel communication. (via Semantic Scholar)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2006 conference paper

TCAM core design in 3D IC for low matchline capacitance and low power

In S. F. Al-Sarawi (Ed.), Smart Structures, Devices, and Systems III.

By: E. Oh n & P. Franzon n

Ed(s): S. Al-Sarawi

Event: Smart Materials, Nano- and Micro-Smart Systems

author keywords: TCAM (ternary content addressable memory); 3D1C (3-dimentional integrated circuits); integrated circuit interconnect; vertical interconnect; inter-tier via; 3D via; inatchline capacitance; interconnect capacitance; low power TCAM; CAM
TL;DR: 3D vias are used to replace matchlines, whose transition during parallel search operations is a major source of high power consumption in TCAM and field analysis and spice simulation results show that a 40% matchline capacitance reduction and a 23% power reduction can be achieved by using a 3-tier 3D IC structure instead of the conventional 2D approach. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2005 conference paper

2.8 Gb/s Inductively Coupled Interconnect for 3-D ICs

Japan VLSI Symposium.

By: J. Xu, J. Wilson, S. Mick, L. Luo & P. Franzon

Source: NC State University Libraries
Added: April 17, 2019

2005 conference paper

2.8 Gbps inductively coupled interconnect for 3D ICs

Proceedings of the 2005 symposium on VLSI circuits, 352–355.

By: J. Xu, J. Wilson, S. Mick & L. Luo

Source: NC State University Libraries
Added: June 9, 2019

2005 conference paper

3Gb/s AC-coupled chip-to-chip communication using a low-swing pulse receiver

Proceedings of the 2005 International Solid State Circuits Conference. Presented at the 2005 International Solid State Circuits Conference, San Francisco, CA, USA.

By: L. Luo n, J. Wilson n, S. Mick n, J. Xu n, L. Zhang n & P. Franzon n

Event: 2005 International Solid State Circuits Conference at San Francisco, CA, USA on February 10, 2005

TL;DR: A 120-mV/sub ppd/ low swing pulse receiver is presented for AC coupled interconnect (ACCI) and first-time demonstration of a flip-chip ACCI is presented, with both the AC and DC connections successfully integrated between the flipped chip and the multichip module (MCM) substrate by using the buried bump technology. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, NC State University Libraries
Added: June 9, 2019

2005 article

A tunable combline bandpass filter using Barium Strontium Titanate interdigital varactors on an alumina substrate

2005 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM, VOLS 1-4, pp. 595–598.

By: J. Nath n, D. Ghosh n, W. Fathelbab n, J. Maria n, A. Kingon n, P. Franzon n, M. Steer n

author keywords: Barium Strontium Titanate (BST); ferroelectric; microstrip filters; resonators; thin film devices; tunable filters; varactor
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2005 journal article

An Engineered Virus as a Scaffold for Three-Dimensional Self-Assembly on the Nanoscale

Small, 1(7), 702–706.

By: A. Blum*, C. Soto*, C. Wilson, T. Brower*, S. Pollack*, T. Schull*, A. Chatterji*, T. Lin* ...

author keywords: molecular electronics; nanotechnology; protein engineering; self-assembly; viruses
MeSH headings : Biomedical Engineering / methods; Capsid / chemistry; Electronics; Microscopy, Scanning Tunneling; Models, Chemical; Models, Molecular; Mutation; Nanocomposites / chemistry; Nanostructures; Nanotechnology / methods; Protein Engineering / methods; Viruses / chemistry; Viruses / genetics
TL;DR: Using cowpea mosaic virus, modified to express cysteine residues on the capsid exterior, gold nanoparticles were attached to the viral scaffold to produce specific interparticle distances, resulting in a 3D spherical conductive network. (via Semantic Scholar)
UN Sustainable Development Goal Categories
Sources: Web Of Science, Crossref, NC State University Libraries
Added: August 6, 2018

2005 article

An electronically tunable microstrip bandpass filter using thin-film barium-strontium-titanate (BST) varactors

Nath, J., Ghosh, D., Maria, J. P., Kingon, A. I., Fathelbab, W., Franzon, P. D., & Steer, M. B. (2005, September). IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, Vol. 53, pp. 2707–2712.

By: J. Nath n, D. Ghosh n, J. Maria n, A. Kingon n, W. Fathelbab n, P. Franzon n, M. Steer n

author keywords: barium strontium titanate (BST); combline filter; ferroelectric films; intermodulation distortion; microstrip filters; resonators; thin-film devices; tunable filters; varactor
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2005 conference paper

An integrated self-masking technique for providing low-loss metallized RF MEMS devices in a polysilicon only MEMS process

Proceedings of the SPIE Micro Europe. Presented at the SPIE Micro Europe, Sevilla, Spain.

By: J. Wilson n, R. Bashirullah*, D. Nackashi n, D. Winick n & P. Franzon n

Event: SPIE Micro Europe at Sevilla, Spain

author keywords: RF MEMS; post process; metallization; tunable capacitor; removable mask; SUMMiT
Sources: Web Of Science, NC State University Libraries
Added: June 9, 2019

2005 journal article

CAD Flows for Chip-Package CoVerification

IEEE Transactions on Advanced Packaging, 28(1), 194–202.

By: A. Varma n, A. Glaser* & P. Franzon n

TL;DR: A unified method is presented for layout and package design implemented within a commercial design environment that will reduce design time and enable chip-package coverification. (via Semantic Scholar)
Sources: NC State University Libraries, NC State University Libraries
Added: August 6, 2018

2005 chapter

Chip-Package Codesign

In L. Scheffer, L. Lavagno, & G. Martin (Eds.), The Handbook for EDA of Electronic Circuits. CRC Press.

By: P. Franzon

Ed(s): L. Scheffer, L. Lavagno & G. Martin

Source: NC State University Libraries
Added: March 9, 2019

2005 journal article

Configurable String Matching Hardware for Speeding Up Intrusion Detection

SIGARCH Comput. Archit. News, 33(1), 99–107.

By: M. Aldwairi n, T. Conte n & P. Franzon n

TL;DR: A configurable string matching accelerator is developed with the focus on increasing throughput while maintaining the configurability provided by the software IDSs. (via Semantic Scholar)
Sources: NC State University Libraries, NC State University Libraries
Added: March 9, 2019

2005 journal article

Cover Picture: An Engineered Virus as a Scaffold for Three-Dimensional Self-Assembly on the Nanoscale (Small 7/2005)

Small, 1(7), 669–669.

By: A. Blum, C. Soto, C. Wilson, T. Brower, S. Pollack, T. Schull, A. Chatterji, T. Lin ...

Sources: Crossref, NC State University Libraries
Added: September 6, 2020

2005 journal article

Cover Picture: An Engineered Virus as a Scaffold for Three-Dimensional Self-Assembly on the Nanoscale (Small 7/2005)

Small, 1(7), 669–669.

By: A. Blum, C. Soto, C. Wilson, T. Brower, S. Pollack, T. Schull, A. Chatterji, T. Lin ...

Sources: Crossref, NC State University Libraries
Added: September 6, 2020

2005 journal article

Demystifying 3D ICs: The procs and cons of going vertical

IEEE DESIGN & TEST OF COMPUTERS, 22(6), 498–510.

By: W. Davis n, J. Wilson n, S. Mick n, M. Xu*, H. Hua*, C. Mineo n, A. Sule n, M. Steer n, P. Franzon n

TL;DR: A practical introduction to the design trade-offs of the currently available 3D IC technology options is provided, with an analysis relating the number of transistors on a chip to the vertical interconnect density using estimates based on Rent's rule. (via Semantic Scholar)
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2005 conference paper

Drive circuit for a mode conversion rotary ultrasonic motor

31st Annual Conference of IEEE Industrial Electronics Society, 2005. IECON 2005. Presented at the 31st Annual Conference of IEEE Industrial Electronics Society, 2005. IECON 2005.

By: J. Xu n, E. Grant n, A. Kingon n, J. Wilson n & P. Franzon n

Event: 31st Annual Conference of IEEE Industrial Electronics Society, 2005. IECON 2005.

UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2005 conference paper

Driver pre-emphasis techniques for on-chip global buses

Proceedings of the 2005 international symposium on Low power electronics and design - ISLPED '05. Presented at the the 2005 international symposium.

By: L. Zhang n, J. Wilson n, R. Bashirullah*, L. Luo n, J. Xu n & P. Franzon n

Event: the 2005 international symposium

TL;DR: This proposed architecture lowers the worst coupling capacitance to total capacitance ratio to 14.4%. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2005 journal article

Fabrication of wafer scale, aligned sub-25 nm nanowire and nanowire templates using planar edge defined alternate layer process

PHYSICA E-LOW-DIMENSIONAL SYSTEMS & NANOSTRUCTURES, 28(2), 107–114.

By: . Sonkusale n, C. Amsinck n, D. Nackashi n, N. Di Spigna n, D. Barlage n, M. Johnson n, P. Franzon n

author keywords: nanowire; nanoimprinting; mold; template; interconnects; nanotechnology
UN Sustainable Development Goal Categories
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2005 conference paper

Fabrication of wafer-scale, aligned Sub-25 nm nanowires and templates using Planar Edge Defined Alternate Layer (PEDAL) Process

Technical Proceedings of the 2005 NSTI Nanotechnology Conference and Trade Show. Presented at the 2005 NSTI Nanotechnology Conference and Trade Show, Anaheim, CA.

By: S. Sonkusale, C. Amsinck, D. Nackashi, N. Di Spigna, D. Barlage, M. Johnson, P. Franzon

Event: 2005 NSTI Nanotechnology Conference and Trade Show at Anaheim, CA

Source: NC State University Libraries
Added: June 9, 2019

2005 conference paper

Impact of SOI research Project on microelectronics education: a case study

Proceedings of the IEEE International Conference on Microelectronics systems education, 33–34.

By: N. Dogan*, P. Franzon n & W. Liu*

Event: 2005 IEEE International Conference on Microelectronic Systems Education (MSE'05) at Anaheim, CA, USA on June 12-13, 2005

TL;DR: The impact of an RF-SoC research project on the career choices of students involved and its broader impact on the microelectronics education in the participating universities are presented. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: June 9, 2019

2005 conference paper

Inductively Coupled Board-to-Board Connectors

Proceedings Electronic Components and Technology, 2005. ECTC '05., 1109–1113.

By: K. Chandrasekar n, Z. Feng n, J. Wilson n, S. Mick n & P. Franzon n

Event: 2005 55th Electronic Components and Technology Conference at Lake Buena Vista, FL, USA on May 31 - June 3, 2005

Sources: Crossref, NC State University Libraries, NC State University Libraries
Added: March 24, 2019

2005 conference paper

Integrated dynamic body contact for H-gate PD-SOI MOSFETs for high performance/low power

2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573). Presented at the 2004 IEEE International SOI Conference.

By: J. Damiano n & P. Franzon n

Event: 2004 IEEE International SOI Conference

UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Crossref, NC State University Libraries
Added: March 24, 2019

2005 conference paper

Molecular electronic latches and memories

IEEE Nano, 819–822.

By: D. Nackashi n, C. Amsinck n, N. DiSPigna n & P. Franzon n

Sources: NC State University Libraries, NC State University Libraries
Added: April 21, 2019

2005 conference paper

Molecular electronics – devices and circuits technology

Proceedings IFIP VLSI-SoC 2005, 57–63.

By: P. Franzon, D. Nackashi, N. DiSpigna & S. Sonkusale

Source: NC State University Libraries
Added: April 21, 2019

2005 journal article

Optimal chip-package codesign for high-performance DSP

IEEE TRANSACTIONS ON ADVANCED PACKAGING, 28(2), 288–297.

By: P. Mehrotra n, V. Rao n, T. Conte n & P. Franzon n

author keywords: chip-package codesign; fast Fourier transform (FFT); seamless high off-chip connectivity (SHOCC)
TL;DR: This paper presents the design of a fast Fourier transform (FFT) engine that gives SRAM-like performance in a DRAM-based system and uses almost 100% of the available burst-mode memory bandwidth. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2005 journal article

Scaling constraints in nanoelectronic random-access memories

NANOTECHNOLOGY, 16(10), 2251–2260.

By: C. Amsinck n, N. Di Spigna n, D. Nackashi n & P. Franzon n

TL;DR: Using a combined circuit theoretical modelling and simulation approach, the impact of both the device and interconnect architecture on the scalability of a conductivity-state memory system is quantified. (via Semantic Scholar)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2004 journal article

A "Defect level versus cost" system tradeoff for electronics manufacturing

IEEE TRANSACTIONS ON ELECTRONICS PACKAGING MANUFACTURING, 27(1), 67–76.

By: M. Scheffler*, P. Franzon n & G. Troster*

author keywords: cost quality tradeoff; genetic algorithm; high-density packaging (HDP); Pareto chart
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018

2004 conference paper

A configurable classification engine for polymorphous chip architecture

Proceedings of the ACM BEACON Workshop. Presented at the ACM BEACON Workshop, Boston, MA.

By: M. Yadav, P. Hamilton, R. Sears, Y. Viniotis, T. Conte & P. Franzon

Event: ACM BEACON Workshop at Boston, MA

Source: NC State University Libraries
Added: June 9, 2019

2004 article

AC coupled interconnect for dense 3-D ICs

Xu, J., Mick, S., Wilson, J., Luo, L., Chandrasekar, K., Erickson, E., & Franzon, P. D. (2004, October). IEEE TRANSACTIONS ON NUCLEAR SCIENCE, Vol. 51, pp. 2156–2160.

By: J. Xu n, S. Mick n, J. Wilson n, L. Luo n, K. Chandrasekar n, E. Erickson n, P. Franzon n

author keywords: AC coupled; inductive coupling; spiral inductor; three-dimensional integrated circuits (3-D ICs); through vias; vertical interconnect
TL;DR: This paper presents the potential application of AC coupled interconnect (ACCI) for dense three-dimensional (3-D) integrated circuits (ICs) and concludes that inductive ACCI can provide small pitch vertical interconnects, as well as an excellent thermal solution for dense 3-D ICs. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: August 6, 2018