@article{ramanan_lee_kirkpatrick_suri_misra_2013, title={Properties of atomic layer deposited dielectrics for AlGaN/GaN device passivation}, volume={28}, ISSN={["1361-6641"]}, DOI={10.1088/0268-1242/28/7/074004}, abstractNote={In order to minimize ac–dc dispersion, reduce gate leakage and maximize ac transconductance, there is a critical need to identify optimal interfaces, low-k passivation dielectrics and high-k gate dielectrics. In this paper, an investigation of different atomic layer deposited (ALD) passivation dielectrics on AlGaN/GaN-based hetero-junction field effect transistors (HFETs) was performed. Angle-resolved x-ray photoelectron spectroscopy revealed that HCl/HF and NH4OH cleans resulted in a reduction of native oxide and carbon levels at the GaN surface. The role of high temperature anneals, following the ALD, on the effectiveness of passivation was also explored. Gate-lag measurements on HFETs passivated with a thin ALD high-k Al2O3 or HfAlO layer capped with a thick plasma enhanced chemical vapor deposited (PECVD) low-k SiO2 layer, annealed at 600–700 °C, were found to be as good as or even better than those with conventional PECVD silicon nitride passivation. Further, it was observed that different passivation dielectric stacks required different anneal temperatures for improved gate-lag behavior compared to the as-deposited case.}, number={7}, journal={SEMICONDUCTOR SCIENCE AND TECHNOLOGY}, author={Ramanan, Narayanan and Lee, Bongmook and Kirkpatrick, Casey and Suri, Rahul and Misra, Veena}, year={2013}, month={Jul} }
 @article{kirkpatrick_lee_suri_yang_misra_2012, title={Atomic Layer Deposition of SiO2 for AlGaN/GaN MOS-HFETs}, volume={33}, ISSN={["1558-0563"]}, DOI={10.1109/led.2012.2203782}, abstractNote={This letter investigates the electrical properties of SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> gate dielectric on GaN heterostructures deposited by atomic layer deposition (ALD). ALD SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> has a dielectric constant of 3.9 and a bandgap of 8.8 eV. ALD SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> provides a good interface to GaN and minimizes the interfacial layer growth. The threshold voltage of metal-oxide-semiconductor heterojunction field-effect transistors with ALD SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> dielectric is -1.5 V, owing to a fixed charge concentration of -1.6 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> . It was also found that devices with ALD SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> dielectric exhibit three orders of magnitude reduction in gate leakage current compared to conventional Schottky gate HFETs.}, number={9}, journal={IEEE ELECTRON DEVICE LETTERS}, author={Kirkpatrick, Casey J. and Lee, Bongmook and Suri, Rahul and Yang, Xiangyu and Misra, Veena}, year={2012}, month={Sep}, pages={1240–1242} }
 @article{suri_kirkpatrick_lichtenwalner_misra_2010, title={Energy-band alignment of Al2O3 and HfAlO gate dielectrics deposited by atomic layer deposition on 4H-SiC}, volume={96}, number={4}, journal={Applied Physics Letters}, author={Suri, R. and Kirkpatrick, C. J. and Lichtenwalner, D. J. and Misra, V.}, year={2010} }
 @article{suri_lichtenwalner_misra_2010, title={Interfacial self cleaning during atomic layer deposition and annealing of HfO2 films on native (100)-GaAs substrates}, volume={96}, ISSN={["0003-6951"]}, DOI={10.1063/1.3357422}, abstractNote={The reduction in native oxides on GaAs surface during atomic layer deposition (ALD) of HfO2 using tetrakis-dimethylamino-hafnium precursor was investigated using x-ray photoelectron spectroscopy. The role of the ALD growth temperature on the reaction between surface oxides and precursor was studied. Interfacial oxide reduction was found to be insignificant for ALD at 200 °C, while nearly complete for growth at 300 °C. During postdeposition annealing at 400 °C, any arsenic oxides present were found to decompose, resulting in an increase in the interfacial gallium oxides. Thus, control of the ALD process plays a large role in determining interface properties.}, number={11}, journal={APPLIED PHYSICS LETTERS}, author={Suri, Rahul and Lichtenwalner, Daniel J. and Misra, Veena}, year={2010}, month={Mar} }
 @inproceedings{lee_kirkpatrick_yang_jayanti_suri_roberts_misra_2010, title={Normally-off AlGaN/GaN-on-Si MOSHFETs with TaN floating gates and ALD SiO2 tunnel dielectrics}, DOI={10.1109/iedm.2010.5703401}, abstractNote={In this work, we have demonstrated a normally-off AlGaN/GaN metal-oxide semiconductor heterojunction field effect transistor (MOSHFET) wherein the enhancement mode operation is enabled by charge storage within a metal floating gate embedded in a dielectric stack and negative charges in the tunnel oxide. By combining ALD SiO 2 and TaN floating gate (FG), up to 6V of V T shift after pulse programming (corresponding ∼ 1.2×1013 charges/cm2 stored within the FG) is obtained which results in a normally-off device with low gate leakage and good transconductance.}, booktitle={2010 international electron devices meeting - technical digest}, author={Lee, B. and Kirkpatrick, C. and Yang, X. Y. and Jayanti, S. and Suri, R. and Roberts, J. and Misra, Veena}, year={2010} }
 @inproceedings{jayanti_yang_suri_misra_2010, title={Ultimate scalability of TaN metal floating gate with incorporation of High-K blocking dielectrics for flash memory applications}, DOI={10.1109/iedm.2010.5703301}, abstractNote={We have investigated ultrathin TaN metal floating gate (FG) with Hf based high-K interpoly dielectrics (IPD) for NAND Flash applications. In an attempt to investigate the memory behavior as the FG thickness is reduced, scalability of TaN FG down to 1 nm thickness has been explored. We have demonstrated excellent memory performance with program-erase (P-E) window as large as 16V. Our results indicate that high-K based IPD in conjunction with ultra-thin TaN metal FG can enable further scaling of NAND Flash memory beyond conventional oxide-nitride-oxide (ONO) based IPD technology.}, booktitle={2010 international electron devices meeting - technical digest}, author={Jayanti, S. and Yang, X. Y. and Suri, R. and Misra, Veena}, year={2010} }
 @article{suri_lee_lichtenwalner_biswas_misra_2008, title={Electrical characteristics of metal-oxide-semiconductor capacitors on p-GaAs using atomic layer deposition of ultrathin HfAlO gate dielectric}, volume={93}, ISSN={["0003-6951"]}, DOI={10.1063/1.3007978}, abstractNote={Properties of ultrathin HfAlO gate dielectrics on sulfur-passivated p-GaAs were investigated using capacitance-voltage and current-voltage measurement techniques and angle-resolved x-ray photoelectron spectroscopy. By optimizing the individual layer thickness of atomic-layer deposited Al2O3 and HfO2 and the postdeposition anneal (PDA) conditions, a low equivalent oxide thickness of 1.6 nm, low gate leakage of 2.6×10−3 A/cm2 at Vg=Vfb−1 V, and excellent frequency dispersion characteristics were obtained. No interfacial As–O bonding and only a small amount of Ga–O bonding were detected after PDA at 500 °C. These results reveal a good quality dielectric interface on GaAs without an additional interface passivation layer.}, number={19}, journal={APPLIED PHYSICS LETTERS}, author={Suri, Rahul and Lee, Bongmook and Lichtenwalner, Daniel J. and Biswas, Nivedita and Misra, Veena}, year={2008}, month={Nov} }
 @article{suri_lichtenwalner_misra_2008, title={Impact of elemental arsenic on electrical characteristics of metal-oxide-semiconductor capacitors on GaAs using atomic-layer deposited HfO2 gate dielectric}, volume={92}, ISSN={["1077-3118"]}, DOI={10.1063/1.2949079}, abstractNote={The interface between HfO2 and sulfur-passivated GaAs was analyzed after atomic-layer deposition (ALD) and postdeposition annealing (PDA) using x-ray photoelectron spectroscopy. The HfO2 ALD process resulted in elemental arsenic buildup at the interface. Electrical measurements confirmed that the elemental arsenic caused anomalously large values for equivalent oxide thickness (EOT), hysteresis, and frequency dispersion in accumulation. Arsenic outdiffusion after PDA lowered the EOT but increased the gate leakage. Annealing the (NH4)2S-treated GaAs prior to ALD yielded an EOT of 1.85nm and leakage of 6.6×10−4A∕cm2 at Vg=Vfb−1V. This modified passivation scheme looks promising for achieving a high-quality HfO2∕GaAs interface.}, number={24}, journal={APPLIED PHYSICS LETTERS}, author={Suri, Rahul and Lichtenwalner, Daniel J. and Misra, Veena}, year={2008}, month={Jun} }