@inproceedings{ku_forbes_chowdhury_rotenberg_2017, title={A case for standard-cell based RAMs in highly-ported superscalar processor structures}, DOI={10.1109/isqed.2017.7918305}, booktitle={Proceedings of the eighteenth international symposium on quality electronic design (isqed)}, author={Ku, S. and Forbes, E. and Chowdhury, R. B. R. and Rotenberg, E.}, year={2017}, pages={131–137} }
 @inproceedings{chowdhury_kannepalli_ku_rotenberg_2016, title={AnyCore: A synthesizable RTL model for exploring and fabricating adaptive superscalar cores}, DOI={10.1109/ispass.2016.7482096}, booktitle={Ieee international symposium on performance analysis of systems and}, author={Chowdhury, R. B. R. and Kannepalli, A. K. and Ku, S. and Rotenberg, E.}, year={2016}, pages={214–224} }