Seunghee Shin

Works (2)

Updated: July 5th, 2023 15:37

2018 article

Scheduling Page Table Walks for Irregular GPU Applications

2018 ACM/IEEE 45TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA), pp. 180–192.

By: S. Shin n, G. Cox *, M. Oskin*, G. Loh *, Y. Solihin n, A. Bhattacharjee *, A. Basu*

author keywords: Computer architecture; GPU; Virtual address
TL;DR: This work discovers that the order of servicing GPU's address translation requests plays a key role in determining the amount of translation overhead experienced by an application, and shows that better forward progress is achieved by prioritizing translation requests from the instructions that require less work to service their address translation needs. (via Semantic Scholar)
Source: Web Of Science
Added: March 4, 2019

2016 article

Dense Footprint Cache: Capacity-Efficient Die-Stacked DRAM Last Level Cache

MEMSYS 2016: PROCEEDINGS OF THE INTERNATIONAL SYMPOSIUM ON MEMORY SYSTEMS, pp. 191–203.

By: S. Shin n, S. Kim* & Y. Solihin n

author keywords: Die-stacked DRAM; last-level cache; replacement policy
TL;DR: Dense Footprint Cache is proposed, a new design of Last Level Cache that uses a large Mblock and relies on useful block prediction in order to reduce memory bandwidth consumption and increase capacity and power efficiency. (via Semantic Scholar)
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Source: Web Of Science
Added: August 6, 2018

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