2014 journal article

Adaptive and Reliable Clock Distribution Design for 3-D Integrated Circuits

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 4(11), 1862–1870.

By: . Chen n, T. Zhu n, W. Davis n & P. Franzon n

author keywords: 3-D integrated circuit (3-D IC); adaptive; clock distribution; deskew; optimization; process-voltage-temperature (PVT) variation; stacking; thermal profile; through-silicon-via (TSV); tunable-delay-buffer (TDB)
TL;DR: A novel active deskew technique to adaptively mitigate the cross-tier variations and the 3-D wiring asymmetry is proposed and a thermal profile-based optimization flow is developed to further improve the power efficiency and reduce design overhead. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, ORCID
Added: August 6, 2018

2013 article

Variation-Aware Circuit Macromodeling and Design Based on Surrogate Models

SIMULATION AND MODELING METHODOLOGIES, TECHNOLOGIES AND APPLICATIONS, Vol. 197, pp. 255–269.

By: T. Zhu n, M. Yelten n, M. Steer n & P. Franzon n

author keywords: Surrogate Modeling; Macromodel; Variation-Aware; Circuit; Device Model; Design Exploration; IO Buffer
TL;DR: A new variation-aware IO buffer macromodel is developed by integrating surrogate modeling and a physically-based model structure that provides both good accuracy and scalability for signal integrity analysis. (via Semantic Scholar)
Sources: Web Of Science, ORCID
Added: August 6, 2018

2012 journal article

Surrogate Model-Based Self-Calibrated Design for Process and Temperature Compensation in Analog/RF Circuits

IEEE Design Test of Computers, 29(6), 74–83.

By: T. Zhu n, M. Steer n & P. Franzon n

TL;DR: This article presents a design flow to find appropriate tuning knob settings to compensate for different process variation scenarios in analog circuits designed in submicrometer nodes. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, ORCID
Added: August 6, 2018

2011 journal article

Accurate and Scalable IO Buffer Macromodel Based on Surrogate Modeling

IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 1(8), 1240–1249.

By: T. Zhu n, M. Steer n & P. Franzon n

author keywords: IBIS; input/output buffer modeling; macromodel; process-voltage-temperature variations; surrogate modeling
TL;DR: Both single-ended and differential output buffer circuit examples demonstrate that the proposed modeling method offers good accuracy and flexible scalability to facilitate signal integrity analysis. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, ORCID
Added: August 6, 2018

2011 journal article

Three-dimensional SRAM design with on-chip access time measurement

ELECTRONICS LETTERS, 47(8), 485–486.

By: X. Chen n, T. Zhu n & W. Davis n

UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, ORCID
Added: August 6, 2018

2009 conference paper

An enhanced macromodeling approach for differential output drivers

BMAS 2009: Proceedings of the 2009 IEEE International Behavioral Modeling and Simulation Workshop, 54–59.

By: T. Zhu n & P. Franzon n

TL;DR: The approach is demonstrated with two typical digital drivers, low-voltage differential signaling (LVDS) driver and pre-emphasis driver, which achieve excellent accuracy in capturing behaviors at various input patterns, loading conditions and supply voltages. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: NC State University Libraries, ORCID
Added: August 6, 2018

2009 conference paper

Application of surrogate modeling to generate compact and PVT-sensitive IBIS models

Electrical Performance of Electronic Packaging and Systems, 77–80.

By: T. Zhu n & P. Franzon n

TL;DR: A new proposal of applying surrogate-modeling in Input-output Buffer Information Specification (IBIS) saves the IBIS data storage resource, extends the model utility to various process-voltage-temperature (PVT) simulations and eliminates the data interpolation deviations. (via Semantic Scholar)
Sources: NC State University Libraries, ORCID
Added: August 6, 2018

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