Works (2)

Updated: July 5th, 2023 15:35

2020 article

Slipstream Processors Revisited: Exploiting Branch Sets

2020 ACM/IEEE 47TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE (ISCA 2020), pp. 105–117.

By: V. Srinivasan n, R. Chowdhury* & E. Rotenberg n

co-author countries: United States of America 🇺🇸
author keywords: branch prediction; prefetching; hard-to-predict branch; delinquent load; pre-execution; helper threads; control independence
Source: Web Of Science
Added: March 8, 2021

2017 conference paper

H3 (heterogeneity in 3D): A logic-on-logic 3D-stacked heterogeneous multi-core processor

2017 IEEE International Conference on Computer Design (ICCD), 145–152.

By: V. Srinivasan n, R. Chowdhury*, E. Forbes*, R. Widialaksono*, Z. Zhang*, J. Schabel n, S. Ku*, S. Lipa n ...

co-author countries: United States of America 🇺🇸

Event: 2017 IEEE International Conference on Computer Design (ICCD) at Boston, MA on November 5-8, 2017

Sources: Web Of Science, ORCID
Added: August 6, 2018

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